diff options
| author | Chris Metcalf <cmetcalf@ezchip.com> | 2015-08-26 13:09:28 -0400 |
|---|---|---|
| committer | Chris Metcalf <cmetcalf@ezchip.com> | 2015-08-27 11:54:42 -0400 |
| commit | 8d03bc56cc27ddd93f70a630686ef06289787c78 (patch) | |
| tree | 036bcdb15b0da460a5f8b710952288d07aa21675 /arch/tile | |
| parent | ff3e9a7307db12a553c20bd92a7cade072445244 (diff) | |
tile: correct some typos in opcode type names
These particular opcode names are not used in the kernel directly,
so updating them just has the effect of making downstream consumers
more likely to end up using better names; this was reported from the
qemu community.
Reported-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
Diffstat (limited to 'arch/tile')
| -rw-r--r-- | arch/tile/include/uapi/arch/opcode_tilegx.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/tile/include/uapi/arch/opcode_tilegx.h b/arch/tile/include/uapi/arch/opcode_tilegx.h index d76ff2db745e..9e46eaa847d4 100644 --- a/arch/tile/include/uapi/arch/opcode_tilegx.h +++ b/arch/tile/include/uapi/arch/opcode_tilegx.h | |||
| @@ -830,11 +830,11 @@ enum | |||
| 830 | ADDX_RRR_0_OPCODE_X0 = 2, | 830 | ADDX_RRR_0_OPCODE_X0 = 2, |
| 831 | ADDX_RRR_0_OPCODE_X1 = 2, | 831 | ADDX_RRR_0_OPCODE_X1 = 2, |
| 832 | ADDX_RRR_0_OPCODE_Y0 = 0, | 832 | ADDX_RRR_0_OPCODE_Y0 = 0, |
| 833 | ADDX_SPECIAL_0_OPCODE_Y1 = 0, | 833 | ADDX_RRR_0_OPCODE_Y1 = 0, |
| 834 | ADD_RRR_0_OPCODE_X0 = 3, | 834 | ADD_RRR_0_OPCODE_X0 = 3, |
| 835 | ADD_RRR_0_OPCODE_X1 = 3, | 835 | ADD_RRR_0_OPCODE_X1 = 3, |
| 836 | ADD_RRR_0_OPCODE_Y0 = 1, | 836 | ADD_RRR_0_OPCODE_Y0 = 1, |
| 837 | ADD_SPECIAL_0_OPCODE_Y1 = 1, | 837 | ADD_RRR_0_OPCODE_Y1 = 1, |
| 838 | ANDI_IMM8_OPCODE_X0 = 3, | 838 | ANDI_IMM8_OPCODE_X0 = 3, |
| 839 | ANDI_IMM8_OPCODE_X1 = 3, | 839 | ANDI_IMM8_OPCODE_X1 = 3, |
| 840 | ANDI_OPCODE_Y0 = 2, | 840 | ANDI_OPCODE_Y0 = 2, |
| @@ -995,6 +995,7 @@ enum | |||
| 995 | LD4U_ADD_IMM8_OPCODE_X1 = 12, | 995 | LD4U_ADD_IMM8_OPCODE_X1 = 12, |
| 996 | LD4U_OPCODE_Y2 = 2, | 996 | LD4U_OPCODE_Y2 = 2, |
| 997 | LD4U_UNARY_OPCODE_X1 = 20, | 997 | LD4U_UNARY_OPCODE_X1 = 20, |
| 998 | LDNA_ADD_IMM8_OPCODE_X1 = 21, | ||
| 998 | LDNA_UNARY_OPCODE_X1 = 21, | 999 | LDNA_UNARY_OPCODE_X1 = 21, |
| 999 | LDNT1S_ADD_IMM8_OPCODE_X1 = 13, | 1000 | LDNT1S_ADD_IMM8_OPCODE_X1 = 13, |
| 1000 | LDNT1S_UNARY_OPCODE_X1 = 22, | 1001 | LDNT1S_UNARY_OPCODE_X1 = 22, |
| @@ -1015,7 +1016,6 @@ enum | |||
| 1015 | LD_UNARY_OPCODE_X1 = 29, | 1016 | LD_UNARY_OPCODE_X1 = 29, |
| 1016 | LNK_UNARY_OPCODE_X1 = 30, | 1017 | LNK_UNARY_OPCODE_X1 = 30, |
| 1017 | LNK_UNARY_OPCODE_Y1 = 14, | 1018 | LNK_UNARY_OPCODE_Y1 = 14, |
| 1018 | LWNA_ADD_IMM8_OPCODE_X1 = 21, | ||
| 1019 | MFSPR_IMM8_OPCODE_X1 = 22, | 1019 | MFSPR_IMM8_OPCODE_X1 = 22, |
| 1020 | MF_UNARY_OPCODE_X1 = 31, | 1020 | MF_UNARY_OPCODE_X1 = 31, |
| 1021 | MM_BF_OPCODE_X0 = 7, | 1021 | MM_BF_OPCODE_X0 = 7, |