diff options
| author | David S. Miller <davem@davemloft.net> | 2017-08-10 15:11:16 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-08-10 15:11:16 -0400 |
| commit | 3b2b69efeca734b78bc85fd02253b0465bb2bec7 (patch) | |
| tree | 57fd8b5b0e9c04f24f5f9ec70ceb0a706cecfb47 /arch/sparc/mm/init_64.c | |
| parent | 2e2d5d767c9ddb2b10d74f2c20a257101c7070eb (diff) | |
| parent | 26273939ace935dd7553b31d279eab30b40f7b9a (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Mainline had UFO fixes, but UFO is removed in net-next so we
take the HEAD hunks.
Minor context conflict in bcmsysport statistics bug fix.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/mm/init_64.c')
| -rw-r--r-- | arch/sparc/mm/init_64.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c index fed73f14aa49..afa0099f3748 100644 --- a/arch/sparc/mm/init_64.c +++ b/arch/sparc/mm/init_64.c | |||
| @@ -1944,12 +1944,22 @@ static void __init setup_page_offset(void) | |||
| 1944 | break; | 1944 | break; |
| 1945 | case SUN4V_CHIP_SPARC_M7: | 1945 | case SUN4V_CHIP_SPARC_M7: |
| 1946 | case SUN4V_CHIP_SPARC_SN: | 1946 | case SUN4V_CHIP_SPARC_SN: |
| 1947 | default: | ||
| 1948 | /* M7 and later support 52-bit virtual addresses. */ | 1947 | /* M7 and later support 52-bit virtual addresses. */ |
| 1949 | sparc64_va_hole_top = 0xfff8000000000000UL; | 1948 | sparc64_va_hole_top = 0xfff8000000000000UL; |
| 1950 | sparc64_va_hole_bottom = 0x0008000000000000UL; | 1949 | sparc64_va_hole_bottom = 0x0008000000000000UL; |
| 1951 | max_phys_bits = 49; | 1950 | max_phys_bits = 49; |
| 1952 | break; | 1951 | break; |
| 1952 | case SUN4V_CHIP_SPARC_M8: | ||
| 1953 | default: | ||
| 1954 | /* M8 and later support 54-bit virtual addresses. | ||
| 1955 | * However, restricting M8 and above VA bits to 53 | ||
| 1956 | * as 4-level page table cannot support more than | ||
| 1957 | * 53 VA bits. | ||
| 1958 | */ | ||
| 1959 | sparc64_va_hole_top = 0xfff0000000000000UL; | ||
| 1960 | sparc64_va_hole_bottom = 0x0010000000000000UL; | ||
| 1961 | max_phys_bits = 51; | ||
| 1962 | break; | ||
| 1953 | } | 1963 | } |
| 1954 | } | 1964 | } |
| 1955 | 1965 | ||
| @@ -2161,6 +2171,7 @@ static void __init sun4v_linear_pte_xor_finalize(void) | |||
| 2161 | */ | 2171 | */ |
| 2162 | switch (sun4v_chip_type) { | 2172 | switch (sun4v_chip_type) { |
| 2163 | case SUN4V_CHIP_SPARC_M7: | 2173 | case SUN4V_CHIP_SPARC_M7: |
| 2174 | case SUN4V_CHIP_SPARC_M8: | ||
| 2164 | case SUN4V_CHIP_SPARC_SN: | 2175 | case SUN4V_CHIP_SPARC_SN: |
| 2165 | pagecv_flag = 0x00; | 2176 | pagecv_flag = 0x00; |
| 2166 | break; | 2177 | break; |
| @@ -2313,6 +2324,7 @@ void __init paging_init(void) | |||
| 2313 | */ | 2324 | */ |
| 2314 | switch (sun4v_chip_type) { | 2325 | switch (sun4v_chip_type) { |
| 2315 | case SUN4V_CHIP_SPARC_M7: | 2326 | case SUN4V_CHIP_SPARC_M7: |
| 2327 | case SUN4V_CHIP_SPARC_M8: | ||
| 2316 | case SUN4V_CHIP_SPARC_SN: | 2328 | case SUN4V_CHIP_SPARC_SN: |
| 2317 | page_cache4v_flag = _PAGE_CP_4V; | 2329 | page_cache4v_flag = _PAGE_CP_4V; |
| 2318 | break; | 2330 | break; |
