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authorDave Airlie <airlied@redhat.com>2018-11-28 19:34:03 -0500
committerDave Airlie <airlied@redhat.com>2018-11-28 19:34:03 -0500
commit1ec28f8b8ada4e4f77d1af006a3a474f4f83b8e3 (patch)
tree2e810e02a66cdec0bc82a8555796b7083ad03416 /arch/riscv/kernel
parent61647c77cb15354a329cbb36fe7a2253b36b51b1 (diff)
parent2e6e902d185027f8e3cb8b7305238f7e35d6a436 (diff)
Merge v4.20-rc4 into drm-next
Requested by Boris Brezillon for some vc4 fixes that are needed for future vc4 work. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'arch/riscv/kernel')
-rw-r--r--arch/riscv/kernel/cpu.c9
-rw-r--r--arch/riscv/kernel/head.S10
-rw-r--r--arch/riscv/kernel/vmlinux.lds.S2
3 files changed, 17 insertions, 4 deletions
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 3a5a2ee31547..b4a7d4427fbb 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -64,7 +64,7 @@ int riscv_of_processor_hartid(struct device_node *node)
64 64
65static void print_isa(struct seq_file *f, const char *orig_isa) 65static void print_isa(struct seq_file *f, const char *orig_isa)
66{ 66{
67 static const char *ext = "mafdc"; 67 static const char *ext = "mafdcsu";
68 const char *isa = orig_isa; 68 const char *isa = orig_isa;
69 const char *e; 69 const char *e;
70 70
@@ -88,11 +88,14 @@ static void print_isa(struct seq_file *f, const char *orig_isa)
88 /* 88 /*
89 * Check the rest of the ISA string for valid extensions, printing those 89 * Check the rest of the ISA string for valid extensions, printing those
90 * we find. RISC-V ISA strings define an order, so we only print the 90 * we find. RISC-V ISA strings define an order, so we only print the
91 * extension bits when they're in order. 91 * extension bits when they're in order. Hide the supervisor (S)
92 * extension from userspace as it's not accessible from there.
92 */ 93 */
93 for (e = ext; *e != '\0'; ++e) { 94 for (e = ext; *e != '\0'; ++e) {
94 if (isa[0] == e[0]) { 95 if (isa[0] == e[0]) {
95 seq_write(f, isa, 1); 96 if (isa[0] != 's')
97 seq_write(f, isa, 1);
98
96 isa++; 99 isa++;
97 } 100 }
98 } 101 }
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 711190d473d4..fe884cd69abd 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -44,6 +44,16 @@ ENTRY(_start)
44 amoadd.w a3, a2, (a3) 44 amoadd.w a3, a2, (a3)
45 bnez a3, .Lsecondary_start 45 bnez a3, .Lsecondary_start
46 46
47 /* Clear BSS for flat non-ELF images */
48 la a3, __bss_start
49 la a4, __bss_stop
50 ble a4, a3, clear_bss_done
51clear_bss:
52 REG_S zero, (a3)
53 add a3, a3, RISCV_SZPTR
54 blt a3, a4, clear_bss
55clear_bss_done:
56
47 /* Save hart ID and DTB physical address */ 57 /* Save hart ID and DTB physical address */
48 mv s0, a0 58 mv s0, a0
49 mv s1, a1 59 mv s1, a1
diff --git a/arch/riscv/kernel/vmlinux.lds.S b/arch/riscv/kernel/vmlinux.lds.S
index ece84991609c..65df1dfdc303 100644
--- a/arch/riscv/kernel/vmlinux.lds.S
+++ b/arch/riscv/kernel/vmlinux.lds.S
@@ -74,7 +74,7 @@ SECTIONS
74 *(.sbss*) 74 *(.sbss*)
75 } 75 }
76 76
77 BSS_SECTION(0, 0, 0) 77 BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 0)
78 78
79 EXCEPTION_TABLE(0x10) 79 EXCEPTION_TABLE(0x10)
80 NOTES 80 NOTES