Merge tag 'powerpc-5.2-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc updates from Michael Ellerman:
 "Slightly delayed due to the issue with printk() calling
  probe_kernel_read() interacting with our new user access prevention
  stuff, but all fixed now.

  The only out-of-area changes are the addition of a cpuhp_state, small
  additions to Documentation and MAINTAINERS updates.

  Highlights:

   - Support for Kernel Userspace Access/Execution Prevention (like
     SMAP/SMEP/PAN/PXN) on some 64-bit and 32-bit CPUs. This prevents
     the kernel from accidentally accessing userspace outside
     copy_to/from_user(), or ever executing userspace.

   - KASAN support on 32-bit.

   - Rework of where we map the kernel, vmalloc, etc. on 64-bit hash to
     use the same address ranges we use with the Radix MMU.

   - A rewrite into C of large parts of our idle handling code for
     64-bit Book3S (ie. power8 & power9).

   - A fast path entry for syscalls on 32-bit CPUs, for a 12-17% speedup
     in the null_syscall benchmark.

   - On 64-bit bare metal we have support for recovering from errors
     with the time base (our clocksource), however if that fails
     currently we hang in __delay() and never crash. We now have support
     for detecting that case and short circuiting __delay() so we at
     least panic() and reboot.

   - Add support for optionally enabling the DAWR on Power9, which had
     to be disabled by default due to a hardware erratum. This has the
     effect of enabling hardware breakpoints for GDB, the downside is a
     badly behaved program could crash the machine by pointing the DAWR
     at cache inhibited memory. This is opt-in obviously.

   - xmon, our crash handler, gets support for a read only mode where
     operations that could change memory or otherwise disturb the system
     are disabled.

  Plus many clean-ups, reworks and minor fixes etc.

  Thanks to: Christophe Leroy, Akshay Adiga, Alastair D'Silva, Alexey
  Kardashevskiy, Andrew Donnellan, Aneesh Kumar K.V, Anju T Sudhakar,
  Anton Blanchard, Ben Hutchings, Bo YU, Breno Leitao, Cédric Le Goater,
  Christopher M. Riedl, Christoph Hellwig, Colin Ian King, David Gibson,
  Ganesh Goudar, Gautham R. Shenoy, George Spelvin, Greg Kroah-Hartman,
  Greg Kurz, Horia Geantă, Jagadeesh Pagadala, Joel Stanley, Joe
  Perches, Julia Lawall, Laurentiu Tudor, Laurent Vivier, Lukas Bulwahn,
  Madhavan Srinivasan, Mahesh Salgaonkar, Mathieu Malaterre, Michael
  Neuling, Mukesh Ojha, Nathan Fontenot, Nathan Lynch, Nicholas Piggin,
  Nick Desaulniers, Oliver O'Halloran, Peng Hao, Qian Cai, Ravi
  Bangoria, Rick Lindsley, Russell Currey, Sachin Sant, Stewart Smith,
  Sukadev Bhattiprolu, Thomas Huth, Tobin C. Harding, Tyrel Datwyler,
  Valentin Schneider, Wei Yongjun, Wen Yang, YueHaibing"

* tag 'powerpc-5.2-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (205 commits)
  powerpc/64s: Use early_mmu_has_feature() in set_kuap()
  powerpc/book3s/64: check for NULL pointer in pgd_alloc()
  powerpc/mm: Fix hugetlb page initialization
  ocxl: Fix return value check in afu_ioctl()
  powerpc/mm: fix section mismatch for setup_kup()
  powerpc/mm: fix redundant inclusion of pgtable-frag.o in Makefile
  powerpc/mm: Fix makefile for KASAN
  powerpc/kasan: add missing/lost Makefile
  selftests/powerpc: Add a signal fuzzer selftest
  powerpc/booke64: set RI in default MSR
  ocxl: Provide global MMIO accessors for external drivers
  ocxl: move event_fd handling to frontend
  ocxl: afu_irq only deals with IRQ IDs, not offsets
  ocxl: Allow external drivers to use OpenCAPI contexts
  ocxl: Create a clear delineation between ocxl backend & frontend
  ocxl: Don't pass pci_dev around
  ocxl: Split pci.c
  ocxl: Remove some unused exported symbols
  ocxl: Remove superfluous 'extern' from headers
  ocxl: read_pasid never returns an error, so make it void
  ...

1 files changed, 99 insertions, 0 deletions

diff --git a/arch/powerpc/sysdev/xive/native.c b/arch/powerpc/sysdev/xive/native.c
index 1ca127d052a6..0c037e933e55 100644
--- a/arch/powerpc/sysdev/xive/native.c
+++ b/arch/powerpc/sysdev/xive/native.c
@@ -437,6 +437,12 @@ void xive_native_sync_source(u32 hw_irq)
 }
 EXPORT_SYMBOL_GPL(xive_native_sync_source);
 
+void xive_native_sync_queue(u32 hw_irq)
+{
+        opal_xive_sync(XIVE_SYNC_QUEUE, hw_irq);
+}
+EXPORT_SYMBOL_GPL(xive_native_sync_queue);
+
 static const struct xive_ops xive_native_ops = {
         .populate_irq_data      = xive_native_populate_irq_data,
         .configure_irq          = xive_native_configure_irq,
@@ -711,3 +717,96 @@ bool xive_native_has_single_escalation(void)
         return xive_has_single_esc;
 }
 EXPORT_SYMBOL_GPL(xive_native_has_single_escalation);
+
+int xive_native_get_queue_info(u32 vp_id, u32 prio,
+                               u64 *out_qpage,
+                               u64 *out_qsize,
+                               u64 *out_qeoi_page,
+                               u32 *out_escalate_irq,
+                               u64 *out_qflags)
+{
+        __be64 qpage;
+        __be64 qsize;
+        __be64 qeoi_page;
+        __be32 escalate_irq;
+        __be64 qflags;
+        s64 rc;
+
+        rc = opal_xive_get_queue_info(vp_id, prio, &qpage, &qsize,
+                                      &qeoi_page, &escalate_irq, &qflags);
+        if (rc) {
+                pr_err("OPAL failed to get queue info for VCPU %d/%d : %lld\n",
+                       vp_id, prio, rc);
+                return -EIO;
+        }
+
+        if (out_qpage)
+                *out_qpage = be64_to_cpu(qpage);
+        if (out_qsize)
+                *out_qsize = be32_to_cpu(qsize);
+        if (out_qeoi_page)
+                *out_qeoi_page = be64_to_cpu(qeoi_page);
+        if (out_escalate_irq)
+                *out_escalate_irq = be32_to_cpu(escalate_irq);
+        if (out_qflags)
+                *out_qflags = be64_to_cpu(qflags);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(xive_native_get_queue_info);
+
+int xive_native_get_queue_state(u32 vp_id, u32 prio, u32 *qtoggle, u32 *qindex)
+{
+        __be32 opal_qtoggle;
+        __be32 opal_qindex;
+        s64 rc;
+
+        rc = opal_xive_get_queue_state(vp_id, prio, &opal_qtoggle,
+                                       &opal_qindex);
+        if (rc) {
+                pr_err("OPAL failed to get queue state for VCPU %d/%d : %lld\n",
+                       vp_id, prio, rc);
+                return -EIO;
+        }
+
+        if (qtoggle)
+                *qtoggle = be32_to_cpu(opal_qtoggle);
+        if (qindex)
+                *qindex = be32_to_cpu(opal_qindex);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(xive_native_get_queue_state);
+
+int xive_native_set_queue_state(u32 vp_id, u32 prio, u32 qtoggle, u32 qindex)
+{
+        s64 rc;
+
+        rc = opal_xive_set_queue_state(vp_id, prio, qtoggle, qindex);
+        if (rc) {
+                pr_err("OPAL failed to set queue state for VCPU %d/%d : %lld\n",
+                       vp_id, prio, rc);
+                return -EIO;
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(xive_native_set_queue_state);
+
+int xive_native_get_vp_state(u32 vp_id, u64 *out_state)
+{
+        __be64 state;
+        s64 rc;
+
+        rc = opal_xive_get_vp_state(vp_id, &state);
+        if (rc) {
+                pr_err("OPAL failed to get vp state for VCPU %d : %lld\n",
+                       vp_id, rc);
+                return -EIO;
+        }
+
+        if (out_state)
+                *out_state = be64_to_cpu(state);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(xive_native_get_vp_state);