diff options
author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2015-06-05 02:35:16 -0400 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2015-06-11 01:16:50 -0400 |
commit | e5aad1e678746af663e3e3acc7f3501309997f51 (patch) | |
tree | cca65fa5da17295d73302af977ec95fb06225386 /arch/powerpc/platforms/powernv/pci-ioda.c | |
parent | 05c6cfb9dce0d13d37e9d007ee6a4af36f1c0a58 (diff) |
powerpc/powernv/ioda2: Rework iommu_table creation
This moves iommu_table creation to the beginning to make following changes
easier to review. This starts using table parameters from the iommu_table
struct.
This should cause no behavioural change.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms/powernv/pci-ioda.c')
-rw-r--r-- | arch/powerpc/platforms/powernv/pci-ioda.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index ecbc071a143e..feaba5ecfa97 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c | |||
@@ -2071,13 +2071,23 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, | |||
2071 | addr = page_address(tce_mem); | 2071 | addr = page_address(tce_mem); |
2072 | memset(addr, 0, tce_table_size); | 2072 | memset(addr, 0, tce_table_size); |
2073 | 2073 | ||
2074 | /* Setup linux iommu table */ | ||
2075 | pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0, | ||
2076 | IOMMU_PAGE_SHIFT_4K); | ||
2077 | |||
2078 | tbl->it_ops = &pnv_ioda2_iommu_ops; | ||
2079 | iommu_init_table(tbl, phb->hose->node); | ||
2080 | #ifdef CONFIG_IOMMU_API | ||
2081 | pe->table_group.ops = &pnv_pci_ioda2_ops; | ||
2082 | #endif | ||
2083 | |||
2074 | /* | 2084 | /* |
2075 | * Map TCE table through TVT. The TVE index is the PE number | 2085 | * Map TCE table through TVT. The TVE index is the PE number |
2076 | * shifted by 1 bit for 32-bits DMA space. | 2086 | * shifted by 1 bit for 32-bits DMA space. |
2077 | */ | 2087 | */ |
2078 | rc = opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number, | 2088 | rc = opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number, |
2079 | pe->pe_number << 1, 1, __pa(addr), | 2089 | pe->pe_number << 1, 1, __pa(tbl->it_base), |
2080 | tce_table_size, 0x1000); | 2090 | tbl->it_size << 3, 1ULL << tbl->it_page_shift); |
2081 | if (rc) { | 2091 | if (rc) { |
2082 | pe_err(pe, "Failed to configure 32-bit TCE table," | 2092 | pe_err(pe, "Failed to configure 32-bit TCE table," |
2083 | " err %ld\n", rc); | 2093 | " err %ld\n", rc); |
@@ -2086,20 +2096,10 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, | |||
2086 | 2096 | ||
2087 | pnv_pci_ioda2_tce_invalidate_entire(pe); | 2097 | pnv_pci_ioda2_tce_invalidate_entire(pe); |
2088 | 2098 | ||
2089 | /* Setup linux iommu table */ | ||
2090 | pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0, | ||
2091 | IOMMU_PAGE_SHIFT_4K); | ||
2092 | |||
2093 | /* OPAL variant of PHB3 invalidated TCEs */ | 2099 | /* OPAL variant of PHB3 invalidated TCEs */ |
2094 | if (phb->ioda.tce_inval_reg) | 2100 | if (phb->ioda.tce_inval_reg) |
2095 | tbl->it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE); | 2101 | tbl->it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE); |
2096 | 2102 | ||
2097 | tbl->it_ops = &pnv_ioda2_iommu_ops; | ||
2098 | iommu_init_table(tbl, phb->hose->node); | ||
2099 | #ifdef CONFIG_IOMMU_API | ||
2100 | pe->table_group.ops = &pnv_pci_ioda2_ops; | ||
2101 | #endif | ||
2102 | |||
2103 | if (pe->flags & PNV_IODA_PE_DEV) { | 2103 | if (pe->flags & PNV_IODA_PE_DEV) { |
2104 | /* | 2104 | /* |
2105 | * Setting table base here only for carrying iommu_group | 2105 | * Setting table base here only for carrying iommu_group |