Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux into next

Freescale updates from Scott:

"Highlights include qbman support (a prerequisite for datapath drivers
such as ethernet), a PCI DMA fix+improvement, reset handler changes, more
8xx optimizations, and some cleanups and fixes."

5 files changed, 14 insertions, 0 deletions

diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index f752e6f7cfbe..ab68d0ee7725 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -43,6 +43,7 @@ extern int machine_check_e500mc(struct pt_regs *regs);
 extern int machine_check_e500(struct pt_regs *regs);
 extern int machine_check_e200(struct pt_regs *regs);
 extern int machine_check_47x(struct pt_regs *regs);
+int machine_check_8xx(struct pt_regs *regs);
 
 extern void cpu_down_flush_e500v2(void);
 extern void cpu_down_flush_e500mc(void);
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index c7d82ff62a33..eba60416536e 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -155,6 +155,8 @@ static inline unsigned long arch_local_irq_save(void)
         unsigned long flags = arch_local_save_flags();
 #ifdef CONFIG_BOOKE
         asm volatile("wrteei 0" : : : "memory");
+#elif defined(CONFIG_PPC_8xx)
+        wrtspr(SPRN_EID);
 #else
         SET_MSR_EE(flags & ~MSR_EE);
 #endif
@@ -165,6 +167,8 @@ static inline void arch_local_irq_disable(void)
 {
 #ifdef CONFIG_BOOKE
         asm volatile("wrteei 0" : : : "memory");
+#elif defined(CONFIG_PPC_8xx)
+        wrtspr(SPRN_EID);
 #else
         arch_local_irq_save();
 #endif
@@ -174,6 +178,8 @@ static inline void arch_local_irq_enable(void)
 {
 #ifdef CONFIG_BOOKE
         asm volatile("wrteei 1" : : : "memory");
+#elif defined(CONFIG_PPC_8xx)
+        wrtspr(SPRN_EIE);
 #else
         unsigned long msr = mfmsr();
         SET_MSR_EE(msr | MSR_EE);
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 54ff8ce7fa96..0132831b3081 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -152,6 +152,7 @@
 #define PPC_INST_LWSYNC                 0x7c2004ac
 #define PPC_INST_SYNC                   0x7c0004ac
 #define PPC_INST_SYNC_MASK              0xfc0007fe
+#define PPC_INST_ISYNC                  0x4c00012c
 #define PPC_INST_LXVD2X                 0x7c000698
 #define PPC_INST_MCRXR                  0x7c000400
 #define PPC_INST_MCRXR_MASK             0xfc0007fe
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index a8f63bcb71af..cff79885c2fd 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1249,6 +1249,8 @@ static inline void mtmsr_isync(unsigned long val)
                                      : "r" ((unsigned long)(v)) \
                                      : "memory")
 #endif
+#define wrtspr(rn)      asm volatile("mtspr " __stringify(rn) ",0" : \
+                                     : : "memory")
 
 extern unsigned long msr_check_and_set(unsigned long bits);
 extern bool strict_msr_control;
diff --git a/arch/powerpc/include/asm/reg_8xx.h b/arch/powerpc/include/asm/reg_8xx.h
index 94d01f81e668..0197e12f7d48 100644
--- a/arch/powerpc/include/asm/reg_8xx.h
+++ b/arch/powerpc/include/asm/reg_8xx.h
@@ -25,6 +25,10 @@
 #define SPRN_MD_RAM0    825
 #define SPRN_MD_RAM1    826
 
+/* Special MSR manipulation registers */
+#define SPRN_EIE        80      /* External interrupt enable (EE=1, RI=1) */
+#define SPRN_EID        81      /* External interrupt disable (EE=0, RI=1) */
+
 /* Commands.  Only the first few are available to the instruction cache.
 */
 #define IDC_ENABLE      0x02000000      /* Cache enable */