parisc: Remove flush_user_dcache_range and flush_user_icache_range

The functions flush_user_dcache_range() and flush_user_icache_range()
are only used by the parisc signal handling code.  This code only needs
to flush a couple of lines, so the threshold check is unnecessary
overhead.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>

1 files changed, 7 insertions, 6 deletions

diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index e58925ac64d1..f6aaca27ac4e 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -232,6 +232,7 @@ setup_rt_frame(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs,
         struct rt_sigframe __user *frame;
         unsigned long rp, usp;
         unsigned long haddr, sigframe_size;
+        unsigned long start, end;
         int err = 0;
 #ifdef CONFIG_64BIT
         struct compat_rt_sigframe __user * compat_frame;
@@ -299,10 +300,10 @@ setup_rt_frame(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs,
         }
 #endif
 
-        flush_user_dcache_range((unsigned long) &frame->tramp[0],
-                           (unsigned long) &frame->tramp[TRAMP_SIZE]);
-        flush_user_icache_range((unsigned long) &frame->tramp[0],
-                           (unsigned long) &frame->tramp[TRAMP_SIZE]);
+        start = (unsigned long) &frame->tramp[0];
+        end = (unsigned long) &frame->tramp[TRAMP_SIZE];
+        flush_user_dcache_range_asm(start, end);
+        flush_user_icache_range_asm(start, end);
 
         /* TRAMP Words 0-4, Length 5 = SIGRESTARTBLOCK_TRAMP
          * TRAMP Words 5-9, Length 4 = SIGRETURN_TRAMP
@@ -548,8 +549,8 @@ insert_restart_trampoline(struct pt_regs *regs)
                 WARN_ON(err);
 
                 /* flush data/instruction cache for new insns */
-                flush_user_dcache_range(start, end);
-                flush_user_icache_range(start, end);
+                flush_user_dcache_range_asm(start, end);
+                flush_user_icache_range_asm(start, end);
 
                 regs->gr[31] = regs->gr[30] + 8;
                 return;