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authorAndrew Bresticker <abrestic@chromium.org>2014-09-18 17:47:14 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 01:44:53 -0500
commita67b3cf1af7affcf3fc8ad775c90954aa887032c (patch)
tree43ac34bb090e3a9d39561ca9b39522fd5a54dd3f /arch/mips/mti-sead3
parentff1e29ade4c677c24ee972549d20f07e466d50bf (diff)
MIPS: Remove gic_{enable,disable}_interrupt()
Nothing calls gic_{enable,disable}_interrupt() any more. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Qais Yousef <qais.yousef@imgtec.com> Tested-by: Qais Yousef <qais.yousef@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Jeffrey Deans <jeffrey.deans@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7806/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-sead3')
-rw-r--r--arch/mips/mti-sead3/sead3-int.c34
1 files changed, 0 insertions, 34 deletions
diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c
index 6a560ac03def..9d5b5bd3a1d2 100644
--- a/arch/mips/mti-sead3/sead3-int.c
+++ b/arch/mips/mti-sead3/sead3-int.c
@@ -85,40 +85,6 @@ void __init arch_init_irq(void)
85 ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); 85 ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
86} 86}
87 87
88void gic_enable_interrupt(int irq_vec)
89{
90 unsigned int i, irq_source;
91
92 /* enable all the interrupts associated with this vector */
93 for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) {
94 irq_source = gic_shared_intr_map[irq_vec].intr_list[i];
95 GIC_SET_INTR_MASK(irq_source);
96 }
97 /* enable all local interrupts associated with this vector */
98 if (gic_shared_intr_map[irq_vec].local_intr_mask) {
99 GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0);
100 GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_SMASK),
101 gic_shared_intr_map[irq_vec].local_intr_mask);
102 }
103}
104
105void gic_disable_interrupt(int irq_vec)
106{
107 unsigned int i, irq_source;
108
109 /* disable all the interrupts associated with this vector */
110 for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) {
111 irq_source = gic_shared_intr_map[irq_vec].intr_list[i];
112 GIC_CLR_INTR_MASK(irq_source);
113 }
114 /* disable all local interrupts associated with this vector */
115 if (gic_shared_intr_map[irq_vec].local_intr_mask) {
116 GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0);
117 GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_RMASK),
118 gic_shared_intr_map[irq_vec].local_intr_mask);
119 }
120}
121
122void gic_irq_ack(struct irq_data *d) 88void gic_irq_ack(struct irq_data *d)
123{ 89{
124 GIC_CLR_INTR_MASK(d->irq - gic_irq_base); 90 GIC_CLR_INTR_MASK(d->irq - gic_irq_base);