Backmerge v4.1-rc4 into into drm-next

We picked up a silent conflict in amdkfd with drm-fixes and drm-next,
backmerge v4.1-rc5 and fix the conflicts

Signed-off-by: Dave Airlie <airlied@redhat.com>

Conflicts:
	drivers/gpu/drm/drm_irq.c

5 files changed, 23 insertions, 20 deletions

diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c
index be4899f3c393..4a4d9e067c89 100644
--- a/arch/mips/kernel/elf.c
+++ b/arch/mips/kernel/elf.c
@@ -76,14 +76,6 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
 
         /* Lets see if this is an O32 ELF */
         if (ehdr32->e_ident[EI_CLASS] == ELFCLASS32) {
-                /* FR = 1 for N32 */
-                if (ehdr32->e_flags & EF_MIPS_ABI2)
-                        state->overall_fp_mode = FP_FR1;
-                else
-                        /* Set a good default FPU mode for O32 */
-                        state->overall_fp_mode = cpu_has_mips_r6 ?
-                                FP_FRE : FP_FR0;
-
                 if (ehdr32->e_flags & EF_MIPS_FP64) {
                         /*
                          * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it
@@ -104,9 +96,6 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
                                   (char *)&abiflags,
                                   sizeof(abiflags));
         } else {
-                /* FR=1 is really the only option for 64-bit */
-                state->overall_fp_mode = FP_FR1;
-
                 if (phdr64->p_type != PT_MIPS_ABIFLAGS)
                         return 0;
                 if (phdr64->p_filesz < sizeof(abiflags))
@@ -137,6 +126,7 @@ int arch_check_elf(void *_ehdr, bool has_interpreter,
         struct elf32_hdr *ehdr = _ehdr;
         struct mode_req prog_req, interp_req;
         int fp_abi, interp_fp_abi, abi0, abi1, max_abi;
+        bool is_mips64;
 
         if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
                 return 0;
@@ -152,10 +142,22 @@ int arch_check_elf(void *_ehdr, bool has_interpreter,
                 abi0 = abi1 = fp_abi;
         }
 
-        /* ABI limits. O32 = FP_64A, N32/N64 = FP_SOFT */
-        max_abi = ((ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
-                   (!(ehdr->e_flags & EF_MIPS_ABI2))) ?
-                MIPS_ABI_FP_64A : MIPS_ABI_FP_SOFT;
+        is_mips64 = (ehdr->e_ident[EI_CLASS] == ELFCLASS64) ||
+                    (ehdr->e_flags & EF_MIPS_ABI2);
+
+        if (is_mips64) {
+                /* MIPS64 code always uses FR=1, thus the default is easy */
+                state->overall_fp_mode = FP_FR1;
+
+                /* Disallow access to the various FPXX & FP64 ABIs */
+                max_abi = MIPS_ABI_FP_SOFT;
+        } else {
+                /* Default to a mode capable of running code expecting FR=0 */
+                state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0;
+
+                /* Allow all ABIs we know about */
+                max_abi = MIPS_ABI_FP_64A;
+        }
 
         if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
             (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index d544e774eea6..e933a309f2ea 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -176,7 +176,7 @@ int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
 
         __get_user(value, data + 64);
         fcr31 = child->thread.fpu.fcr31;
-        mask = current_cpu_data.fpu_msk31;
+        mask = boot_cpu_data.fpu_msk31;
         child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
 
         /* FIR may not be written.  */
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
index 7e011f95bb8e..4251d390b5b6 100644
--- a/arch/mips/kernel/smp-cps.c
+++ b/arch/mips/kernel/smp-cps.c
@@ -92,7 +92,7 @@ static void __init cps_smp_setup(void)
 #ifdef CONFIG_MIPS_MT_FPAFF
         /* If we have an FPU, enroll ourselves in the FPU-full mask */
         if (cpu_has_fpu)
-                cpu_set(0, mt_fpu_cpumask);
+                cpumask_set_cpu(0, &mt_fpu_cpumask);
 #endif /* CONFIG_MIPS_MT_FPAFF */
 }
 
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 193ace7955fb..faa46ebd9dda 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -43,7 +43,7 @@
 #include <asm/time.h>
 #include <asm/setup.h>
 
-volatile cpumask_t cpu_callin_map;      /* Bitmask of started secondaries */
+cpumask_t cpu_callin_map;               /* Bitmask of started secondaries */
 
 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
 EXPORT_SYMBOL(__cpu_number_map);
@@ -218,8 +218,10 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
         /*
          * Trust is futile.  We should really have timeouts ...
          */
-        while (!cpumask_test_cpu(cpu, &cpu_callin_map))
+        while (!cpumask_test_cpu(cpu, &cpu_callin_map)) {
                 udelay(100);
+                schedule();
+        }
 
         synchronise_count_master(cpu);
         return 0;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index ba32e48d4697..d2d1c1933bc9 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -269,7 +269,6 @@ static void __show_regs(const struct pt_regs *regs)
          */
         printk("epc   : %0*lx %pS\n", field, regs->cp0_epc,
                (void *) regs->cp0_epc);
-        printk("    %s\n", print_tainted());
         printk("ra    : %0*lx %pS\n", field, regs->regs[31],
                (void *) regs->regs[31]);