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authorZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>2016-03-29 10:50:25 -0400
committerRalf Baechle <ralf@linux-mips.org>2016-05-13 08:01:57 -0400
commitb5a6455cde3d63466ac31bacdb42afcf30932f75 (patch)
tree992cd11b5d9330905d9a4e71cceed9345b5693f2 /arch/mips/include
parent157b9394709ed5233288986a293405def22792ed (diff)
MIPS: Detect DSP v3 support
DSPv3 is supported on all MIPSr6 systems which indicate support for DSPv2. This doesn't require any changes to the kernel's handling of DSP resources. The patch is to detect support and indicate it in /proc/cpuinfo DSP v3 introduces a new instruction BPOSGE32C Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12918/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/cpu-features.h4
-rw-r--r--arch/mips/include/asm/cpu.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 57cdc5be9545..6ff0504d090d 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -307,6 +307,10 @@
307#define cpu_has_dsp2 (cpu_data[0].ases & MIPS_ASE_DSP2P) 307#define cpu_has_dsp2 (cpu_data[0].ases & MIPS_ASE_DSP2P)
308#endif 308#endif
309 309
310#ifndef cpu_has_dsp3
311#define cpu_has_dsp3 (cpu_data[0].ases & MIPS_ASE_DSP3)
312#endif
313
310#ifndef cpu_has_mipsmt 314#ifndef cpu_has_mipsmt
311#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT) 315#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
312#endif 316#endif
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index cc579a6c8016..9127a583d1f1 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -413,5 +413,6 @@ enum cpu_type_enum {
413#define MIPS_ASE_DSP2P 0x00000040 /* Signal Processing ASE Rev 2 */ 413#define MIPS_ASE_DSP2P 0x00000040 /* Signal Processing ASE Rev 2 */
414#define MIPS_ASE_VZ 0x00000080 /* Virtualization ASE */ 414#define MIPS_ASE_VZ 0x00000080 /* Virtualization ASE */
415#define MIPS_ASE_MSA 0x00000100 /* MIPS SIMD Architecture */ 415#define MIPS_ASE_MSA 0x00000100 /* MIPS SIMD Architecture */
416#define MIPS_ASE_DSP3 0x00000200 /* Signal Processing ASE Rev 3*/
416 417
417#endif /* _ASM_CPU_H */ 418#endif /* _ASM_CPU_H */