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authorRalf Baechle <ralf@linux-mips.org>2014-05-28 13:00:14 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-05-29 09:08:23 -0400
commit2e2d663d2dd64ffe9855be0b35aa221c9b8139f2 (patch)
tree508667aa6fbab564e7875d3953671265d0176e69 /arch/mips/include/uapi/asm/inst.h
parent5ec79bf919ddb53fd98893b7217897c839aa19cc (diff)
parent322014531e1fac4674b8eef67e4f80aca1e9f003 (diff)
Merge branch 'wip-mips-pm' of https://github.com/paulburton/linux into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/uapi/asm/inst.h')
-rw-r--r--arch/mips/include/uapi/asm/inst.h26
1 files changed, 15 insertions, 11 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index fce8367da245..a1ad5516ad1f 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -76,16 +76,17 @@ enum spec2_op {
76enum spec3_op { 76enum spec3_op {
77 ext_op, dextm_op, dextu_op, dext_op, 77 ext_op, dextm_op, dextu_op, dext_op,
78 ins_op, dinsm_op, dinsu_op, dins_op, 78 ins_op, dinsm_op, dinsu_op, dins_op,
79 lx_op = 0x0a, lwle_op = 0x19, 79 yield_op = 0x09, lx_op = 0x0a,
80 lwre_op = 0x1a, cachee_op = 0x1b, 80 lwle_op = 0x19, lwre_op = 0x1a,
81 sbe_op = 0x1c, she_op = 0x1d, 81 cachee_op = 0x1b, sbe_op = 0x1c,
82 sce_op = 0x1e, swe_op = 0x1f, 82 she_op = 0x1d, sce_op = 0x1e,
83 bshfl_op = 0x20, swle_op = 0x21, 83 swe_op = 0x1f, bshfl_op = 0x20,
84 swre_op = 0x22, prefe_op = 0x23, 84 swle_op = 0x21, swre_op = 0x22,
85 dbshfl_op = 0x24, lbue_op = 0x28, 85 prefe_op = 0x23, dbshfl_op = 0x24,
86 lhue_op = 0x29, lbe_op = 0x2c, 86 lbue_op = 0x28, lhue_op = 0x29,
87 lhe_op = 0x2d, lle_op = 0x2e, 87 lbe_op = 0x2c, lhe_op = 0x2d,
88 lwe_op = 0x2f, rdhwr_op = 0x3b 88 lle_op = 0x2e, lwe_op = 0x2f,
89 rdhwr_op = 0x3b
89}; 90};
90 91
91/* 92/*
@@ -127,7 +128,8 @@ enum bcop_op {
127enum cop0_coi_func { 128enum cop0_coi_func {
128 tlbr_op = 0x01, tlbwi_op = 0x02, 129 tlbr_op = 0x01, tlbwi_op = 0x02,
129 tlbwr_op = 0x06, tlbp_op = 0x08, 130 tlbwr_op = 0x06, tlbp_op = 0x08,
130 rfe_op = 0x10, eret_op = 0x18 131 rfe_op = 0x10, eret_op = 0x18,
132 wait_op = 0x20,
131}; 133};
132 134
133/* 135/*
@@ -303,7 +305,9 @@ enum mm_32axf_minor_op {
303 mm_tlbwr_op = 0x0cd, 305 mm_tlbwr_op = 0x0cd,
304 mm_jalrs_op = 0x13c, 306 mm_jalrs_op = 0x13c,
305 mm_jalrshb_op = 0x17c, 307 mm_jalrshb_op = 0x17c,
308 mm_sync_op = 0x1ad,
306 mm_syscall_op = 0x22d, 309 mm_syscall_op = 0x22d,
310 mm_wait_op = 0x24d,
307 mm_eret_op = 0x3cd, 311 mm_eret_op = 0x3cd,
308}; 312};
309 313