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authorJames Hogan <james.hogan@imgtec.com>2016-04-19 04:24:59 -0400
committerRalf Baechle <ralf@linux-mips.org>2016-05-13 08:02:24 -0400
commit12822570a29bdc12c69fca2c021753cb5ce319c5 (patch)
treeaead49dd2e1fd3c747c05a646e4770bd0f32f1ab /arch/mips/include/asm/cpu-features.h
parentab4a92e66741b35ca12f8497896bafbe579c28a1 (diff)
MIPS: Separate XPA CPU feature into LPA and MVH
XPA (eXtended Physical Addressing) should be detected as a combination of two architectural features: - Large Physical Address (as per Config3.LPA). With XPA this will be set on MIPS32r5 cores, but it may also be set for MIPS64r2 cores too. - MTHC0/MFHC0 instructions (as per Config5.MVH). With XPA this will be set, but it may also be set in VZ guest context even when Config3.LPA in the guest context has been cleared by the hypervisor. As such, XPA is only usable if both bits are set. Update CPU features to separate these two features, with cpu_has_xpa requiring both to be set. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Maciej W. Rozycki <macro@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13112/ Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
-rw-r--r--arch/mips/include/asm/cpu-features.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index da92d513a395..bff73c52b273 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -145,8 +145,14 @@
145# endif 145# endif
146#endif 146#endif
147 147
148#ifndef cpu_has_lpa
149#define cpu_has_lpa (cpu_data[0].options & MIPS_CPU_LPA)
150#endif
151#ifndef cpu_has_mvh
152#define cpu_has_mvh (cpu_data[0].options & MIPS_CPU_MVH)
153#endif
148#ifndef cpu_has_xpa 154#ifndef cpu_has_xpa
149#define cpu_has_xpa (cpu_data[0].options & MIPS_CPU_XPA) 155#define cpu_has_xpa (cpu_has_lpa && cpu_has_mvh)
150#endif 156#endif
151#ifndef cpu_has_vtag_icache 157#ifndef cpu_has_vtag_icache
152#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) 158#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)