aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/cavium-octeon
diff options
context:
space:
mode:
authorPaul Bolle <pebolle@tiscali.nl>2014-05-20 12:16:14 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-05-23 09:12:39 -0400
commitd83d44c0e03737d201681c927d6707ae4f283720 (patch)
tree4c28af1b040eb2c0ba09665da3c1688edf4d13fd /arch/mips/cavium-octeon
parent23634fd3ae24cee64cfb0377a1cdcd595bba749d (diff)
MIPS: Octeon: Remove checks for CONFIG_CAVIUM_GDB
Three checks for CONFIG_CAVIUM_GDB were added in v2.6.29. But the Kconfig symbol CAVIUM_GDB was never added to the tree. Remove these checks. Also remove the last reference to octeon_get_boot_debug_flag(). There is no definition of that function anyway. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Tested-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>) Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r--arch/mips/cavium-octeon/setup.c11
-rw-r--r--arch/mips/cavium-octeon/smp.c17
2 files changed, 0 insertions, 28 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 953ca85f84fa..989781fbae76 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -729,17 +729,6 @@ void __init prom_init(void)
729 octeon_write_lcd("Linux"); 729 octeon_write_lcd("Linux");
730#endif 730#endif
731 731
732#ifdef CONFIG_CAVIUM_GDB
733 /*
734 * When debugging the linux kernel, force the cores to enter
735 * the debug exception handler to break in.
736 */
737 if (octeon_get_boot_debug_flag()) {
738 cvmx_write_csr(CVMX_CIU_DINT, 1 << cvmx_get_core_num());
739 cvmx_read_csr(CVMX_CIU_DINT);
740 }
741#endif
742
743 octeon_setup_delays(); 732 octeon_setup_delays();
744 733
745 /* 734 /*
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 67a078ffc464..78e1abebc854 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -218,15 +218,6 @@ void octeon_prepare_cpus(unsigned int max_cpus)
218 */ 218 */
219static void octeon_smp_finish(void) 219static void octeon_smp_finish(void)
220{ 220{
221#ifdef CONFIG_CAVIUM_GDB
222 unsigned long tmp;
223 /* Pulse MCD0 signal on Ctrl-C to stop all the cores. Also set the MCD0
224 to be not masked by this core so we know the signal is received by
225 someone */
226 asm volatile ("dmfc0 %0, $22\n"
227 "ori %0, %0, 0x9100\n" "dmtc0 %0, $22\n" : "=r" (tmp));
228#endif
229
230 octeon_user_io_init(); 221 octeon_user_io_init();
231 222
232 /* to generate the first CPU timer interrupt */ 223 /* to generate the first CPU timer interrupt */
@@ -239,14 +230,6 @@ static void octeon_smp_finish(void)
239 */ 230 */
240static void octeon_cpus_done(void) 231static void octeon_cpus_done(void)
241{ 232{
242#ifdef CONFIG_CAVIUM_GDB
243 unsigned long tmp;
244 /* Pulse MCD0 signal on Ctrl-C to stop all the cores. Also set the MCD0
245 to be not masked by this core so we know the signal is received by
246 someone */
247 asm volatile ("dmfc0 %0, $22\n"
248 "ori %0, %0, 0x9100\n" "dmtc0 %0, $22\n" : "=r" (tmp));
249#endif
250} 233}
251 234
252#ifdef CONFIG_HOTPLUG_CPU 235#ifdef CONFIG_HOTPLUG_CPU