MIPS: ath79: Add early printk support for the AR933X SoCs

The AR933X SoCs are using a different UART, thus require
different code for early printk support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2521/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 67 insertions, 9 deletions

diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c
index 7499b0e9df26..6a51ced7a293 100644
--- a/arch/mips/ath79/early_printk.c
+++ b/arch/mips/ath79/early_printk.c
@@ -1,7 +1,7 @@
 /*
- *  Atheros AR71XX/AR724X/AR913X SoC early printk support
+ *  Atheros AR7XXX/AR9XXX SoC early printk support
  *
- *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
  *  This program is free software; you can redistribute it and/or modify it
@@ -10,27 +10,85 @@
  */
 
 #include <linux/io.h>
+#include <linux/errno.h>
 #include <linux/serial_reg.h>
 #include <asm/addrspace.h>
 
+#include <asm/mach-ath79/ath79.h>
 #include <asm/mach-ath79/ar71xx_regs.h>
+#include <asm/mach-ath79/ar933x_uart.h>
 
-static inline void prom_wait_thre(void __iomem *base)
+static void (*_prom_putchar) (unsigned char);
+
+static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
 {
-        u32 lsr;
+        u32 t;
 
         do {
-                lsr = __raw_readl(base + UART_LSR * 4);
-                if (lsr & UART_LSR_THRE)
+                t = __raw_readl(reg);
+                if ((t & mask) == val)
                         break;
         } while (1);
 }
 
-void prom_putchar(unsigned char ch)
+static void prom_putchar_ar71xx(unsigned char ch)
 {
         void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
 
-        prom_wait_thre(base);
+        prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
         __raw_writel(ch, base + UART_TX * 4);
-        prom_wait_thre(base);
+        prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
+}
+
+static void prom_putchar_ar933x(unsigned char ch)
+{
+        void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));
+
+        prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
+                          AR933X_UART_DATA_TX_CSR);
+        __raw_writel(AR933X_UART_DATA_TX_CSR | ch, base + AR933X_UART_DATA_REG);
+        prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
+                          AR933X_UART_DATA_TX_CSR);
+}
+
+static void prom_putchar_dummy(unsigned char ch)
+{
+        /* nothing to do */
+}
+
+static void prom_putchar_init(void)
+{
+        void __iomem *base;
+        u32 id;
+
+        base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));
+        id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
+        id &= REV_ID_MAJOR_MASK;
+
+        switch (id) {
+        case REV_ID_MAJOR_AR71XX:
+        case REV_ID_MAJOR_AR7240:
+        case REV_ID_MAJOR_AR7241:
+        case REV_ID_MAJOR_AR7242:
+        case REV_ID_MAJOR_AR913X:
+                _prom_putchar = prom_putchar_ar71xx;
+                break;
+
+        case REV_ID_MAJOR_AR9330:
+        case REV_ID_MAJOR_AR9331:
+                _prom_putchar = prom_putchar_ar933x;
+                break;
+
+        default:
+                _prom_putchar = prom_putchar_dummy;
+                break;
+        }
+}
+
+void prom_putchar(unsigned char ch)
+{
+        if (!_prom_putchar)
+                prom_putchar_init();
+
+        _prom_putchar(ch);
 }