MIPS: improve checks for noncoherent DMA

Only one MIPS development board actually supports enabling/disabling DMA
coherency at runtime, so it's not a good idea to push the overhead of
checking that configuration setting onto every other supported target as
well.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5912/

1 files changed, 5 insertions, 1 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a7ec153be0b9..57a887334a65 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -301,7 +301,7 @@ config MIPS_MALTA
         select CEVT_R4K
         select CSRC_R4K
         select CSRC_GIC
-        select DMA_NONCOHERENT
+        select DMA_MAYBE_COHERENT
         select GENERIC_ISA_DMA
         select HAVE_PCSPKR_PLATFORM
         select IRQ_CPU
@@ -893,6 +893,10 @@ config FW_CFE
 config ARCH_DMA_ADDR_T_64BIT
         def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
 
+config DMA_MAYBE_COHERENT
+        select DMA_NONCOHERENT
+        bool
+
 config DMA_COHERENT
         bool