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authorAdam Buchbinder <adam.buchbinder@gmail.com>2016-03-04 14:20:54 -0500
committerJiri Kosina <jkosina@suse.cz>2016-04-18 06:45:54 -0400
commitcacd2c41c2349760e834f018951960da84332b56 (patch)
tree231a08965fb0826347d29100b00c2e323b81769b /arch/metag
parent45b79a291fdd209cf40dfa40f91bf9e31f949b0d (diff)
metag: Fix misspellings in comments.
Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch/metag')
-rw-r--r--arch/metag/include/asm/metag_regs.h2
-rw-r--r--arch/metag/include/asm/tbx.h6
-rw-r--r--arch/metag/tbx/tbipcx.S2
-rw-r--r--arch/metag/tbx/tbisoft.S6
4 files changed, 8 insertions, 8 deletions
diff --git a/arch/metag/include/asm/metag_regs.h b/arch/metag/include/asm/metag_regs.h
index acf4b8e6e9d1..40c3f679c5b8 100644
--- a/arch/metag/include/asm/metag_regs.h
+++ b/arch/metag/include/asm/metag_regs.h
@@ -1165,7 +1165,7 @@
1165#define TXSTATUS_IPTOGGLE_BIT 0x80000000 /* Prev PToggle of TXPRIVEXT */ 1165#define TXSTATUS_IPTOGGLE_BIT 0x80000000 /* Prev PToggle of TXPRIVEXT */
1166#define TXSTATUS_ISTATE_BIT 0x40000000 /* IState bit */ 1166#define TXSTATUS_ISTATE_BIT 0x40000000 /* IState bit */
1167#define TXSTATUS_IWAIT_BIT 0x20000000 /* wait indefinitely in decision step*/ 1167#define TXSTATUS_IWAIT_BIT 0x20000000 /* wait indefinitely in decision step*/
1168#define TXSTATUS_IEXCEPT_BIT 0x10000000 /* Indicate an exception occured */ 1168#define TXSTATUS_IEXCEPT_BIT 0x10000000 /* Indicate an exception occurred */
1169#define TXSTATUS_IRPCOUNT_BITS 0x0E000000 /* Number of 'dirty' date entries*/ 1169#define TXSTATUS_IRPCOUNT_BITS 0x0E000000 /* Number of 'dirty' date entries*/
1170#define TXSTATUS_IRPCOUNT_S 25 1170#define TXSTATUS_IRPCOUNT_S 25
1171#define TXSTATUS_IRQSTAT_BITS 0x0000F000 /* IRQEnc bits, trigger or interrupts */ 1171#define TXSTATUS_IRQSTAT_BITS 0x0000F000 /* IRQEnc bits, trigger or interrupts */
diff --git a/arch/metag/include/asm/tbx.h b/arch/metag/include/asm/tbx.h
index 703b9cb0ac5c..5cd2a6c86223 100644
--- a/arch/metag/include/asm/tbx.h
+++ b/arch/metag/include/asm/tbx.h
@@ -668,7 +668,7 @@ typedef union _tbires_tag_ {
668 668
669 State.Sig.TrigMask will indicate the bits set within TXMASKI at 669 State.Sig.TrigMask will indicate the bits set within TXMASKI at
670 the time of the handler call that have all been cleared to prevent 670 the time of the handler call that have all been cleared to prevent
671 nested interrupt occuring immediately. 671 nested interrupt occurring immediately.
672 672
673 State.Sig.SaveMask is a bit-mask which will be set to Zero when a trigger 673 State.Sig.SaveMask is a bit-mask which will be set to Zero when a trigger
674 occurs at background level and TBICTX_CRIT_BIT and optionally 674 occurs at background level and TBICTX_CRIT_BIT and optionally
@@ -1083,7 +1083,7 @@ TBIRES __TBINestInts( TBIRES State, void *pExt, int NoNestMask );
1083/* This routine causes the TBICTX structure specified in State.Sig.pCtx to 1083/* This routine causes the TBICTX structure specified in State.Sig.pCtx to
1084 be restored. This implies that execution will not return to the caller. 1084 be restored. This implies that execution will not return to the caller.
1085 The State.Sig.TrigMask field will be restored during the context switch 1085 The State.Sig.TrigMask field will be restored during the context switch
1086 such that any immediately occuring interrupts occur in the context of the 1086 such that any immediately occurring interrupts occur in the context of the
1087 newly specified task. The State.Sig.SaveMask parameter is ignored. */ 1087 newly specified task. The State.Sig.SaveMask parameter is ignored. */
1088void __TBIASyncResume( TBIRES State ); 1088void __TBIASyncResume( TBIRES State );
1089 1089
@@ -1305,7 +1305,7 @@ extern const char __TBISigNames[];
1305 1305
1306/* 1306/*
1307 * Calculate linear PC value from real PC and Minim mode control, the LSB of 1307 * Calculate linear PC value from real PC and Minim mode control, the LSB of
1308 * the result returned indicates if address compression has occured. 1308 * the result returned indicates if address compression has occurred.
1309 */ 1309 */
1310#ifndef __ASSEMBLY__ 1310#ifndef __ASSEMBLY__
1311#define METAG_LINPC( PCVal ) (\ 1311#define METAG_LINPC( PCVal ) (\
diff --git a/arch/metag/tbx/tbipcx.S b/arch/metag/tbx/tbipcx.S
index de0626fdad25..163c79ac913b 100644
--- a/arch/metag/tbx/tbipcx.S
+++ b/arch/metag/tbx/tbipcx.S
@@ -15,7 +15,7 @@
15#include <asm/tbx.h> 15#include <asm/tbx.h>
16 16
17/* BEGIN HACK */ 17/* BEGIN HACK */
18/* define these for now while doing inital conversion to GAS 18/* define these for now while doing initial conversion to GAS
19 will fix properly later */ 19 will fix properly later */
20 20
21/* Signal identifiers always have the TBID_SIGNAL_BIT set and contain the 21/* Signal identifiers always have the TBID_SIGNAL_BIT set and contain the
diff --git a/arch/metag/tbx/tbisoft.S b/arch/metag/tbx/tbisoft.S
index 0346fe8a53b1..b04f50df8d91 100644
--- a/arch/metag/tbx/tbisoft.S
+++ b/arch/metag/tbx/tbisoft.S
@@ -56,7 +56,7 @@ ___TBIJumpX:
56/* 56/*
57 * TBIRES __TBISwitch( TBIRES Switch, PTBICTX *rpSaveCtx ) 57 * TBIRES __TBISwitch( TBIRES Switch, PTBICTX *rpSaveCtx )
58 * 58 *
59 * Software syncronous context switch between soft threads, save only the 59 * Software synchronous context switch between soft threads, save only the
60 * registers which are actually valid on call entry. 60 * registers which are actually valid on call entry.
61 * 61 *
62 * A0FrP, D0RtP, D0.5, D0.6, D0.7 - Saved on stack 62 * A0FrP, D0RtP, D0.5, D0.6, D0.7 - Saved on stack
@@ -76,7 +76,7 @@ $LSwitchStart:
76 SETL [A0StP+#8++],D0FrT,D1RtP 76 SETL [A0StP+#8++],D0FrT,D1RtP
77/* 77/*
78 * Save current frame state - we save all regs because we don't want 78 * Save current frame state - we save all regs because we don't want
79 * uninitialised crap in the TBICTX structure that the asyncronous resumption 79 * uninitialised crap in the TBICTX structure that the asynchronous resumption
80 * of a thread will restore. 80 * of a thread will restore.
81 */ 81 */
82 MOVT D1Re0,#HI($LSwitchExit) /* ASync resume point here */ 82 MOVT D1Re0,#HI($LSwitchExit) /* ASync resume point here */
@@ -117,7 +117,7 @@ $LSwitchExit:
117 * This routine causes the TBICTX structure specified in State.Sig.pCtx to 117 * This routine causes the TBICTX structure specified in State.Sig.pCtx to
118 * be restored. This implies that execution will not return to the caller. 118 * be restored. This implies that execution will not return to the caller.
119 * The State.Sig.TrigMask field will be ored into TXMASKI during the 119 * The State.Sig.TrigMask field will be ored into TXMASKI during the
120 * context switch such that any immediately occuring interrupts occur in 120 * context switch such that any immediately occurring interrupts occur in
121 * the context of the newly specified task. The State.Sig.SaveMask parameter 121 * the context of the newly specified task. The State.Sig.SaveMask parameter
122 * is ignored. 122 * is ignored.
123 */ 123 */