diff options
author | Mike Frysinger <vapier@gentoo.org> | 2010-07-28 22:04:42 -0400 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2010-08-06 12:55:55 -0400 |
commit | 2b73a19f2d3391b070d9d9270a9c9d502fe357ce (patch) | |
tree | 848160deecb40270d08cf11a5739dedca043d7cd /arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h | |
parent | ba3f5973ce3eb7ef4894ccd3df78c5cb410b17cc (diff) |
Blackfin: BF54x: tweak DMAC MMR naming to match other ports
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h')
-rw-r--r-- | arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h index 32f71e6a7c15..ea3ec4ea9e2b 100644 --- a/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h +++ b/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h | |||
@@ -301,10 +301,10 @@ | |||
301 | 301 | ||
302 | /* DMAC0 Registers */ | 302 | /* DMAC0 Registers */ |
303 | 303 | ||
304 | #define bfin_read_DMAC0_TCPER() bfin_read16(DMAC0_TCPER) | 304 | #define bfin_read_DMAC0_TC_PER() bfin_read16(DMAC0_TC_PER) |
305 | #define bfin_write_DMAC0_TCPER(val) bfin_write16(DMAC0_TCPER, val) | 305 | #define bfin_write_DMAC0_TC_PER(val) bfin_write16(DMAC0_TC_PER, val) |
306 | #define bfin_read_DMAC0_TCCNT() bfin_read16(DMAC0_TCCNT) | 306 | #define bfin_read_DMAC0_TC_CNT() bfin_read16(DMAC0_TC_CNT) |
307 | #define bfin_write_DMAC0_TCCNT(val) bfin_write16(DMAC0_TCCNT, val) | 307 | #define bfin_write_DMAC0_TC_CNT(val) bfin_write16(DMAC0_TC_CNT, val) |
308 | 308 | ||
309 | /* DMA Channel 0 Registers */ | 309 | /* DMA Channel 0 Registers */ |
310 | 310 | ||
@@ -1155,10 +1155,10 @@ | |||
1155 | 1155 | ||
1156 | /* DMAC1 Registers */ | 1156 | /* DMAC1 Registers */ |
1157 | 1157 | ||
1158 | #define bfin_read_DMAC1_TCPER() bfin_read16(DMAC1_TCPER) | 1158 | #define bfin_read_DMAC1_TC_PER() bfin_read16(DMAC1_TC_PER) |
1159 | #define bfin_write_DMAC1_TCPER(val) bfin_write16(DMAC1_TCPER, val) | 1159 | #define bfin_write_DMAC1_TC_PER(val) bfin_write16(DMAC1_TC_PER, val) |
1160 | #define bfin_read_DMAC1_TCCNT() bfin_read16(DMAC1_TCCNT) | 1160 | #define bfin_read_DMAC1_TC_CNT() bfin_read16(DMAC1_TC_CNT) |
1161 | #define bfin_write_DMAC1_TCCNT(val) bfin_write16(DMAC1_TCCNT, val) | 1161 | #define bfin_write_DMAC1_TC_CNT(val) bfin_write16(DMAC1_TC_CNT, val) |
1162 | 1162 | ||
1163 | /* DMA Channel 12 Registers */ | 1163 | /* DMA Channel 12 Registers */ |
1164 | 1164 | ||