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authorRyder Lee <ryder.lee@mediatek.com>2017-08-03 23:59:35 -0400
committerMatthias Brugger <matthias.bgg@gmail.com>2017-08-14 11:17:02 -0400
commitdfff569aaf8886dcc97b145a15f2213b4a4599e6 (patch)
tree7142c2f4668e08b80949e5573a9a9600dabf4d02 /arch/arm
parent0eed8d097612578695a9c0ad5b412bf1d8702785 (diff)
arm: dts: mt7623: cleanup binding file
Dummy patch to sort nodes alphabetically and add some blank lines for consistency. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/mt7623.dtsi73
-rw-r--r--arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts57
-rw-r--r--arch/arm/boot/dts/mt7623n-rfb-nand.dts64
-rw-r--r--arch/arm/boot/dts/mt7623n-rfb.dtsi32
4 files changed, 120 insertions, 106 deletions
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 2a877ed8ff23..ec8a07415cb3 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -91,6 +91,7 @@
91 cooling-max-level = <7>; 91 cooling-max-level = <7>;
92 clock-frequency = <1300000000>; 92 clock-frequency = <1300000000>;
93 }; 93 };
94
94 cpu1: cpu@1 { 95 cpu1: cpu@1 {
95 device_type = "cpu"; 96 device_type = "cpu";
96 compatible = "arm,cortex-a7"; 97 compatible = "arm,cortex-a7";
@@ -98,6 +99,7 @@
98 operating-points-v2 = <&cpu_opp_table>; 99 operating-points-v2 = <&cpu_opp_table>;
99 clock-frequency = <1300000000>; 100 clock-frequency = <1300000000>;
100 }; 101 };
102
101 cpu2: cpu@2 { 103 cpu2: cpu@2 {
102 device_type = "cpu"; 104 device_type = "cpu";
103 compatible = "arm,cortex-a7"; 105 compatible = "arm,cortex-a7";
@@ -105,6 +107,7 @@
105 operating-points-v2 = <&cpu_opp_table>; 107 operating-points-v2 = <&cpu_opp_table>;
106 clock-frequency = <1300000000>; 108 clock-frequency = <1300000000>;
107 }; 109 };
110
108 cpu3: cpu@3 { 111 cpu3: cpu@3 {
109 device_type = "cpu"; 112 device_type = "cpu";
110 compatible = "arm,cortex-a7"; 113 compatible = "arm,cortex-a7";
@@ -172,10 +175,12 @@
172 trip = <&cpu_passive>; 175 trip = <&cpu_passive>;
173 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 176 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
174 }; 177 };
178
175 map1 { 179 map1 {
176 trip = <&cpu_active>; 180 trip = <&cpu_active>;
177 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 181 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
178 }; 182 };
183
179 map2 { 184 map2 {
180 trip = <&cpu_hot>; 185 trip = <&cpu_hot>;
181 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 186 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
@@ -481,6 +486,31 @@
481 nvmem-cell-names = "calibration-data"; 486 nvmem-cell-names = "calibration-data";
482 }; 487 };
483 488
489 nandc: nfi@1100d000 {
490 compatible = "mediatek,mt7623-nfc",
491 "mediatek,mt2701-nfc";
492 reg = <0 0x1100d000 0 0x1000>;
493 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
494 power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
495 clocks = <&pericfg CLK_PERI_NFI>,
496 <&pericfg CLK_PERI_NFI_PAD>;
497 clock-names = "nfi_clk", "pad_clk";
498 status = "disabled";
499 ecc-engine = <&bch>;
500 #address-cells = <1>;
501 #size-cells = <0>;
502 };
503
504 bch: ecc@1100e000 {
505 compatible = "mediatek,mt7623-ecc",
506 "mediatek,mt2701-ecc";
507 reg = <0 0x1100e000 0 0x1000>;
508 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
509 clocks = <&pericfg CLK_PERI_NFI_ECC>;
510 clock-names = "nfiecc_clk";
511 status = "disabled";
512 };
513
484 spi1: spi@11016000 { 514 spi1: spi@11016000 {
485 compatible = "mediatek,mt7623-spi", 515 compatible = "mediatek,mt7623-spi",
486 "mediatek,mt2701-spi"; 516 "mediatek,mt2701-spi";
@@ -509,31 +539,6 @@
509 status = "disabled"; 539 status = "disabled";
510 }; 540 };
511 541
512 nandc: nfi@1100d000 {
513 compatible = "mediatek,mt7623-nfc",
514 "mediatek,mt2701-nfc";
515 reg = <0 0x1100d000 0 0x1000>;
516 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
517 power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
518 clocks = <&pericfg CLK_PERI_NFI>,
519 <&pericfg CLK_PERI_NFI_PAD>;
520 clock-names = "nfi_clk", "pad_clk";
521 status = "disabled";
522 ecc-engine = <&bch>;
523 #address-cells = <1>;
524 #size-cells = <0>;
525 };
526
527 bch: ecc@1100e000 {
528 compatible = "mediatek,mt7623-ecc",
529 "mediatek,mt2701-ecc";
530 reg = <0 0x1100e000 0 0x1000>;
531 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
532 clocks = <&pericfg CLK_PERI_NFI_ECC>;
533 clock-names = "nfiecc_clk";
534 status = "disabled";
535 };
536
537 afe: audio-controller@11220000 { 542 afe: audio-controller@11220000 {
538 compatible = "mediatek,mt7623-audio", 543 compatible = "mediatek,mt7623-audio",
539 "mediatek,mt2701-audio"; 544 "mediatek,mt2701-audio";
@@ -655,6 +660,15 @@
655 status = "disabled"; 660 status = "disabled";
656 }; 661 };
657 662
663 hifsys: syscon@1a000000 {
664 compatible = "mediatek,mt7623-hifsys",
665 "mediatek,mt2701-hifsys",
666 "syscon";
667 reg = <0 0x1a000000 0 0x1000>;
668 #clock-cells = <1>;
669 #reset-cells = <1>;
670 };
671
658 usb1: usb@1a1c0000 { 672 usb1: usb@1a1c0000 {
659 compatible = "mediatek,mt7623-xhci", 673 compatible = "mediatek,mt7623-xhci",
660 "mediatek,mt8173-xhci"; 674 "mediatek,mt8173-xhci";
@@ -733,15 +747,6 @@
733 }; 747 };
734 }; 748 };
735 749
736 hifsys: syscon@1a000000 {
737 compatible = "mediatek,mt7623-hifsys",
738 "mediatek,mt2701-hifsys",
739 "syscon";
740 reg = <0 0x1a000000 0 0x1000>;
741 #clock-cells = <1>;
742 #reset-cells = <1>;
743 };
744
745 ethsys: syscon@1b000000 { 750 ethsys: syscon@1b000000 {
746 compatible = "mediatek,mt7623-ethsys", 751 compatible = "mediatek,mt7623-ethsys",
747 "mediatek,mt2701-ethsys", 752 "mediatek,mt2701-ethsys",
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index 444ed9318ed9..688a86378cee 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -62,9 +62,9 @@
62 pinctrl-names = "default"; 62 pinctrl-names = "default";
63 pinctrl-0 = <&led_pins_a>; 63 pinctrl-0 = <&led_pins_a>;
64 64
65 red { 65 blue {
66 label = "bpi-r2:pio:red"; 66 label = "bpi-r2:pio:blue";
67 gpios = <&pio 239 GPIO_ACTIVE_HIGH>; 67 gpios = <&pio 241 GPIO_ACTIVE_HIGH>;
68 default-state = "off"; 68 default-state = "off";
69 }; 69 };
70 70
@@ -74,9 +74,9 @@
74 default-state = "off"; 74 default-state = "off";
75 }; 75 };
76 76
77 blue { 77 red {
78 label = "bpi-r2:pio:blue"; 78 label = "bpi-r2:pio:red";
79 gpios = <&pio 241 GPIO_ACTIVE_HIGH>; 79 gpios = <&pio 239 GPIO_ACTIVE_HIGH>;
80 default-state = "off"; 80 default-state = "off";
81 }; 81 };
82 }; 82 };
@@ -98,10 +98,12 @@
98 98
99&eth { 99&eth {
100 status = "okay"; 100 status = "okay";
101
101 gmac0: mac@0 { 102 gmac0: mac@0 {
102 compatible = "mediatek,eth-mac"; 103 compatible = "mediatek,eth-mac";
103 reg = <0>; 104 reg = <0>;
104 phy-mode = "trgmii"; 105 phy-mode = "trgmii";
106
105 fixed-link { 107 fixed-link {
106 speed = <1000>; 108 speed = <1000>;
107 full-duplex; 109 full-duplex;
@@ -112,12 +114,12 @@
112 mdio: mdio-bus { 114 mdio: mdio-bus {
113 #address-cells = <1>; 115 #address-cells = <1>;
114 #size-cells = <0>; 116 #size-cells = <0>;
117
115 switch@0 { 118 switch@0 {
116 compatible = "mediatek,mt7530"; 119 compatible = "mediatek,mt7530";
117 #address-cells = <1>; 120 #address-cells = <1>;
118 #size-cells = <0>; 121 #size-cells = <0>;
119 reg = <0>; 122 reg = <0>;
120
121 pinctrl-names = "default"; 123 pinctrl-names = "default";
122 reset-gpios = <&pio 33 0>; 124 reset-gpios = <&pio 33 0>;
123 core-supply = <&mt6323_vpa_reg>; 125 core-supply = <&mt6323_vpa_reg>;
@@ -127,6 +129,7 @@
127 #address-cells = <1>; 129 #address-cells = <1>;
128 #size-cells = <0>; 130 #size-cells = <0>;
129 reg = <0>; 131 reg = <0>;
132
130 port@0 { 133 port@0 {
131 reg = <0>; 134 reg = <0>;
132 label = "wan"; 135 label = "wan";
@@ -157,6 +160,7 @@
157 label = "cpu"; 160 label = "cpu";
158 ethernet = <&gmac0>; 161 ethernet = <&gmac0>;
159 phy-mode = "trgmii"; 162 phy-mode = "trgmii";
163
160 fixed-link { 164 fixed-link {
161 speed = <1000>; 165 speed = <1000>;
162 full-duplex; 166 full-duplex;
@@ -372,16 +376,6 @@
372 }; 376 };
373 }; 377 };
374 378
375 spi0_pins_a: spi@0 {
376 pins_spi {
377 pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
378 <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
379 <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
380 <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
381 bias-disable;
382 };
383 };
384
385 pwm_pins_a: pwm@0 { 379 pwm_pins_a: pwm@0 {
386 pins_pwm { 380 pins_pwm {
387 pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>, 381 pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
@@ -392,6 +386,16 @@
392 }; 386 };
393 }; 387 };
394 388
389 spi0_pins_a: spi@0 {
390 pins_spi {
391 pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
392 <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
393 <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
394 <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
395 bias-disable;
396 };
397 };
398
395 uart0_pins_a: uart@0 { 399 uart0_pins_a: uart@0 {
396 pins_dat { 400 pins_dat {
397 pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>, 401 pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
@@ -425,11 +429,13 @@
425 label = "bpi-r2:isink:green"; 429 label = "bpi-r2:isink:green";
426 default-state = "off"; 430 default-state = "off";
427 }; 431 };
432
428 led@1 { 433 led@1 {
429 reg = <1>; 434 reg = <1>;
430 label = "bpi-r2:isink:red"; 435 label = "bpi-r2:isink:red";
431 default-state = "off"; 436 default-state = "off";
432 }; 437 };
438
433 led@2 { 439 led@2 {
434 reg = <2>; 440 reg = <2>;
435 label = "bpi-r2:isink:blue"; 441 label = "bpi-r2:isink:blue";
@@ -451,14 +457,6 @@
451 status = "disabled"; 457 status = "disabled";
452}; 458};
453 459
454&u3phy1 {
455 status = "okay";
456};
457
458&u3phy2 {
459 status = "okay";
460};
461
462&uart1 { 460&uart1 {
463 pinctrl-names = "default"; 461 pinctrl-names = "default";
464 pinctrl-0 = <&uart1_pins_a>; 462 pinctrl-0 = <&uart1_pins_a>;
@@ -478,3 +476,12 @@
478 vusb33-supply = <&mt6323_vusb_reg>; 476 vusb33-supply = <&mt6323_vusb_reg>;
479 status = "okay"; 477 status = "okay";
480}; 478};
479
480&u3phy1 {
481 status = "okay";
482};
483
484&u3phy2 {
485 status = "okay";
486};
487
diff --git a/arch/arm/boot/dts/mt7623n-rfb-nand.dts b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
index 63ffb7862a56..17c578f0d261 100644
--- a/arch/arm/boot/dts/mt7623n-rfb-nand.dts
+++ b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
@@ -20,47 +20,22 @@
20 compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623"; 20 compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623";
21}; 21};
22 22
23&pio { 23&bch {
24 nand_pins_default: nanddefault { 24 status = "okay";
25 pins_dat {
26 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
27 <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
28 <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
29 <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
30 <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
31 <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
32 <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
33 <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
34 <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
35 input-enable;
36 drive-strength = <MTK_DRIVE_8mA>;
37 bias-pull-up;
38 };
39
40 pins_we {
41 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
42 drive-strength = <MTK_DRIVE_8mA>;
43 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
44 };
45
46 pins_ale {
47 pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
48 drive-strength = <MTK_DRIVE_8mA>;
49 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
50 };
51 };
52}; 25};
53 26
54&nandc { 27&nandc {
55 status = "okay"; 28 status = "okay";
56 pinctrl-names = "default"; 29 pinctrl-names = "default";
57 pinctrl-0 = <&nand_pins_default>; 30 pinctrl-0 = <&nand_pins_default>;
31
58 nand@0 { 32 nand@0 {
59 reg = <0>; 33 reg = <0>;
60 spare_per_sector = <64>; 34 spare_per_sector = <64>;
61 nand-ecc-mode = "hw"; 35 nand-ecc-mode = "hw";
62 nand-ecc-strength = <12>; 36 nand-ecc-strength = <12>;
63 nand-ecc-step-size = <1024>; 37 nand-ecc-step-size = <1024>;
38
64 partitions { 39 partitions {
65 compatible = "fixed-partitions"; 40 compatible = "fixed-partitions";
66 #address-cells = <1>; 41 #address-cells = <1>;
@@ -104,6 +79,33 @@
104 }; 79 };
105}; 80};
106 81
107&bch { 82&pio {
108 status = "okay"; 83 nand_pins_default: nanddefault {
84 pins_ale {
85 pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
86 drive-strength = <MTK_DRIVE_8mA>;
87 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
88 };
89
90 pins_dat {
91 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
92 <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
93 <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
94 <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
95 <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
96 <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
97 <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
98 <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
99 <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
100 input-enable;
101 drive-strength = <MTK_DRIVE_8mA>;
102 bias-pull-up;
103 };
104
105 pins_we {
106 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
107 drive-strength = <MTK_DRIVE_8mA>;
108 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
109 };
110 };
109}; 111};
diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
index 1e9579090629..256c5fd947bf 100644
--- a/arch/arm/boot/dts/mt7623n-rfb.dtsi
+++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
@@ -18,6 +18,12 @@
18#include "mt6323.dtsi" 18#include "mt6323.dtsi"
19 19
20/ { 20/ {
21 aliases {
22 serial0 = &uart0;
23 serial1 = &uart1;
24 serial2 = &uart2;
25 };
26
21 chosen { 27 chosen {
22 stdout-path = "serial2:115200n8"; 28 stdout-path = "serial2:115200n8";
23 }; 29 };
@@ -44,12 +50,6 @@
44 reg = <0 0x80000000 0 0x40000000>; 50 reg = <0 0x80000000 0 0x40000000>;
45 }; 51 };
46 52
47 aliases {
48 serial0 = &uart0;
49 serial1 = &uart1;
50 serial2 = &uart2;
51 };
52
53 usb_p1_vbus: regulator@0 { 53 usb_p1_vbus: regulator@0 {
54 compatible = "regulator-fixed"; 54 compatible = "regulator-fixed";
55 regulator-name = "usb_vbus"; 55 regulator-name = "usb_vbus";
@@ -60,6 +60,16 @@
60 }; 60 };
61}; 61};
62 62
63&mmc0 {
64 vmmc-supply = <&mt6323_vemc3v3_reg>;
65 vqmmc-supply = <&mt6323_vio18_reg>;
66};
67
68&mmc1 {
69 vmmc-supply = <&mt6323_vmch_reg>;
70 vqmmc-supply = <&mt6323_vmc_reg>;
71};
72
63&uart0 { 73&uart0 {
64 status = "okay"; 74 status = "okay";
65}; 75};
@@ -72,16 +82,6 @@
72 status = "okay"; 82 status = "okay";
73}; 83};
74 84
75&mmc0 {
76 vmmc-supply = <&mt6323_vemc3v3_reg>;
77 vqmmc-supply = <&mt6323_vio18_reg>;
78};
79
80&mmc1 {
81 vmmc-supply = <&mt6323_vmch_reg>;
82 vqmmc-supply = <&mt6323_vmc_reg>;
83};
84
85&usb1 { 85&usb1 {
86 vbus-supply = <&usb_p1_vbus>; 86 vbus-supply = <&usb_p1_vbus>;
87 status = "okay"; 87 status = "okay";