aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2012-04-30 17:49:49 -0400
committerArnd Bergmann <arnd@arndb.de>2012-04-30 17:53:58 -0400
commitca731a5da08926f669360342bcad50353fbe141a (patch)
tree670a546ca3accd4647d46a6b5c90a6b067fb7a0a /arch/arm
parent989b7135666c464d90e296752802b2f37d168588 (diff)
parentc0af14d3212a54c6a11759cd6b78e755c68714a1 (diff)
Merge branch 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/gpio
Linus Walleij <linus.walleij@linaro.org> writes: This is a pull request for the GPIO and pin control stuff accumulated in the ST-Ericsson tree. Here we have: - Improvements and fixes and a custom pin config API from Rabin Vincent - Device Tree bindings from Lee Jones - Some accumulated patches by yours truly. - A MSP platform data init patch from Ola Lilja that is merged here due to dependency on pin config work. It is to be used with work being worked on in parallel in the ALSA SoC subsystem. If you wonder about the custom pin config implementation this is to be used as a transition base as I am rewriting the driver to use pinctrl. Expect a final pull request on top of this one that will move the ux500 over to pinctrl. * 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: Add support for MSP I2S-devices drivers/gpio: gpio-nomadik: Add support for irqdomains drivers/gpio: gpio-nomadik: Apply Device Tree bindings ARM: ux500: update pin handling ARM: ux500: implement pin API ARM: ux500: remove a bunch of internal pull-ups plat-nomadik: new sleep mode pincfg macros gpio/nomadik: use ioremap() instead of static mappings gpio/nomadik: support low EMI mode gpio/nomadik: fix spurious interrupts with SKE gpio/nomadik: cache [rf]w?imsc gpio/nomadik: don't set SLPM to 1 for non-wakeup pins Also includes an update to v3.4-rc4. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/u8500_defconfig9
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c1
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c5
-rw-r--r--arch/arm/mach-at91/clock.c1
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h2
-rw-r--r--arch/arm/mach-at91/setup.c2
-rw-r--r--arch/arm/mach-bcmring/core.c4
-rw-r--r--arch/arm/mach-imx/imx27-dt.c6
-rw-r--r--arch/arm/mach-imx/mm-imx5.c2
-rw-r--r--arch/arm/mach-omap1/mux.c1
-rw-r--r--arch/arm/mach-omap1/timer.c4
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c12
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c13
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c17
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c9
-rw-r--r--arch/arm/mach-omap2/serial.c124
-rw-r--r--arch/arm/mach-omap2/twl-common.c37
-rw-r--r--arch/arm/mach-omap2/twl-common.h10
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mach-ux500/Makefile5
-rw-r--r--arch/arm/mach-ux500/board-mop500-msp.c250
-rw-r--r--arch/arm/mach-ux500/board-mop500-msp.h14
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c394
-rw-r--r--arch/arm/mach-ux500/board-mop500.c16
-rw-r--r--arch/arm/mach-ux500/board-mop500.h4
-rw-r--r--arch/arm/mach-ux500/clock.c8
-rw-r--r--arch/arm/mach-ux500/cpu.c12
-rw-r--r--arch/arm/mach-ux500/devices-db8500.h10
-rw-r--r--arch/arm/mach-ux500/include/mach/msp.h29
-rw-r--r--arch/arm/mach-ux500/pins-db8500.h72
-rw-r--r--arch/arm/mach-ux500/pins.c88
-rw-r--r--arch/arm/mach-ux500/pins.h46
-rw-r--r--arch/arm/mach-ux500/platsmp.c2
-rw-r--r--arch/arm/plat-nomadik/include/plat/gpio-nomadik.h1
-rw-r--r--arch/arm/plat-nomadik/include/plat/pincfg.h19
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h4
-rw-r--r--arch/arm/plat-omap/sram.c12
44 files changed, 937 insertions, 319 deletions
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index b5ac644e12af..6b31cb60daab 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -112,6 +112,7 @@ CONFIG_WATCHDOG=y
112CONFIG_IMX2_WDT=y 112CONFIG_IMX2_WDT=y
113CONFIG_MFD_MC13XXX=y 113CONFIG_MFD_MC13XXX=y
114CONFIG_REGULATOR=y 114CONFIG_REGULATOR=y
115CONFIG_REGULATOR_FIXED_VOLTAGE=y
115CONFIG_REGULATOR_MC13783=y 116CONFIG_REGULATOR_MC13783=y
116CONFIG_REGULATOR_MC13892=y 117CONFIG_REGULATOR_MC13892=y
117CONFIG_FB=y 118CONFIG_FB=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 889d73ac1ae1..7e84f453e8a6 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -8,8 +8,6 @@ CONFIG_MODULE_UNLOAD=y
8# CONFIG_LBDAF is not set 8# CONFIG_LBDAF is not set
9# CONFIG_BLK_DEV_BSG is not set 9# CONFIG_BLK_DEV_BSG is not set
10CONFIG_ARCH_U8500=y 10CONFIG_ARCH_U8500=y
11CONFIG_UX500_SOC_DB5500=y
12CONFIG_UX500_SOC_DB8500=y
13CONFIG_MACH_HREFV60=y 11CONFIG_MACH_HREFV60=y
14CONFIG_MACH_SNOWBALL=y 12CONFIG_MACH_SNOWBALL=y
15CONFIG_MACH_U5500=y 13CONFIG_MACH_U5500=y
@@ -39,7 +37,6 @@ CONFIG_CAIF=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 37CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40CONFIG_BLK_DEV_RAM=y 38CONFIG_BLK_DEV_RAM=y
41CONFIG_BLK_DEV_RAM_SIZE=65536 39CONFIG_BLK_DEV_RAM_SIZE=65536
42CONFIG_MISC_DEVICES=y
43CONFIG_AB8500_PWM=y 40CONFIG_AB8500_PWM=y
44CONFIG_SENSORS_BH1780=y 41CONFIG_SENSORS_BH1780=y
45CONFIG_NETDEVICES=y 42CONFIG_NETDEVICES=y
@@ -65,16 +62,18 @@ CONFIG_SERIAL_AMBA_PL011=y
65CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 62CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
66CONFIG_HW_RANDOM=y 63CONFIG_HW_RANDOM=y
67CONFIG_HW_RANDOM_NOMADIK=y 64CONFIG_HW_RANDOM_NOMADIK=y
68CONFIG_I2C=y
69CONFIG_I2C_NOMADIK=y
70CONFIG_SPI=y 65CONFIG_SPI=y
71CONFIG_SPI_PL022=y 66CONFIG_SPI_PL022=y
72CONFIG_GPIO_STMPE=y 67CONFIG_GPIO_STMPE=y
73CONFIG_GPIO_TC3589X=y 68CONFIG_GPIO_TC3589X=y
69CONFIG_POWER_SUPPLY=y
70CONFIG_AB8500_BM=y
71CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y
74CONFIG_MFD_STMPE=y 72CONFIG_MFD_STMPE=y
75CONFIG_MFD_TC3589X=y 73CONFIG_MFD_TC3589X=y
76CONFIG_AB5500_CORE=y 74CONFIG_AB5500_CORE=y
77CONFIG_AB8500_CORE=y 75CONFIG_AB8500_CORE=y
76CONFIG_REGULATOR=y
78CONFIG_REGULATOR_AB8500=y 77CONFIG_REGULATOR_AB8500=y
79# CONFIG_HID_SUPPORT is not set 78# CONFIG_HID_SUPPORT is not set
80CONFIG_USB_GADGET=y 79CONFIG_USB_GADGET=y
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 99ce5c955e39..05774e5b1cba 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1173,7 +1173,6 @@ void __init at91_add_device_serial(void)
1173 printk(KERN_INFO "AT91: No default serial console defined.\n"); 1173 printk(KERN_INFO "AT91: No default serial console defined.\n");
1174} 1174}
1175#else 1175#else
1176void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1177void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} 1176void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1178void __init at91_set_serial_console(unsigned portnr) {} 1177void __init at91_set_serial_console(unsigned portnr) {}
1179void __init at91_add_device_serial(void) {} 1178void __init at91_add_device_serial(void) {}
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index dd7f782b0b91..104ca40d8d18 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/clockchips.h> 25#include <linux/clockchips.h>
26#include <linux/export.h>
26 27
27#include <asm/mach/time.h> 28#include <asm/mach/time.h>
28 29
@@ -176,6 +177,7 @@ static struct clock_event_device clkevt = {
176}; 177};
177 178
178void __iomem *at91_st_base; 179void __iomem *at91_st_base;
180EXPORT_SYMBOL_GPL(at91_st_base);
179 181
180void __init at91rm9200_ioremap_st(u32 addr) 182void __init at91rm9200_ioremap_st(u32 addr)
181{ 183{
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 11cbaa8946fe..b2e4fe21f346 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -117,7 +117,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
117}; 117};
118 118
119#define EK_FLASH_BASE AT91_CHIPSELECT_0 119#define EK_FLASH_BASE AT91_CHIPSELECT_0
120#define EK_FLASH_SIZE SZ_2M 120#define EK_FLASH_SIZE SZ_8M
121 121
122static struct physmap_flash_data ek_flash_data = { 122static struct physmap_flash_data ek_flash_data = {
123 .width = 2, 123 .width = 2,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index c3f994462864..065fed342424 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -85,8 +85,6 @@ static struct resource dm9000_resource[] = {
85 .flags = IORESOURCE_MEM 85 .flags = IORESOURCE_MEM
86 }, 86 },
87 [2] = { 87 [2] = {
88 .start = AT91_PIN_PC11,
89 .end = AT91_PIN_PC11,
90 .flags = IORESOURCE_IRQ 88 .flags = IORESOURCE_IRQ
91 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE, 89 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
92 } 90 }
@@ -130,6 +128,8 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
130 128
131static void __init ek_add_device_dm9000(void) 129static void __init ek_add_device_dm9000(void)
132{ 130{
131 struct resource *r = &dm9000_resource[2];
132
133 /* Configure chip-select 2 (DM9000) */ 133 /* Configure chip-select 2 (DM9000) */
134 sam9_smc_configure(0, 2, &dm9000_smc_config); 134 sam9_smc_configure(0, 2, &dm9000_smc_config);
135 135
@@ -139,6 +139,7 @@ static void __init ek_add_device_dm9000(void)
139 /* Configure Interrupt pin as input, no pull-up */ 139 /* Configure Interrupt pin as input, no pull-up */
140 at91_set_gpio_input(AT91_PIN_PC11, 0); 140 at91_set_gpio_input(AT91_PIN_PC11, 0);
141 141
142 r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
142 platform_device_register(&dm9000_device); 143 platform_device_register(&dm9000_device);
143} 144}
144#else 145#else
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index a0f4d7424cdc..6b692824c988 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -35,6 +35,7 @@
35#include "generic.h" 35#include "generic.h"
36 36
37void __iomem *at91_pmc_base; 37void __iomem *at91_pmc_base;
38EXPORT_SYMBOL_GPL(at91_pmc_base);
38 39
39/* 40/*
40 * There's a lot more which can be done with clocks, including cpufreq 41 * There's a lot more which can be done with clocks, including cpufreq
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 36604782a78f..ea2c57a86ca6 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -25,7 +25,7 @@ extern void __iomem *at91_pmc_base;
25#define at91_pmc_write(field, value) \ 25#define at91_pmc_write(field, value) \
26 __raw_writel(value, at91_pmc_base + field) 26 __raw_writel(value, at91_pmc_base + field)
27#else 27#else
28.extern at91_aic_base 28.extern at91_pmc_base
29#endif 29#endif
30 30
31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ 31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 97cc04dc8073..f44a2e7272e3 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -54,6 +54,7 @@ void __init at91_init_interrupts(unsigned int *priority)
54} 54}
55 55
56void __iomem *at91_ramc_base[2]; 56void __iomem *at91_ramc_base[2];
57EXPORT_SYMBOL_GPL(at91_ramc_base);
57 58
58void __init at91_ioremap_ramc(int id, u32 addr, u32 size) 59void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
59{ 60{
@@ -292,6 +293,7 @@ void __init at91_ioremap_rstc(u32 base_addr)
292} 293}
293 294
294void __iomem *at91_matrix_base; 295void __iomem *at91_matrix_base;
296EXPORT_SYMBOL_GPL(at91_matrix_base);
295 297
296void __init at91_ioremap_matrix(u32 base_addr) 298void __init at91_ioremap_matrix(u32 base_addr)
297{ 299{
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 22e4e0a28ad1..adbfb1994582 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -52,8 +52,8 @@
52#include <mach/csp/chipcHw_inline.h> 52#include <mach/csp/chipcHw_inline.h>
53#include <mach/csp/tmrHw_reg.h> 53#include <mach/csp/tmrHw_reg.h>
54 54
55static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); 55static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL);
56static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); 56static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL);
57 57
58static struct clk pll1_clk = { 58static struct clk pll1_clk = {
59 .name = "PLL1", 59 .name = "PLL1",
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index 861ceb8232d6..ed38d03c61f2 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -35,7 +35,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
35static int __init imx27_avic_add_irq_domain(struct device_node *np, 35static int __init imx27_avic_add_irq_domain(struct device_node *np,
36 struct device_node *interrupt_parent) 36 struct device_node *interrupt_parent)
37{ 37{
38 irq_domain_add_simple(np, 0); 38 irq_domain_add_legacy(np, 64, 0, 0, &irq_domain_simple_ops, NULL);
39 return 0; 39 return 0;
40} 40}
41 41
@@ -44,7 +44,9 @@ static int __init imx27_gpio_add_irq_domain(struct device_node *np,
44{ 44{
45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
46 46
47 irq_domain_add_simple(np, gpio_irq_base); 47 gpio_irq_base -= 32;
48 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
49 NULL);
48 50
49 return 0; 51 return 0;
50} 52}
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 05250aed61fb..e10f3914fcfe 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -35,7 +35,7 @@ static void imx5_idle(void)
35 } 35 }
36 clk_enable(gpc_dvfs_clk); 36 clk_enable(gpc_dvfs_clk);
37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); 37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
38 if (tzic_enable_wake() != 0) 38 if (!tzic_enable_wake())
39 cpu_do_idle(); 39 cpu_do_idle();
40 clk_disable(gpc_dvfs_clk); 40 clk_disable(gpc_dvfs_clk);
41} 41}
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 087dba0df47e..e9cc52d4cb28 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -27,6 +27,7 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29 29
30#include <mach/hardware.h>
30 31
31#include <plat/mux.h> 32#include <plat/mux.h>
32 33
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
index 6e90665a7c47..fb202af01d0d 100644
--- a/arch/arm/mach-omap1/timer.c
+++ b/arch/arm/mach-omap1/timer.c
@@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev,
47 int n = (pdev->id - 1) << 1; 47 int n = (pdev->id - 1) << 1;
48 u32 l; 48 u32 l;
49 49
50 l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); 50 l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
51 l |= source << n; 51 l |= source << n;
52 __raw_writel(l, MOD_CONF_CTRL_1); 52 omap_writel(l, MOD_CONF_CTRL_1);
53 53
54 return 0; 54 return 0;
55} 55}
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index a39fc4bbd2b8..130ab00c09a2 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -20,6 +20,7 @@
20#include <linux/usb/otg.h> 20#include <linux/usb/otg.h>
21#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
22#include <linux/i2c/twl.h> 22#include <linux/i2c/twl.h>
23#include <linux/mfd/twl6040.h>
23#include <linux/gpio_keys.h> 24#include <linux/gpio_keys.h>
24#include <linux/regulator/machine.h> 25#include <linux/regulator/machine.h>
25#include <linux/regulator/fixed.h> 26#include <linux/regulator/fixed.h>
@@ -560,7 +561,7 @@ static struct regulator_init_data sdp4430_vusim = {
560 }, 561 },
561}; 562};
562 563
563static struct twl4030_codec_data twl6040_codec = { 564static struct twl6040_codec_data twl6040_codec = {
564 /* single-step ramp for headset and handsfree */ 565 /* single-step ramp for headset and handsfree */
565 .hs_left_step = 0x0f, 566 .hs_left_step = 0x0f,
566 .hs_right_step = 0x0f, 567 .hs_right_step = 0x0f,
@@ -568,7 +569,7 @@ static struct twl4030_codec_data twl6040_codec = {
568 .hf_right_step = 0x1d, 569 .hf_right_step = 0x1d,
569}; 570};
570 571
571static struct twl4030_vibra_data twl6040_vibra = { 572static struct twl6040_vibra_data twl6040_vibra = {
572 .vibldrv_res = 8, 573 .vibldrv_res = 8,
573 .vibrdrv_res = 3, 574 .vibrdrv_res = 3,
574 .viblmotor_res = 10, 575 .viblmotor_res = 10,
@@ -577,16 +578,14 @@ static struct twl4030_vibra_data twl6040_vibra = {
577 .vddvibr_uV = 0, /* fixed volt supply - VBAT */ 578 .vddvibr_uV = 0, /* fixed volt supply - VBAT */
578}; 579};
579 580
580static struct twl4030_audio_data twl6040_audio = { 581static struct twl6040_platform_data twl6040_data = {
581 .codec = &twl6040_codec, 582 .codec = &twl6040_codec,
582 .vibra = &twl6040_vibra, 583 .vibra = &twl6040_vibra,
583 .audpwron_gpio = 127, 584 .audpwron_gpio = 127,
584 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
585 .irq_base = TWL6040_CODEC_IRQ_BASE, 585 .irq_base = TWL6040_CODEC_IRQ_BASE,
586}; 586};
587 587
588static struct twl4030_platform_data sdp4430_twldata = { 588static struct twl4030_platform_data sdp4430_twldata = {
589 .audio = &twl6040_audio,
590 /* Regulators */ 589 /* Regulators */
591 .vusim = &sdp4430_vusim, 590 .vusim = &sdp4430_vusim,
592 .vaux1 = &sdp4430_vaux1, 591 .vaux1 = &sdp4430_vaux1,
@@ -617,7 +616,8 @@ static int __init omap4_i2c_init(void)
617 TWL_COMMON_REGULATOR_VCXIO | 616 TWL_COMMON_REGULATOR_VCXIO |
618 TWL_COMMON_REGULATOR_VUSB | 617 TWL_COMMON_REGULATOR_VUSB |
619 TWL_COMMON_REGULATOR_CLK32KG); 618 TWL_COMMON_REGULATOR_CLK32KG);
620 omap4_pmic_init("twl6030", &sdp4430_twldata); 619 omap4_pmic_init("twl6030", &sdp4430_twldata,
620 &twl6040_data, OMAP44XX_IRQ_SYS_2N);
621 omap_register_i2c_bus(2, 400, NULL, 0); 621 omap_register_i2c_bus(2, 400, NULL, 0);
622 omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, 622 omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
623 ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); 623 ARRAY_SIZE(sdp4430_i2c_3_boardinfo));
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 74e1687b5170..098d183a0086 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -137,7 +137,7 @@ static struct twl4030_platform_data sdp4430_twldata = {
137 137
138static void __init omap4_i2c_init(void) 138static void __init omap4_i2c_init(void)
139{ 139{
140 omap4_pmic_init("twl6030", &sdp4430_twldata); 140 omap4_pmic_init("twl6030", &sdp4430_twldata, NULL, 0);
141} 141}
142 142
143static void __init omap4_init(void) 143static void __init omap4_init(void)
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index d8c0e89f0126..1b782ba53433 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -25,6 +25,7 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/usb/otg.h> 26#include <linux/usb/otg.h>
27#include <linux/i2c/twl.h> 27#include <linux/i2c/twl.h>
28#include <linux/mfd/twl6040.h>
28#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
29#include <linux/regulator/fixed.h> 30#include <linux/regulator/fixed.h>
30#include <linux/wl12xx.h> 31#include <linux/wl12xx.h>
@@ -284,7 +285,7 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
284 return 0; 285 return 0;
285} 286}
286 287
287static struct twl4030_codec_data twl6040_codec = { 288static struct twl6040_codec_data twl6040_codec = {
288 /* single-step ramp for headset and handsfree */ 289 /* single-step ramp for headset and handsfree */
289 .hs_left_step = 0x0f, 290 .hs_left_step = 0x0f,
290 .hs_right_step = 0x0f, 291 .hs_right_step = 0x0f,
@@ -292,17 +293,14 @@ static struct twl4030_codec_data twl6040_codec = {
292 .hf_right_step = 0x1d, 293 .hf_right_step = 0x1d,
293}; 294};
294 295
295static struct twl4030_audio_data twl6040_audio = { 296static struct twl6040_platform_data twl6040_data = {
296 .codec = &twl6040_codec, 297 .codec = &twl6040_codec,
297 .audpwron_gpio = 127, 298 .audpwron_gpio = 127,
298 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
299 .irq_base = TWL6040_CODEC_IRQ_BASE, 299 .irq_base = TWL6040_CODEC_IRQ_BASE,
300}; 300};
301 301
302/* Panda board uses the common PMIC configuration */ 302/* Panda board uses the common PMIC configuration */
303static struct twl4030_platform_data omap4_panda_twldata = { 303static struct twl4030_platform_data omap4_panda_twldata;
304 .audio = &twl6040_audio,
305};
306 304
307/* 305/*
308 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM 306 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
@@ -326,7 +324,8 @@ static int __init omap4_panda_i2c_init(void)
326 TWL_COMMON_REGULATOR_VCXIO | 324 TWL_COMMON_REGULATOR_VCXIO |
327 TWL_COMMON_REGULATOR_VUSB | 325 TWL_COMMON_REGULATOR_VUSB |
328 TWL_COMMON_REGULATOR_CLK32KG); 326 TWL_COMMON_REGULATOR_CLK32KG);
329 omap4_pmic_init("twl6030", &omap4_panda_twldata); 327 omap4_pmic_init("twl6030", &omap4_panda_twldata,
328 &twl6040_data, OMAP44XX_IRQ_SYS_2N);
330 omap_register_i2c_bus(2, 400, NULL, 0); 329 omap_register_i2c_bus(2, 400, NULL, 0);
331 /* 330 /*
332 * Bus 3 is attached to the DVI port where devices like the pico DLP 331 * Bus 3 is attached to the DVI port where devices like the pico DLP
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 2c27fdb61e66..7144ae651d3d 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1422,6 +1422,9 @@ static int _ocp_softreset(struct omap_hwmod *oh)
1422 goto dis_opt_clks; 1422 goto dis_opt_clks;
1423 _write_sysconfig(v, oh); 1423 _write_sysconfig(v, oh);
1424 1424
1425 if (oh->class->sysc->srst_udelay)
1426 udelay(oh->class->sysc->srst_udelay);
1427
1425 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 1428 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1426 omap_test_timeout((omap_hwmod_read(oh, 1429 omap_test_timeout((omap_hwmod_read(oh,
1427 oh->class->sysc->syss_offs) 1430 oh->class->sysc->syss_offs)
@@ -1903,10 +1906,20 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1903 */ 1906 */
1904int omap_hwmod_softreset(struct omap_hwmod *oh) 1907int omap_hwmod_softreset(struct omap_hwmod *oh)
1905{ 1908{
1906 if (!oh) 1909 u32 v;
1910 int ret;
1911
1912 if (!oh || !(oh->_sysc_cache))
1907 return -EINVAL; 1913 return -EINVAL;
1908 1914
1909 return _ocp_softreset(oh); 1915 v = oh->_sysc_cache;
1916 ret = _set_softreset(oh, &v);
1917 if (ret)
1918 goto error;
1919 _write_sysconfig(v, oh);
1920
1921error:
1922 return ret;
1910} 1923}
1911 1924
1912/** 1925/**
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a5409ce3f323..a6bde34e443a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
1000 .flags = OMAP_FIREWALL_L4, 1000 .flags = OMAP_FIREWALL_L4,
1001 } 1001 }
1002 }, 1002 },
1003 .flags = OCPIF_SWSUP_IDLE,
1004 .user = OCP_USER_MPU | OCP_USER_SDMA, 1003 .user = OCP_USER_MPU | OCP_USER_SDMA,
1005}; 1004};
1006 1005
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c4f56cb60d7d..04a3885f4475 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1049 .slave = &omap2430_dss_venc_hwmod, 1049 .slave = &omap2430_dss_venc_hwmod,
1050 .clk = "dss_ick", 1050 .clk = "dss_ick",
1051 .addr = omap2_dss_venc_addrs, 1051 .addr = omap2_dss_venc_addrs,
1052 .flags = OCPIF_SWSUP_IDLE,
1053 .user = OCP_USER_MPU | OCP_USER_SDMA, 1052 .user = OCP_USER_MPU | OCP_USER_SDMA,
1054}; 1053};
1055 1054
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 34b9766d1d23..db86ce90c69f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1676 .flags = OMAP_FIREWALL_L4, 1676 .flags = OMAP_FIREWALL_L4,
1677 } 1677 }
1678 }, 1678 },
1679 .flags = OCPIF_SWSUP_IDLE,
1680 .user = OCP_USER_MPU | OCP_USER_SDMA, 1679 .user = OCP_USER_MPU | OCP_USER_SDMA,
1681}; 1680};
1682 1681
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index cc9bd106a854..6abc75753e42 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
2594static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { 2594static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
2595 .rev_offs = 0x0000, 2595 .rev_offs = 0x0000,
2596 .sysc_offs = 0x0010, 2596 .sysc_offs = 0x0010,
2597 /*
2598 * ISS needs 100 OCP clk cycles delay after a softreset before
2599 * accessing sysconfig again.
2600 * The lowest frequency at the moment for L3 bus is 100 MHz, so
2601 * 1usec delay is needed. Add an x2 margin to be safe (2 usecs).
2602 *
2603 * TODO: Indicate errata when available.
2604 */
2605 .srst_udelay = 2,
2597 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | 2606 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
2598 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), 2607 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
2599 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 2608 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0cdd359a128e..9fc2f44188cb 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
108static void omap_uart_set_smartidle(struct platform_device *pdev) 108static void omap_uart_set_smartidle(struct platform_device *pdev)
109{ 109{
110 struct omap_device *od = to_omap_device(pdev); 110 struct omap_device *od = to_omap_device(pdev);
111 u8 idlemode;
111 112
112 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); 113 if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
114 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
115 else
116 idlemode = HWMOD_IDLEMODE_SMART;
117
118 omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
113} 119}
114 120
115#else 121#else
@@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
120#endif /* CONFIG_PM */ 126#endif /* CONFIG_PM */
121 127
122#ifdef CONFIG_OMAP_MUX 128#ifdef CONFIG_OMAP_MUX
123static struct omap_device_pad default_uart1_pads[] __initdata = {
124 {
125 .name = "uart1_cts.uart1_cts",
126 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
127 },
128 {
129 .name = "uart1_rts.uart1_rts",
130 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
131 },
132 {
133 .name = "uart1_tx.uart1_tx",
134 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
135 },
136 {
137 .name = "uart1_rx.uart1_rx",
138 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
139 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
140 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
141 },
142};
143
144static struct omap_device_pad default_uart2_pads[] __initdata = {
145 {
146 .name = "uart2_cts.uart2_cts",
147 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
148 },
149 {
150 .name = "uart2_rts.uart2_rts",
151 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
152 },
153 {
154 .name = "uart2_tx.uart2_tx",
155 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
156 },
157 {
158 .name = "uart2_rx.uart2_rx",
159 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
160 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
161 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
162 },
163};
164
165static struct omap_device_pad default_uart3_pads[] __initdata = {
166 {
167 .name = "uart3_cts_rctx.uart3_cts_rctx",
168 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
169 },
170 {
171 .name = "uart3_rts_sd.uart3_rts_sd",
172 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
173 },
174 {
175 .name = "uart3_tx_irtx.uart3_tx_irtx",
176 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
177 },
178 {
179 .name = "uart3_rx_irrx.uart3_rx_irrx",
180 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
181 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
182 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
183 },
184};
185
186static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
187 {
188 .name = "gpmc_wait2.uart4_tx",
189 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
190 },
191 {
192 .name = "gpmc_wait3.uart4_rx",
193 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
194 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
195 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
196 },
197};
198
199static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
200 {
201 .name = "uart4_tx.uart4_tx",
202 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
203 },
204 {
205 .name = "uart4_rx.uart4_rx",
206 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
207 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
208 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
209 },
210};
211
212static void omap_serial_fill_default_pads(struct omap_board_data *bdata) 129static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
213{ 130{
214 switch (bdata->id) {
215 case 0:
216 bdata->pads = default_uart1_pads;
217 bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
218 break;
219 case 1:
220 bdata->pads = default_uart2_pads;
221 bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
222 break;
223 case 2:
224 bdata->pads = default_uart3_pads;
225 bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
226 break;
227 case 3:
228 if (cpu_is_omap44xx()) {
229 bdata->pads = default_omap4_uart4_pads;
230 bdata->pads_cnt =
231 ARRAY_SIZE(default_omap4_uart4_pads);
232 } else if (cpu_is_omap3630()) {
233 bdata->pads = default_omap36xx_uart4_pads;
234 bdata->pads_cnt =
235 ARRAY_SIZE(default_omap36xx_uart4_pads);
236 }
237 break;
238 default:
239 break;
240 }
241} 131}
242#else 132#else
243static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} 133static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 4b57757bf9d1..7a7b89304c48 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -37,6 +37,16 @@ static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .flags = I2C_CLIENT_WAKE, 37 .flags = I2C_CLIENT_WAKE,
38}; 38};
39 39
40static struct i2c_board_info __initdata omap4_i2c1_board_info[] = {
41 {
42 .addr = 0x48,
43 .flags = I2C_CLIENT_WAKE,
44 },
45 {
46 I2C_BOARD_INFO("twl6040", 0x4b),
47 },
48};
49
40void __init omap_pmic_init(int bus, u32 clkrate, 50void __init omap_pmic_init(int bus, u32 clkrate,
41 const char *pmic_type, int pmic_irq, 51 const char *pmic_type, int pmic_irq,
42 struct twl4030_platform_data *pmic_data) 52 struct twl4030_platform_data *pmic_data)
@@ -49,14 +59,31 @@ void __init omap_pmic_init(int bus, u32 clkrate,
49 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); 59 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
50} 60}
51 61
62void __init omap4_pmic_init(const char *pmic_type,
63 struct twl4030_platform_data *pmic_data,
64 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
65{
66 /* PMIC part*/
67 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
68 sizeof(omap4_i2c1_board_info[0].type));
69 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
70 omap4_i2c1_board_info[0].platform_data = pmic_data;
71
72 /* TWL6040 audio IC part */
73 omap4_i2c1_board_info[1].irq = twl6040_irq;
74 omap4_i2c1_board_info[1].platform_data = twl6040_data;
75
76 omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2);
77
78}
79
52void __init omap_pmic_late_init(void) 80void __init omap_pmic_late_init(void)
53{ 81{
54 /* Init the OMAP TWL parameters (if PMIC has been registerd) */ 82 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
55 if (!pmic_i2c_board_info.irq) 83 if (pmic_i2c_board_info.irq)
56 return; 84 omap3_twl_init();
57 85 if (omap4_i2c1_board_info[0].irq)
58 omap3_twl_init(); 86 omap4_twl_init();
59 omap4_twl_init();
60} 87}
61 88
62#if defined(CONFIG_ARCH_OMAP3) 89#if defined(CONFIG_ARCH_OMAP3)
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 275dde8cb27a..09627483a57f 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -29,6 +29,7 @@
29 29
30 30
31struct twl4030_platform_data; 31struct twl4030_platform_data;
32struct twl6040_platform_data;
32 33
33void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, 34void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
34 struct twl4030_platform_data *pmic_data); 35 struct twl4030_platform_data *pmic_data);
@@ -46,12 +47,9 @@ static inline void omap3_pmic_init(const char *pmic_type,
46 omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); 47 omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
47} 48}
48 49
49static inline void omap4_pmic_init(const char *pmic_type, 50void omap4_pmic_init(const char *pmic_type,
50 struct twl4030_platform_data *pmic_data) 51 struct twl4030_platform_data *pmic_data,
51{ 52 struct twl6040_platform_data *audio_data, int twl6040_irq);
52 /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
53 omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
54}
55 53
56void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, 54void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
57 u32 pdata_flags, u32 regulators_flags); 55 u32 pdata_flags, u32 regulators_flags);
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 880d02ec89d4..ef7099eea0f2 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -17,6 +17,7 @@ config UX500_SOC_DB5500
17config UX500_SOC_DB8500 17config UX500_SOC_DB8500
18 bool 18 bool
19 select MFD_DB8500_PRCMU 19 select MFD_DB8500_PRCMU
20 select REGULATOR
20 select REGULATOR_DB8500_PRCMU 21 select REGULATOR_DB8500_PRCMU
21 select CPU_FREQ_TABLE if CPU_FREQ 22 select CPU_FREQ_TABLE if CPU_FREQ
22 23
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index 465b9ec9510a..015932c6bf08 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5obj-y := clock.o cpu.o devices.o devices-common.o \ 5obj-y := clock.o cpu.o devices.o devices-common.o \
6 id.o usb.o timer.o 6 id.o pins.o usb.o timer.o
7obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o 7obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
8obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o dma-db5500.o 8obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o dma-db5500.o
9obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o 9obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
@@ -11,7 +11,8 @@ obj-$(CONFIG_MACH_MOP500) += board-mop500.o board-mop500-sdi.o \
11 board-mop500-regulators.o \ 11 board-mop500-regulators.o \
12 board-mop500-uib.o board-mop500-stuib.o \ 12 board-mop500-uib.o board-mop500-stuib.o \
13 board-mop500-u8500uib.o \ 13 board-mop500-u8500uib.o \
14 board-mop500-pins.o 14 board-mop500-pins.o \
15 board-mop500-msp.o
15obj-$(CONFIG_MACH_U5500) += board-u5500.o board-u5500-sdi.o 16obj-$(CONFIG_MACH_U5500) += board-u5500.o board-u5500-sdi.o
16obj-$(CONFIG_SMP) += platsmp.o headsmp.o 17obj-$(CONFIG_SMP) += platsmp.o headsmp.o
17obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 18obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mach-ux500/board-mop500-msp.c b/arch/arm/mach-ux500/board-mop500-msp.c
new file mode 100644
index 000000000000..c8f6300cb7d2
--- /dev/null
+++ b/arch/arm/mach-ux500/board-mop500-msp.c
@@ -0,0 +1,250 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL), version 2
5 */
6
7#include <linux/platform_device.h>
8#include <linux/init.h>
9#include <linux/gpio.h>
10#include <plat/gpio-nomadik.h>
11
12#include <plat/pincfg.h>
13#include <plat/ste_dma40.h>
14
15#include <mach/devices.h>
16#include <ste-dma40-db8500.h>
17#include <mach/hardware.h>
18#include <mach/irqs.h>
19#include <mach/msp.h>
20
21#include "board-mop500.h"
22#include "devices-db8500.h"
23#include "pins-db8500.h"
24
25/* MSP1/3 Tx/Rx usage protection */
26static DEFINE_SPINLOCK(msp_rxtx_lock);
27
28/* Reference Count */
29static int msp_rxtx_ref;
30
31static pin_cfg_t mop500_msp1_pins_init[] = {
32 GPIO33_MSP1_TXD | PIN_OUTPUT_LOW | PIN_SLPM_WAKEUP_DISABLE,
33 GPIO34_MSP1_TFS | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
34 GPIO35_MSP1_TCK | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
35 GPIO36_MSP1_RXD | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
36};
37
38static pin_cfg_t mop500_msp1_pins_exit[] = {
39 GPIO33_MSP1_TXD | PIN_OUTPUT_LOW | PIN_SLPM_WAKEUP_ENABLE,
40 GPIO34_MSP1_TFS | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
41 GPIO35_MSP1_TCK | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
42 GPIO36_MSP1_RXD | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
43};
44
45int msp13_i2s_init(void)
46{
47 int retval = 0;
48 unsigned long flags;
49
50 spin_lock_irqsave(&msp_rxtx_lock, flags);
51 if (msp_rxtx_ref == 0)
52 retval = nmk_config_pins(
53 ARRAY_AND_SIZE(mop500_msp1_pins_init));
54 if (!retval)
55 msp_rxtx_ref++;
56 spin_unlock_irqrestore(&msp_rxtx_lock, flags);
57
58 return retval;
59}
60
61int msp13_i2s_exit(void)
62{
63 int retval = 0;
64 unsigned long flags;
65
66 spin_lock_irqsave(&msp_rxtx_lock, flags);
67 WARN_ON(!msp_rxtx_ref);
68 msp_rxtx_ref--;
69 if (msp_rxtx_ref == 0)
70 retval = nmk_config_pins_sleep(
71 ARRAY_AND_SIZE(mop500_msp1_pins_exit));
72 spin_unlock_irqrestore(&msp_rxtx_lock, flags);
73
74 return retval;
75}
76
77static struct stedma40_chan_cfg msp0_dma_rx = {
78 .high_priority = true,
79 .dir = STEDMA40_PERIPH_TO_MEM,
80
81 .src_dev_type = DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX,
82 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
83
84 .src_info.psize = STEDMA40_PSIZE_LOG_4,
85 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
86
87 /* data_width is set during configuration */
88};
89
90static struct stedma40_chan_cfg msp0_dma_tx = {
91 .high_priority = true,
92 .dir = STEDMA40_MEM_TO_PERIPH,
93
94 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
95 .dst_dev_type = DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX,
96
97 .src_info.psize = STEDMA40_PSIZE_LOG_4,
98 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
99
100 /* data_width is set during configuration */
101};
102
103static struct msp_i2s_platform_data msp0_platform_data = {
104 .id = MSP_I2S_0,
105 .msp_i2s_dma_rx = &msp0_dma_rx,
106 .msp_i2s_dma_tx = &msp0_dma_tx,
107};
108
109static struct stedma40_chan_cfg msp1_dma_rx = {
110 .high_priority = true,
111 .dir = STEDMA40_PERIPH_TO_MEM,
112
113 .src_dev_type = DB8500_DMA_DEV30_MSP3_RX,
114 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
115
116 .src_info.psize = STEDMA40_PSIZE_LOG_4,
117 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
118
119 /* data_width is set during configuration */
120};
121
122static struct stedma40_chan_cfg msp1_dma_tx = {
123 .high_priority = true,
124 .dir = STEDMA40_MEM_TO_PERIPH,
125
126 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
127 .dst_dev_type = DB8500_DMA_DEV30_MSP1_TX,
128
129 .src_info.psize = STEDMA40_PSIZE_LOG_4,
130 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
131
132 /* data_width is set during configuration */
133};
134
135static struct msp_i2s_platform_data msp1_platform_data = {
136 .id = MSP_I2S_1,
137 .msp_i2s_dma_rx = NULL,
138 .msp_i2s_dma_tx = &msp1_dma_tx,
139 .msp_i2s_init = msp13_i2s_init,
140 .msp_i2s_exit = msp13_i2s_exit,
141};
142
143static struct stedma40_chan_cfg msp2_dma_rx = {
144 .high_priority = true,
145 .dir = STEDMA40_PERIPH_TO_MEM,
146
147 .src_dev_type = DB8500_DMA_DEV14_MSP2_RX,
148 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
149
150 /* MSP2 DMA doesn't work with PSIZE == 4 on DB8500v2 */
151 .src_info.psize = STEDMA40_PSIZE_LOG_1,
152 .dst_info.psize = STEDMA40_PSIZE_LOG_1,
153
154 /* data_width is set during configuration */
155};
156
157static struct stedma40_chan_cfg msp2_dma_tx = {
158 .high_priority = true,
159 .dir = STEDMA40_MEM_TO_PERIPH,
160
161 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
162 .dst_dev_type = DB8500_DMA_DEV14_MSP2_TX,
163
164 .src_info.psize = STEDMA40_PSIZE_LOG_4,
165 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
166
167 .use_fixed_channel = true,
168 .phy_channel = 1,
169
170 /* data_width is set during configuration */
171};
172
173static int db8500_add_msp_i2s(struct device *parent, int id,
174 resource_size_t base, int irq,
175 struct msp_i2s_platform_data *pdata)
176{
177 struct platform_device *pdev;
178 struct resource res[] = {
179 DEFINE_RES_MEM(base, SZ_4K),
180 DEFINE_RES_IRQ(irq),
181 };
182
183 pr_info("Register platform-device 'ux500-msp-i2s', id %d, irq %d\n",
184 id, irq);
185 pdev = platform_device_register_resndata(parent, "ux500-msp-i2s", id,
186 res, ARRAY_SIZE(res),
187 pdata, sizeof(*pdata));
188 if (!pdev) {
189 pr_err("Failed to register platform-device 'ux500-msp-i2s.%d'!\n",
190 id);
191 return -EIO;
192 }
193
194 return 0;
195}
196
197/* Platform device for ASoC U8500 machine */
198static struct platform_device snd_soc_u8500 = {
199 .name = "snd-soc-u8500",
200 .id = 0,
201 .dev = {
202 .platform_data = NULL,
203 },
204};
205
206/* Platform device for Ux500-PCM */
207static struct platform_device ux500_pcm = {
208 .name = "ux500-pcm",
209 .id = 0,
210 .dev = {
211 .platform_data = NULL,
212 },
213};
214
215static struct msp_i2s_platform_data msp2_platform_data = {
216 .id = MSP_I2S_2,
217 .msp_i2s_dma_rx = &msp2_dma_rx,
218 .msp_i2s_dma_tx = &msp2_dma_tx,
219};
220
221static struct msp_i2s_platform_data msp3_platform_data = {
222 .id = MSP_I2S_3,
223 .msp_i2s_dma_rx = &msp1_dma_rx,
224 .msp_i2s_dma_tx = NULL,
225 .msp_i2s_init = msp13_i2s_init,
226 .msp_i2s_exit = msp13_i2s_exit,
227};
228
229int mop500_msp_init(struct device *parent)
230{
231 int ret;
232
233 pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);
234 platform_device_register(&snd_soc_u8500);
235
236 pr_info("Initialize MSP I2S-devices.\n");
237 ret = db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
238 &msp0_platform_data);
239 ret |= db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1,
240 &msp1_platform_data);
241 ret |= db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2,
242 &msp2_platform_data);
243 ret |= db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
244 &msp3_platform_data);
245
246 pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__);
247 platform_device_register(&ux500_pcm);
248
249 return ret;
250}
diff --git a/arch/arm/mach-ux500/board-mop500-msp.h b/arch/arm/mach-ux500/board-mop500-msp.h
new file mode 100644
index 000000000000..6fcfb5e2cc94
--- /dev/null
+++ b/arch/arm/mach-ux500/board-mop500-msp.h
@@ -0,0 +1,14 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2012
3 *
4 * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
5 * for ST-Ericsson.
6 *
7 * License terms:
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14void mop500_msp_init(struct device *parent);
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index f5413dca532c..df5b190d331c 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -7,109 +7,47 @@
7#include <linux/kernel.h> 7#include <linux/kernel.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/bug.h> 9#include <linux/bug.h>
10#include <linux/string.h>
10 11
11#include <asm/mach-types.h> 12#include <asm/mach-types.h>
12#include <plat/pincfg.h> 13#include <plat/pincfg.h>
13#include <plat/gpio-nomadik.h> 14#include <plat/gpio-nomadik.h>
15
14#include <mach/hardware.h> 16#include <mach/hardware.h>
15 17
16#include "pins-db8500.h" 18#include "pins-db8500.h"
19#include "pins.h"
20#include "board-mop500.h"
21
22enum custom_pin_cfg_t {
23 PINS_FOR_DEFAULT,
24 PINS_FOR_U9500,
25};
26
27static enum custom_pin_cfg_t pinsfor;
17 28
18static pin_cfg_t mop500_pins_common[] = { 29static pin_cfg_t mop500_pins_common[] = {
19 /* I2C */ 30 /* uMSP0 */
20 GPIO147_I2C0_SCL,
21 GPIO148_I2C0_SDA,
22 GPIO16_I2C1_SCL,
23 GPIO17_I2C1_SDA,
24 GPIO10_I2C2_SDA,
25 GPIO11_I2C2_SCL,
26 GPIO229_I2C3_SDA,
27 GPIO230_I2C3_SCL,
28
29 /* MSP0 */
30 GPIO12_MSP0_TXD, 31 GPIO12_MSP0_TXD,
31 GPIO13_MSP0_TFS, 32 GPIO13_MSP0_TFS,
32 GPIO14_MSP0_TCK, 33 GPIO14_MSP0_TCK,
33 GPIO15_MSP0_RXD, 34 GPIO15_MSP0_RXD,
34 35
35 /* MSP2: HDMI */ 36 /* MSP2: HDMI */
36 GPIO193_MSP2_TXD, 37 GPIO193_MSP2_TXD | PIN_INPUT_PULLDOWN,
37 GPIO194_MSP2_TCK, 38 GPIO194_MSP2_TCK | PIN_INPUT_PULLDOWN,
38 GPIO195_MSP2_TFS, 39 GPIO195_MSP2_TFS | PIN_INPUT_PULLDOWN,
39 GPIO196_MSP2_RXD | PIN_OUTPUT_LOW, 40 GPIO196_MSP2_RXD | PIN_OUTPUT_LOW,
40 41
42 /* LCD TE0 */
43 GPIO68_LCD_VSI0 | PIN_INPUT_PULLUP,
44
41 /* Touch screen INTERFACE */ 45 /* Touch screen INTERFACE */
42 GPIO84_GPIO | PIN_INPUT_PULLUP, /* TOUCH_INT1 */ 46 GPIO84_GPIO | PIN_INPUT_PULLUP, /* TOUCH_INT1 */
43 47
44 /* STMPE1601/tc35893 keypad IRQ */ 48 /* STMPE1601/tc35893 keypad IRQ */
45 GPIO218_GPIO | PIN_INPUT_PULLUP, 49 GPIO218_GPIO | PIN_INPUT_PULLUP,
46 50
47 /* MMC0 (MicroSD card) */
48 GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH,
49 GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH,
50 GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH,
51
52 GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL,
53 GPIO23_MC0_CLK | PIN_OUTPUT_LOW,
54 GPIO24_MC0_CMD | PIN_INPUT_PULLUP,
55 GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP,
56 GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP,
57 GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP,
58 GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP,
59
60 /* SDI1 (SDIO) */
61 GPIO208_MC1_CLK | PIN_OUTPUT_LOW,
62 GPIO209_MC1_FBCLK | PIN_INPUT_NOPULL,
63 GPIO210_MC1_CMD | PIN_INPUT_PULLUP,
64 GPIO211_MC1_DAT0 | PIN_INPUT_PULLUP,
65 GPIO212_MC1_DAT1 | PIN_INPUT_PULLUP,
66 GPIO213_MC1_DAT2 | PIN_INPUT_PULLUP,
67 GPIO214_MC1_DAT3 | PIN_INPUT_PULLUP,
68
69 /* MMC2 (On-board DATA INTERFACE eMMC) */
70 GPIO128_MC2_CLK | PIN_OUTPUT_LOW,
71 GPIO129_MC2_CMD | PIN_INPUT_PULLUP,
72 GPIO130_MC2_FBCLK | PIN_INPUT_NOPULL,
73 GPIO131_MC2_DAT0 | PIN_INPUT_PULLUP,
74 GPIO132_MC2_DAT1 | PIN_INPUT_PULLUP,
75 GPIO133_MC2_DAT2 | PIN_INPUT_PULLUP,
76 GPIO134_MC2_DAT3 | PIN_INPUT_PULLUP,
77 GPIO135_MC2_DAT4 | PIN_INPUT_PULLUP,
78 GPIO136_MC2_DAT5 | PIN_INPUT_PULLUP,
79 GPIO137_MC2_DAT6 | PIN_INPUT_PULLUP,
80 GPIO138_MC2_DAT7 | PIN_INPUT_PULLUP,
81
82 /* MMC4 (On-board STORAGE INTERFACE eMMC) */
83 GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP,
84 GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP,
85 GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP,
86 GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP,
87 GPIO201_MC4_CMD | PIN_INPUT_PULLUP,
88 GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL,
89 GPIO203_MC4_CLK | PIN_OUTPUT_LOW,
90 GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP,
91 GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP,
92 GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP,
93 GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP,
94
95 /* SKE keypad */
96 GPIO153_KP_I7,
97 GPIO154_KP_I6,
98 GPIO155_KP_I5,
99 GPIO156_KP_I4,
100 GPIO157_KP_O7,
101 GPIO158_KP_O6,
102 GPIO159_KP_O5,
103 GPIO160_KP_O4,
104 GPIO161_KP_I3,
105 GPIO162_KP_I2,
106 GPIO163_KP_I1,
107 GPIO164_KP_I0,
108 GPIO165_KP_O3,
109 GPIO166_KP_O2,
110 GPIO167_KP_O1,
111 GPIO168_KP_O0,
112
113 /* UART */ 51 /* UART */
114 /* uart-0 pins gpio configuration should be 52 /* uart-0 pins gpio configuration should be
115 * kept intact to prevent glitch in tx line 53 * kept intact to prevent glitch in tx line
@@ -128,10 +66,6 @@ static pin_cfg_t mop500_pins_common[] = {
128 GPIO30_U2_TXD | PIN_OUTPUT_HIGH, 66 GPIO30_U2_TXD | PIN_OUTPUT_HIGH,
129 GPIO31_U2_CTSn | PIN_INPUT_PULLUP, 67 GPIO31_U2_CTSn | PIN_INPUT_PULLUP,
130 GPIO32_U2_RTSn | PIN_OUTPUT_HIGH, 68 GPIO32_U2_RTSn | PIN_OUTPUT_HIGH,
131
132 /* Display & HDMI HW sync */
133 GPIO68_LCD_VSI0 | PIN_INPUT_PULLUP,
134 GPIO69_LCD_VSI1 | PIN_INPUT_PULLUP,
135}; 69};
136 70
137static pin_cfg_t mop500_pins_default[] = { 71static pin_cfg_t mop500_pins_default[] = {
@@ -141,10 +75,13 @@ static pin_cfg_t mop500_pins_default[] = {
141 GPIO145_SSP0_RXD | PIN_PULL_DOWN, 75 GPIO145_SSP0_RXD | PIN_PULL_DOWN,
142 GPIO146_SSP0_TXD, 76 GPIO146_SSP0_TXD,
143 77
78 /* XENON Flashgun INTERFACE */
79 GPIO6_IP_GPIO0 | PIN_INPUT_PULLUP,/* XENON_FLASH_ID */
80 GPIO7_IP_GPIO1 | PIN_INPUT_PULLUP,/* XENON_READY */
144 81
145 GPIO217_GPIO | PIN_INPUT_PULLUP, /* TC35892 IRQ */ 82 GPIO217_GPIO | PIN_INPUT_PULLUP, /* TC35892 IRQ */
146 83
147 /* SDI0 (MicroSD card) */ 84 /* sdi0 (removable MMC/SD/SDIO cards) not handled by pm_runtime */
148 GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH, 85 GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH,
149 86
150 /* UART */ 87 /* UART */
@@ -156,13 +93,11 @@ static pin_cfg_t mop500_pins_default[] = {
156 93
157static pin_cfg_t hrefv60_pins[] = { 94static pin_cfg_t hrefv60_pins[] = {
158 /* WLAN */ 95 /* WLAN */
159 GPIO4_GPIO | PIN_INPUT_PULLUP,/* WLAN_IRQ */
160 GPIO85_GPIO | PIN_OUTPUT_LOW,/* WLAN_ENA */ 96 GPIO85_GPIO | PIN_OUTPUT_LOW,/* WLAN_ENA */
161 97
162 /* XENON Flashgun INTERFACE */ 98 /* XENON Flashgun INTERFACE */
163 GPIO6_IP_GPIO0 | PIN_INPUT_PULLUP,/* XENON_FLASH_ID */ 99 GPIO6_IP_GPIO0 | PIN_INPUT_PULLUP,/* XENON_FLASH_ID */
164 GPIO7_IP_GPIO1 | PIN_INPUT_PULLUP,/* XENON_READY */ 100 GPIO7_IP_GPIO1 | PIN_INPUT_PULLUP,/* XENON_READY */
165 GPIO170_GPIO | PIN_OUTPUT_LOW, /* XENON_CHARGE */
166 101
167 /* Assistant LED INTERFACE */ 102 /* Assistant LED INTERFACE */
168 GPIO21_GPIO | PIN_OUTPUT_LOW, /* XENON_EN1 */ 103 GPIO21_GPIO | PIN_OUTPUT_LOW, /* XENON_EN1 */
@@ -173,7 +108,7 @@ static pin_cfg_t hrefv60_pins[] = {
173 GPIO32_GPIO | PIN_INPUT_PULLDOWN, /* Magnetometer DRDY */ 108 GPIO32_GPIO | PIN_INPUT_PULLDOWN, /* Magnetometer DRDY */
174 109
175 /* Display Interface */ 110 /* Display Interface */
176 GPIO65_GPIO | PIN_OUTPUT_LOW, /* DISP1 RST */ 111 GPIO65_GPIO | PIN_OUTPUT_HIGH, /* DISP1 NO RST */
177 GPIO66_GPIO | PIN_OUTPUT_LOW, /* DISP2 RST */ 112 GPIO66_GPIO | PIN_OUTPUT_LOW, /* DISP2 RST */
178 113
179 /* Touch screen INTERFACE */ 114 /* Touch screen INTERFACE */
@@ -215,11 +150,8 @@ static pin_cfg_t hrefv60_pins[] = {
215 /* DiPro Sensor Interface */ 150 /* DiPro Sensor Interface */
216 GPIO139_GPIO | PIN_INPUT_PULLUP, /* DIPRO_INT */ 151 GPIO139_GPIO | PIN_INPUT_PULLUP, /* DIPRO_INT */
217 152
218 /* HAL SWITCH INTERFACE */
219 GPIO145_GPIO | PIN_INPUT_PULLDOWN,/* HAL_SW */
220
221 /* Audio Amplifier Interface */ 153 /* Audio Amplifier Interface */
222 GPIO149_GPIO | PIN_OUTPUT_LOW, /* VAUDIO_HF_EN */ 154 GPIO149_GPIO | PIN_OUTPUT_HIGH, /* VAUDIO_HF_EN, enable MAX8968 */
223 155
224 /* GBF INTERFACE */ 156 /* GBF INTERFACE */
225 GPIO171_GPIO | PIN_OUTPUT_LOW, /* GBF_ENA_RESET */ 157 GPIO171_GPIO | PIN_OUTPUT_LOW, /* GBF_ENA_RESET */
@@ -231,10 +163,29 @@ static pin_cfg_t hrefv60_pins[] = {
231 GPIO82_GPIO | PIN_INPUT_PULLUP, /* ACC_INT1 */ 163 GPIO82_GPIO | PIN_INPUT_PULLUP, /* ACC_INT1 */
232 GPIO83_GPIO | PIN_INPUT_PULLUP, /* ACC_INT2 */ 164 GPIO83_GPIO | PIN_INPUT_PULLUP, /* ACC_INT2 */
233 165
234 /* Proximity Sensor */ 166 /* SD card detect */
235 GPIO217_GPIO | PIN_INPUT_PULLUP, 167 GPIO95_GPIO | PIN_INPUT_PULLUP,
168};
236 169
170static pin_cfg_t u9500_pins[] = {
171 GPIO4_U1_RXD | PIN_INPUT_PULLUP,
172 GPIO5_U1_TXD | PIN_OUTPUT_HIGH,
173 GPIO144_GPIO | PIN_INPUT_PULLUP,/* WLAN_IRQ */
174
175 /* HSI */
176 GPIO219_HSIR_FLA0 | PIN_INPUT_PULLDOWN,
177 GPIO220_HSIR_DAT0 | PIN_INPUT_PULLDOWN,
178 GPIO221_HSIR_RDY0 | PIN_OUTPUT_LOW,
179 GPIO222_HSIT_FLA0 | PIN_OUTPUT_LOW,
180 GPIO223_HSIT_DAT0 | PIN_OUTPUT_LOW,
181 GPIO224_HSIT_RDY0 | PIN_INPUT_PULLDOWN,
182 GPIO225_HSIT_CAWAKE0 | PIN_INPUT_PULLDOWN, /* CA_WAKE0 */
183 GPIO226_GPIO | PIN_OUTPUT_HIGH, /* AC_WAKE0 */
184};
237 185
186static pin_cfg_t u8500_pins[] = {
187 GPIO226_GPIO | PIN_OUTPUT_LOW, /* WLAN_PMU_EN */
188 GPIO4_GPIO | PIN_INPUT_PULLUP,/* WLAN_IRQ */
238}; 189};
239 190
240static pin_cfg_t snowball_pins[] = { 191static pin_cfg_t snowball_pins[] = {
@@ -275,13 +226,245 @@ static pin_cfg_t snowball_pins[] = {
275 226
276 /* RSTn_LAN */ 227 /* RSTn_LAN */
277 GPIO141_GPIO | PIN_OUTPUT_HIGH, 228 GPIO141_GPIO | PIN_OUTPUT_HIGH,
229
230 /* Accelerometer/Magnetometer */
231 GPIO163_GPIO | PIN_INPUT_PULLUP, /* ACCEL_IRQ1 */
232 GPIO164_GPIO | PIN_INPUT_PULLUP, /* ACCEL_IRQ2 */
233 GPIO165_GPIO | PIN_INPUT_PULLUP, /* MAG_DRDY */
234
235 /* WLAN/GBF */
236 GPIO161_GPIO | PIN_OUTPUT_LOW, /* WLAN_PMU_EN */
237 GPIO171_GPIO | PIN_OUTPUT_HIGH,/* GBF_ENA */
238 GPIO215_GPIO | PIN_OUTPUT_LOW,/* WLAN_ENA */
239 GPIO216_GPIO | PIN_INPUT_PULLUP,/* WLAN_IRQ */
240};
241
242/*
243 * I2C
244 */
245
246static UX500_PINS(mop500_pins_i2c0,
247 GPIO147_I2C0_SCL |
248 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
249 GPIO148_I2C0_SDA |
250 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
251);
252
253static UX500_PINS(mop500_pins_i2c1,
254 GPIO16_I2C1_SCL |
255 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
256 GPIO17_I2C1_SDA |
257 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
258);
259
260static UX500_PINS(mop500_pins_i2c2,
261 GPIO10_I2C2_SDA |
262 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
263 GPIO11_I2C2_SCL |
264 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
265);
266
267static UX500_PINS(mop500_pins_i2c3,
268 GPIO229_I2C3_SDA |
269 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
270 GPIO230_I2C3_SCL |
271 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
272);
273
274static UX500_PINS(mop500_pins_mcde_tvout,
275 GPIO78_LCD_D8,
276 GPIO79_LCD_D9,
277 GPIO80_LCD_D10,
278 GPIO81_LCD_D11,
279 GPIO150_LCDA_CLK,
280);
281
282static UX500_PINS(mop500_pins_mcde_hdmi,
283 GPIO69_LCD_VSI1 | PIN_INPUT_PULLUP,
284);
285
286static UX500_PINS(mop500_pins_ske,
287 GPIO153_KP_I7 | PIN_INPUT_PULLDOWN | PIN_SLPM_INPUT_PULLUP,
288 GPIO154_KP_I6 | PIN_INPUT_PULLDOWN | PIN_SLPM_INPUT_PULLUP,
289 GPIO155_KP_I5 | PIN_INPUT_PULLDOWN | PIN_SLPM_INPUT_PULLUP,
290 GPIO156_KP_I4 | PIN_INPUT_PULLDOWN | PIN_SLPM_INPUT_PULLUP,
291 GPIO161_KP_I3 | PIN_INPUT_PULLDOWN | PIN_SLPM_INPUT_PULLUP,
292 GPIO162_KP_I2 | PIN_INPUT_PULLDOWN | PIN_SLPM_INPUT_PULLUP,
293 GPIO163_KP_I1 | PIN_INPUT_PULLDOWN | PIN_SLPM_INPUT_PULLUP,
294 GPIO164_KP_I0 | PIN_INPUT_PULLDOWN | PIN_SLPM_INPUT_PULLUP,
295 GPIO157_KP_O7 | PIN_INPUT_PULLUP | PIN_SLPM_OUTPUT_LOW,
296 GPIO158_KP_O6 | PIN_INPUT_PULLUP | PIN_SLPM_OUTPUT_LOW,
297 GPIO159_KP_O5 | PIN_INPUT_PULLUP | PIN_SLPM_OUTPUT_LOW,
298 GPIO160_KP_O4 | PIN_INPUT_PULLUP | PIN_SLPM_OUTPUT_LOW,
299 GPIO165_KP_O3 | PIN_INPUT_PULLUP | PIN_SLPM_OUTPUT_LOW,
300 GPIO166_KP_O2 | PIN_INPUT_PULLUP | PIN_SLPM_OUTPUT_LOW,
301 GPIO167_KP_O1 | PIN_INPUT_PULLUP | PIN_SLPM_OUTPUT_LOW,
302 GPIO168_KP_O0 | PIN_INPUT_PULLUP | PIN_SLPM_OUTPUT_LOW,
303);
304
305/* sdi0 (removable MMC/SD/SDIO cards) */
306static UX500_PINS(mop500_pins_sdi0,
307 GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH,
308 GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH,
309 GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH,
310
311 GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL,
312 GPIO23_MC0_CLK | PIN_OUTPUT_LOW,
313 GPIO24_MC0_CMD | PIN_INPUT_PULLUP,
314 GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP,
315 GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP,
316 GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP,
317 GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP,
318);
319
320/* sdi1 (WLAN CW1200) */
321static UX500_PINS(mop500_pins_sdi1,
322 GPIO208_MC1_CLK | PIN_OUTPUT_LOW,
323 GPIO209_MC1_FBCLK | PIN_INPUT_NOPULL,
324 GPIO210_MC1_CMD | PIN_INPUT_PULLUP,
325 GPIO211_MC1_DAT0 | PIN_INPUT_PULLUP,
326 GPIO212_MC1_DAT1 | PIN_INPUT_PULLUP,
327 GPIO213_MC1_DAT2 | PIN_INPUT_PULLUP,
328 GPIO214_MC1_DAT3 | PIN_INPUT_PULLUP,
329);
330
331/* sdi2 (POP eMMC) */
332static UX500_PINS(mop500_pins_sdi2,
333 GPIO128_MC2_CLK | PIN_OUTPUT_LOW,
334 GPIO129_MC2_CMD | PIN_INPUT_PULLUP,
335 GPIO130_MC2_FBCLK | PIN_INPUT_NOPULL,
336 GPIO131_MC2_DAT0 | PIN_INPUT_PULLUP,
337 GPIO132_MC2_DAT1 | PIN_INPUT_PULLUP,
338 GPIO133_MC2_DAT2 | PIN_INPUT_PULLUP,
339 GPIO134_MC2_DAT3 | PIN_INPUT_PULLUP,
340 GPIO135_MC2_DAT4 | PIN_INPUT_PULLUP,
341 GPIO136_MC2_DAT5 | PIN_INPUT_PULLUP,
342 GPIO137_MC2_DAT6 | PIN_INPUT_PULLUP,
343 GPIO138_MC2_DAT7 | PIN_INPUT_PULLUP,
344);
345
346/* sdi4 (PCB eMMC) */
347static UX500_PINS(mop500_pins_sdi4,
348 GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP,
349 GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP,
350 GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP,
351 GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP,
352 GPIO201_MC4_CMD | PIN_INPUT_PULLUP,
353 GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL,
354 GPIO203_MC4_CLK | PIN_OUTPUT_LOW,
355 GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP,
356 GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP,
357 GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP,
358 GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP,
359);
360
361/* USB */
362static UX500_PINS(mop500_pins_usb,
363 GPIO256_USB_NXT,
364 GPIO257_USB_STP | PIN_OUTPUT_HIGH,
365 GPIO258_USB_XCLK,
366 GPIO259_USB_DIR,
367 GPIO260_USB_DAT7,
368 GPIO261_USB_DAT6,
369 GPIO262_USB_DAT5,
370 GPIO263_USB_DAT4,
371 GPIO264_USB_DAT3,
372 GPIO265_USB_DAT2,
373 GPIO266_USB_DAT1,
374 GPIO267_USB_DAT0,
375);
376
377/* SPI2 */
378static UX500_PINS(mop500_pins_spi2,
379 GPIO216_GPIO | PIN_OUTPUT_HIGH,
380 GPIO218_SPI2_RXD | PIN_INPUT_PULLDOWN,
381 GPIO215_SPI2_TXD | PIN_OUTPUT_LOW,
382 GPIO217_SPI2_CLK | PIN_OUTPUT_LOW,
383);
384
385static UX500_PINS(mop500_pins_sensors1p_v60,
386 GPIO217_GPIO| PIN_INPUT_PULLUP |
387 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
388 GPIO145_GPIO | PIN_INPUT_PULLDOWN |
389 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
390 GPIO139_GPIO | PIN_INPUT_PULLUP |
391 PIN_SLPM_GPIO | PIN_SLPM_INPUT_NOPULL,
392);
393
394static UX500_PINS(mop500_pins_sensors1p,
395 PIN_CFG_INPUT(GPIO_PROX_SENSOR, GPIO, NOPULL),
396 PIN_CFG_INPUT(GPIO_HAL_SENSOR, GPIO, NOPULL),
397);
398
399static struct ux500_pin_lookup mop500_runtime_pins[] = {
400 PIN_LOOKUP("mcde-tvout", &mop500_pins_mcde_tvout),
401 PIN_LOOKUP("av8100-hdmi", &mop500_pins_mcde_hdmi),
402 PIN_LOOKUP("nmk-i2c.0", &mop500_pins_i2c0),
403 PIN_LOOKUP("nmk-i2c.1", &mop500_pins_i2c1),
404 PIN_LOOKUP("nmk-i2c.2", &mop500_pins_i2c2),
405 PIN_LOOKUP("nmk-i2c.3", &mop500_pins_i2c3),
406 PIN_LOOKUP("sdi0", &mop500_pins_sdi0),
407 PIN_LOOKUP("sdi1", &mop500_pins_sdi1),
408 PIN_LOOKUP("sdi2", &mop500_pins_sdi2),
409 PIN_LOOKUP("sdi4", &mop500_pins_sdi4),
410 PIN_LOOKUP("musb-ux500.0", &mop500_pins_usb),
411 PIN_LOOKUP("spi2", &mop500_pins_spi2),
278}; 412};
279 413
414static struct ux500_pin_lookup mop500_runtime_pins_v60[] = {
415 PIN_LOOKUP("ske", &mop500_pins_ske),
416 PIN_LOOKUP("gpio-keys.0", &mop500_pins_sensors1p_v60),
417};
418
419static struct ux500_pin_lookup mop500_runtime_pins_pre_v60[] = {
420 PIN_LOOKUP("ske", &mop500_pins_ske),
421 PIN_LOOKUP("gpio-keys.0", &mop500_pins_sensors1p),
422};
423
424/*
425 * passing "pinsfor=" in kernel cmdline allows for custom
426 * configuration of GPIOs on u8500 derived boards.
427 */
428static int __init early_pinsfor(char *p)
429{
430 pinsfor = PINS_FOR_DEFAULT;
431
432 if (strcmp(p, "u9500-21") == 0)
433 pinsfor = PINS_FOR_U9500;
434
435 return 0;
436}
437early_param("pinsfor", early_pinsfor);
438
439int pins_for_u9500(void)
440{
441 if (pinsfor == PINS_FOR_U9500)
442 return 1;
443
444 return 0;
445}
446
280void __init mop500_pins_init(void) 447void __init mop500_pins_init(void)
281{ 448{
282 nmk_config_pins(mop500_pins_common, 449 nmk_config_pins(mop500_pins_common,
283 ARRAY_SIZE(mop500_pins_common)); 450 ARRAY_SIZE(mop500_pins_common));
284 451
452 ux500_pins_add(mop500_runtime_pins, ARRAY_SIZE(mop500_runtime_pins));
453
454 ux500_pins_add(mop500_runtime_pins_pre_v60,
455 ARRAY_SIZE(mop500_runtime_pins_pre_v60));
456
457 switch (pinsfor) {
458 case PINS_FOR_U9500:
459 nmk_config_pins(u9500_pins, ARRAY_SIZE(u9500_pins));
460 break;
461
462 case PINS_FOR_DEFAULT:
463 nmk_config_pins(u8500_pins, ARRAY_SIZE(u8500_pins));
464 default:
465 break;
466 }
467
285 nmk_config_pins(mop500_pins_default, 468 nmk_config_pins(mop500_pins_default,
286 ARRAY_SIZE(mop500_pins_default)); 469 ARRAY_SIZE(mop500_pins_default));
287} 470}
@@ -291,8 +474,11 @@ void __init snowball_pins_init(void)
291 nmk_config_pins(mop500_pins_common, 474 nmk_config_pins(mop500_pins_common,
292 ARRAY_SIZE(mop500_pins_common)); 475 ARRAY_SIZE(mop500_pins_common));
293 476
294 nmk_config_pins(snowball_pins, 477 ux500_pins_add(mop500_runtime_pins, ARRAY_SIZE(mop500_runtime_pins));
295 ARRAY_SIZE(snowball_pins)); 478
479 nmk_config_pins(u8500_pins, ARRAY_SIZE(u8500_pins));
480
481 nmk_config_pins(snowball_pins, ARRAY_SIZE(snowball_pins));
296} 482}
297 483
298void __init hrefv60_pins_init(void) 484void __init hrefv60_pins_init(void)
@@ -300,6 +486,22 @@ void __init hrefv60_pins_init(void)
300 nmk_config_pins(mop500_pins_common, 486 nmk_config_pins(mop500_pins_common,
301 ARRAY_SIZE(mop500_pins_common)); 487 ARRAY_SIZE(mop500_pins_common));
302 488
489 ux500_pins_add(mop500_runtime_pins, ARRAY_SIZE(mop500_runtime_pins));
490
491 ux500_pins_add(mop500_runtime_pins_v60,
492 ARRAY_SIZE(mop500_runtime_pins_v60));
493
303 nmk_config_pins(hrefv60_pins, 494 nmk_config_pins(hrefv60_pins,
304 ARRAY_SIZE(hrefv60_pins)); 495 ARRAY_SIZE(hrefv60_pins));
496
497 switch (pinsfor) {
498 case PINS_FOR_U9500:
499 nmk_config_pins(u9500_pins, ARRAY_SIZE(u9500_pins));
500 break;
501
502 case PINS_FOR_DEFAULT:
503 nmk_config_pins(u8500_pins, ARRAY_SIZE(u8500_pins));
504 default:
505 break;
506 }
305} 507}
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 77d03c1fbd04..ca0d62599f70 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -53,6 +53,7 @@
53#include "devices-db8500.h" 53#include "devices-db8500.h"
54#include "board-mop500.h" 54#include "board-mop500.h"
55#include "board-mop500-regulators.h" 55#include "board-mop500-regulators.h"
56#include "board-mop500-msp.h"
56 57
57static struct gpio_led snowball_led_array[] = { 58static struct gpio_led snowball_led_array[] = {
58 { 59 {
@@ -631,6 +632,7 @@ static void __init mop500_init_machine(void)
631 mop500_i2c_init(parent); 632 mop500_i2c_init(parent);
632 mop500_sdi_init(parent); 633 mop500_sdi_init(parent);
633 mop500_spi_init(parent); 634 mop500_spi_init(parent);
635 mop500_msp_init(parent);
634 mop500_uart_init(parent); 636 mop500_uart_init(parent);
635 637
636 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); 638 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
@@ -662,6 +664,7 @@ static void __init snowball_init_machine(void)
662 mop500_i2c_init(parent); 664 mop500_i2c_init(parent);
663 snowball_sdi_init(parent); 665 snowball_sdi_init(parent);
664 mop500_spi_init(parent); 666 mop500_spi_init(parent);
667 mop500_msp_init(parent);
665 mop500_uart_init(parent); 668 mop500_uart_init(parent);
666 669
667 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); 670 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
@@ -699,6 +702,7 @@ static void __init hrefv60_init_machine(void)
699 mop500_i2c_init(parent); 702 mop500_i2c_init(parent);
700 hrefv60_sdi_init(parent); 703 hrefv60_sdi_init(parent);
701 mop500_spi_init(parent); 704 mop500_spi_init(parent);
705 mop500_msp_init(parent);
702 mop500_uart_init(parent); 706 mop500_uart_init(parent);
703 707
704 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); 708 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
@@ -746,10 +750,22 @@ MACHINE_END
746#ifdef CONFIG_MACH_UX500_DT 750#ifdef CONFIG_MACH_UX500_DT
747 751
748struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 752struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
753 /* Requires DMA and call-back bindings. */
749 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), 754 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
750 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), 755 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
751 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), 756 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
757 /* Requires DMA bindings. */
752 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), 758 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
759 /* Requires clock name bindings. */
760 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
761 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
762 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
763 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
764 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
765 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
766 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
767 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
768 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
753 {}, 769 {},
754}; 770};
755 771
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index fdcfa8721bb4..91dc63fe101b 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -7,6 +7,9 @@
7#ifndef __BOARD_MOP500_H 7#ifndef __BOARD_MOP500_H
8#define __BOARD_MOP500_H 8#define __BOARD_MOP500_H
9 9
10/* For NOMADIK_NR_GPIO */
11#include <mach/irqs.h>
12
10/* Snowball specific GPIO assignments, this board has no GPIO expander */ 13/* Snowball specific GPIO assignments, this board has no GPIO expander */
11#define SNOWBALL_ACCEL_INT1_GPIO 163 14#define SNOWBALL_ACCEL_INT1_GPIO 163
12#define SNOWBALL_ACCEL_INT2_GPIO 164 15#define SNOWBALL_ACCEL_INT2_GPIO 164
@@ -73,6 +76,7 @@
73#define SNOWBALL_PME_ETH_GPIO MOP500_AB8500_PIN_GPIO(24) /* SYSCLKREQ7/GPIO24 */ 76#define SNOWBALL_PME_ETH_GPIO MOP500_AB8500_PIN_GPIO(24) /* SYSCLKREQ7/GPIO24 */
74#define SNOWBALL_EN_3V3_ETH_GPIO MOP500_AB8500_PIN_GPIO(26) /* GPIO26 */ 77#define SNOWBALL_EN_3V3_ETH_GPIO MOP500_AB8500_PIN_GPIO(26) /* GPIO26 */
75 78
79struct device;
76struct i2c_board_info; 80struct i2c_board_info;
77 81
78extern void mop500_sdi_init(struct device *parent); 82extern void mop500_sdi_init(struct device *parent);
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index ec35f0aa5665..700042cb6681 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -336,6 +336,7 @@ static DEFINE_PRCMU_CLK(uiccclk, 0x4, 1, UICCCLK); /* v1 */
336 */ 336 */
337 337
338/* Peripheral Cluster #1 */ 338/* Peripheral Cluster #1 */
339static DEFINE_PRCC_CLK(1, msp3, 11, 10, &clk_msp1clk);
339static DEFINE_PRCC_CLK(1, i2c4, 10, 9, &clk_i2cclk); 340static DEFINE_PRCC_CLK(1, i2c4, 10, 9, &clk_i2cclk);
340static DEFINE_PRCC_CLK(1, gpio0, 9, -1, NULL); 341static DEFINE_PRCC_CLK(1, gpio0, 9, -1, NULL);
341static DEFINE_PRCC_CLK(1, slimbus0, 8, 8, &clk_slimclk); 342static DEFINE_PRCC_CLK(1, slimbus0, 8, 8, &clk_slimclk);
@@ -405,7 +406,7 @@ static struct clk_lookup u8500_clks[] = {
405 CLK(slimbus0, "slimbus0", NULL), 406 CLK(slimbus0, "slimbus0", NULL),
406 CLK(i2c2, "nmk-i2c.2", NULL), 407 CLK(i2c2, "nmk-i2c.2", NULL),
407 CLK(sdi0, "sdi0", NULL), 408 CLK(sdi0, "sdi0", NULL),
408 CLK(msp0, "msp0", NULL), 409 CLK(msp0, "ux500-msp-i2s.0", NULL),
409 CLK(i2c1, "nmk-i2c.1", NULL), 410 CLK(i2c1, "nmk-i2c.1", NULL),
410 CLK(uart1, "uart1", NULL), 411 CLK(uart1, "uart1", NULL),
411 CLK(uart0, "uart0", NULL), 412 CLK(uart0, "uart0", NULL),
@@ -455,7 +456,8 @@ static struct clk_lookup u8500_clks[] = {
455 /* Peripheral Cluster #1 */ 456 /* Peripheral Cluster #1 */
456 CLK(i2c4, "nmk-i2c.4", NULL), 457 CLK(i2c4, "nmk-i2c.4", NULL),
457 CLK(spi3, "spi3", NULL), 458 CLK(spi3, "spi3", NULL),
458 CLK(msp1, "msp1", NULL), 459 CLK(msp1, "ux500-msp-i2s.1", NULL),
460 CLK(msp3, "ux500-msp-i2s.3", NULL),
459 461
460 /* Peripheral Cluster #2 */ 462 /* Peripheral Cluster #2 */
461 CLK(gpio1, "gpio.6", NULL), 463 CLK(gpio1, "gpio.6", NULL),
@@ -465,7 +467,7 @@ static struct clk_lookup u8500_clks[] = {
465 CLK(spi0, "spi0", NULL), 467 CLK(spi0, "spi0", NULL),
466 CLK(sdi3, "sdi3", NULL), 468 CLK(sdi3, "sdi3", NULL),
467 CLK(sdi1, "sdi1", NULL), 469 CLK(sdi1, "sdi1", NULL),
468 CLK(msp2, "msp2", NULL), 470 CLK(msp2, "ux500-msp-i2s.2", NULL),
469 CLK(sdi4, "sdi4", NULL), 471 CLK(sdi4, "sdi4", NULL),
470 CLK(pwl, "pwl", NULL), 472 CLK(pwl, "pwl", NULL),
471 CLK(spi1, "spi1", NULL), 473 CLK(spi1, "spi1", NULL),
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index d11f3892a27d..f6522f9f129c 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -30,6 +30,18 @@
30 30
31void __iomem *_PRCMU_BASE; 31void __iomem *_PRCMU_BASE;
32 32
33/*
34 * FIXME: Should we set up the GPIO domain here?
35 *
36 * The problem is that we cannot put the interrupt resources into the platform
37 * device until the irqdomain has been added. Right now, we set the GIC interrupt
38 * domain from init_irq(), then load the gpio driver from
39 * core_initcall(nmk_gpio_init) and add the platform devices from
40 * arch_initcall(customize_machine).
41 *
42 * This feels fragile because it depends on the gpio device getting probed
43 * _before_ any device uses the gpio interrupts.
44*/
33static const struct of_device_id ux500_dt_irq_match[] = { 45static const struct of_device_id ux500_dt_irq_match[] = {
34 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 46 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
35 {}, 47 {},
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index 9fd93e9da529..e22b78626068 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -34,7 +34,6 @@ db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
34 return dbx500_add_amba_device(parent, name, base, irq, pdata, 0); 34 return dbx500_add_amba_device(parent, name, base, irq, pdata, 0);
35} 35}
36 36
37
38#define db8500_add_i2c0(parent, pdata) \ 37#define db8500_add_i2c0(parent, pdata) \
39 dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata) 38 dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
40#define db8500_add_i2c1(parent, pdata) \ 39#define db8500_add_i2c1(parent, pdata) \
@@ -46,15 +45,6 @@ db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
46#define db8500_add_i2c4(parent, pdata) \ 45#define db8500_add_i2c4(parent, pdata) \
47 dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata) 46 dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)
48 47
49#define db8500_add_msp0_i2s(parent, pdata) \
50 dbx500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata)
51#define db8500_add_msp1_i2s(parent, pdata) \
52 dbx500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata)
53#define db8500_add_msp2_i2s(parent, pdata) \
54 dbx500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata)
55#define db8500_add_msp3_i2s(parent, pdata) \
56 dbx500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata)
57
58#define db8500_add_msp0_spi(parent, pdata) \ 48#define db8500_add_msp0_spi(parent, pdata) \
59 dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \ 49 dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \
60 IRQ_DB8500_MSP0, pdata) 50 IRQ_DB8500_MSP0, pdata)
diff --git a/arch/arm/mach-ux500/include/mach/msp.h b/arch/arm/mach-ux500/include/mach/msp.h
new file mode 100644
index 000000000000..798be19129ef
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/msp.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL), version 2.
6 */
7
8#ifndef __MSP_H
9#define __MSP_H
10
11#include <plat/ste_dma40.h>
12
13enum msp_i2s_id {
14 MSP_I2S_0 = 0,
15 MSP_I2S_1,
16 MSP_I2S_2,
17 MSP_I2S_3,
18};
19
20/* Platform data structure for a MSP I2S-device */
21struct msp_i2s_platform_data {
22 enum msp_i2s_id id;
23 struct stedma40_chan_cfg *msp_i2s_dma_rx;
24 struct stedma40_chan_cfg *msp_i2s_dma_tx;
25 int (*msp_i2s_init) (void);
26 int (*msp_i2s_exit) (void);
27};
28
29#endif
diff --git a/arch/arm/mach-ux500/pins-db8500.h b/arch/arm/mach-ux500/pins-db8500.h
index 8b1d1a7a679e..062c7acf4576 100644
--- a/arch/arm/mach-ux500/pins-db8500.h
+++ b/arch/arm/mach-ux500/pins-db8500.h
@@ -35,40 +35,40 @@
35 35
36#define GPIO4_GPIO PIN_CFG(4, GPIO) 36#define GPIO4_GPIO PIN_CFG(4, GPIO)
37#define GPIO4_U1_RXD PIN_CFG(4, ALT_A) 37#define GPIO4_U1_RXD PIN_CFG(4, ALT_A)
38#define GPIO4_I2C4_SCL PIN_CFG_INPUT(4, ALT_B, PULLUP) 38#define GPIO4_I2C4_SCL PIN_CFG(4, ALT_B)
39#define GPIO4_IP_TRSTn PIN_CFG(4, ALT_C) 39#define GPIO4_IP_TRSTn PIN_CFG(4, ALT_C)
40 40
41#define GPIO5_GPIO PIN_CFG(5, GPIO) 41#define GPIO5_GPIO PIN_CFG(5, GPIO)
42#define GPIO5_U1_TXD PIN_CFG(5, ALT_A) 42#define GPIO5_U1_TXD PIN_CFG(5, ALT_A)
43#define GPIO5_I2C4_SDA PIN_CFG_INPUT(5, ALT_B, PULLUP) 43#define GPIO5_I2C4_SDA PIN_CFG(5, ALT_B)
44#define GPIO5_IP_GPIO6 PIN_CFG(5, ALT_C) 44#define GPIO5_IP_GPIO6 PIN_CFG(5, ALT_C)
45 45
46#define GPIO6_GPIO PIN_CFG(6, GPIO) 46#define GPIO6_GPIO PIN_CFG(6, GPIO)
47#define GPIO6_U1_CTSn PIN_CFG(6, ALT_A) 47#define GPIO6_U1_CTSn PIN_CFG(6, ALT_A)
48#define GPIO6_I2C1_SCL PIN_CFG_INPUT(6, ALT_B, PULLUP) 48#define GPIO6_I2C1_SCL PIN_CFG(6, ALT_B)
49#define GPIO6_IP_GPIO0 PIN_CFG(6, ALT_C) 49#define GPIO6_IP_GPIO0 PIN_CFG(6, ALT_C)
50 50
51#define GPIO7_GPIO PIN_CFG(7, GPIO) 51#define GPIO7_GPIO PIN_CFG(7, GPIO)
52#define GPIO7_U1_RTSn PIN_CFG(7, ALT_A) 52#define GPIO7_U1_RTSn PIN_CFG(7, ALT_A)
53#define GPIO7_I2C1_SDA PIN_CFG_INPUT(7, ALT_B, PULLUP) 53#define GPIO7_I2C1_SDA PIN_CFG(7, ALT_B)
54#define GPIO7_IP_GPIO1 PIN_CFG(7, ALT_C) 54#define GPIO7_IP_GPIO1 PIN_CFG(7, ALT_C)
55 55
56#define GPIO8_GPIO PIN_CFG(8, GPIO) 56#define GPIO8_GPIO PIN_CFG(8, GPIO)
57#define GPIO8_IPI2C_SDA PIN_CFG_INPUT(8, ALT_A, PULLUP) 57#define GPIO8_IPI2C_SDA PIN_CFG(8, ALT_A)
58#define GPIO8_I2C2_SDA PIN_CFG_INPUT(8, ALT_B, PULLUP) 58#define GPIO8_I2C2_SDA PIN_CFG(8, ALT_B)
59 59
60#define GPIO9_GPIO PIN_CFG(9, GPIO) 60#define GPIO9_GPIO PIN_CFG(9, GPIO)
61#define GPIO9_IPI2C_SCL PIN_CFG_INPUT(9, ALT_A, PULLUP) 61#define GPIO9_IPI2C_SCL PIN_CFG(9, ALT_A)
62#define GPIO9_I2C2_SCL PIN_CFG_INPUT(9, ALT_B, PULLUP) 62#define GPIO9_I2C2_SCL PIN_CFG(9, ALT_B)
63 63
64#define GPIO10_GPIO PIN_CFG(10, GPIO) 64#define GPIO10_GPIO PIN_CFG(10, GPIO)
65#define GPIO10_IPI2C_SDA PIN_CFG_INPUT(10, ALT_A, PULLUP) 65#define GPIO10_IPI2C_SDA PIN_CFG(10, ALT_A)
66#define GPIO10_I2C2_SDA PIN_CFG_INPUT(10, ALT_B, PULLUP) 66#define GPIO10_I2C2_SDA PIN_CFG(10, ALT_B)
67#define GPIO10_IP_GPIO3 PIN_CFG(10, ALT_C) 67#define GPIO10_IP_GPIO3 PIN_CFG(10, ALT_C)
68 68
69#define GPIO11_GPIO PIN_CFG(11, GPIO) 69#define GPIO11_GPIO PIN_CFG(11, GPIO)
70#define GPIO11_IPI2C_SCL PIN_CFG_INPUT(11, ALT_A, PULLUP) 70#define GPIO11_IPI2C_SCL PIN_CFG(11, ALT_A)
71#define GPIO11_I2C2_SCL PIN_CFG_INPUT(11, ALT_B, PULLUP) 71#define GPIO11_I2C2_SCL PIN_CFG(11, ALT_B)
72#define GPIO11_IP_GPIO2 PIN_CFG(11, ALT_C) 72#define GPIO11_IP_GPIO2 PIN_CFG(11, ALT_C)
73 73
74#define GPIO12_GPIO PIN_CFG(12, GPIO) 74#define GPIO12_GPIO PIN_CFG(12, GPIO)
@@ -87,12 +87,12 @@
87 87
88#define GPIO16_GPIO PIN_CFG(16, GPIO) 88#define GPIO16_GPIO PIN_CFG(16, GPIO)
89#define GPIO16_MSP0_RFS PIN_CFG(16, ALT_A) 89#define GPIO16_MSP0_RFS PIN_CFG(16, ALT_A)
90#define GPIO16_I2C1_SCL PIN_CFG_INPUT(16, ALT_B, PULLUP) 90#define GPIO16_I2C1_SCL PIN_CFG(16, ALT_B)
91#define GPIO16_SLIM0_DAT PIN_CFG(16, ALT_C) 91#define GPIO16_SLIM0_DAT PIN_CFG(16, ALT_C)
92 92
93#define GPIO17_GPIO PIN_CFG(17, GPIO) 93#define GPIO17_GPIO PIN_CFG(17, GPIO)
94#define GPIO17_MSP0_RCK PIN_CFG(17, ALT_A) 94#define GPIO17_MSP0_RCK PIN_CFG(17, ALT_A)
95#define GPIO17_I2C1_SDA PIN_CFG_INPUT(17, ALT_B, PULLUP) 95#define GPIO17_I2C1_SDA PIN_CFG(17, ALT_B)
96#define GPIO17_SLIM0_CLK PIN_CFG(17, ALT_C) 96#define GPIO17_SLIM0_CLK PIN_CFG(17, ALT_C)
97 97
98#define GPIO18_GPIO PIN_CFG(18, GPIO) 98#define GPIO18_GPIO PIN_CFG(18, GPIO)
@@ -434,10 +434,10 @@
434#define GPIO146_SSP0_TXD PIN_CFG(146, ALT_A) 434#define GPIO146_SSP0_TXD PIN_CFG(146, ALT_A)
435 435
436#define GPIO147_GPIO PIN_CFG(147, GPIO) 436#define GPIO147_GPIO PIN_CFG(147, GPIO)
437#define GPIO147_I2C0_SCL PIN_CFG_INPUT(147, ALT_A, PULLUP) 437#define GPIO147_I2C0_SCL PIN_CFG(147, ALT_A)
438 438
439#define GPIO148_GPIO PIN_CFG(148, GPIO) 439#define GPIO148_GPIO PIN_CFG(148, GPIO)
440#define GPIO148_I2C0_SDA PIN_CFG_INPUT(148, ALT_A, PULLUP) 440#define GPIO148_I2C0_SDA PIN_CFG(148, ALT_A)
441 441
442#define GPIO149_GPIO PIN_CFG(149, GPIO) 442#define GPIO149_GPIO PIN_CFG(149, GPIO)
443#define GPIO149_IP_GPIO0 PIN_CFG(149, ALT_A) 443#define GPIO149_IP_GPIO0 PIN_CFG(149, ALT_A)
@@ -459,82 +459,82 @@
459#define GPIO152_KP_O9 PIN_CFG(152, ALT_C) 459#define GPIO152_KP_O9 PIN_CFG(152, ALT_C)
460 460
461#define GPIO153_GPIO PIN_CFG(153, GPIO) 461#define GPIO153_GPIO PIN_CFG(153, GPIO)
462#define GPIO153_KP_I7 PIN_CFG_INPUT(153, ALT_A, PULLDOWN) 462#define GPIO153_KP_I7 PIN_CFG(153, ALT_A)
463#define GPIO153_LCD_D24 PIN_CFG(153, ALT_B) 463#define GPIO153_LCD_D24 PIN_CFG(153, ALT_B)
464#define GPIO153_U2_RXD PIN_CFG(153, ALT_C) 464#define GPIO153_U2_RXD PIN_CFG(153, ALT_C)
465 465
466#define GPIO154_GPIO PIN_CFG(154, GPIO) 466#define GPIO154_GPIO PIN_CFG(154, GPIO)
467#define GPIO154_KP_I6 PIN_CFG_INPUT(154, ALT_A, PULLDOWN) 467#define GPIO154_KP_I6 PIN_CFG(154, ALT_A)
468#define GPIO154_LCD_D25 PIN_CFG(154, ALT_B) 468#define GPIO154_LCD_D25 PIN_CFG(154, ALT_B)
469#define GPIO154_U2_TXD PIN_CFG(154, ALT_C) 469#define GPIO154_U2_TXD PIN_CFG(154, ALT_C)
470 470
471#define GPIO155_GPIO PIN_CFG(155, GPIO) 471#define GPIO155_GPIO PIN_CFG(155, GPIO)
472#define GPIO155_KP_I5 PIN_CFG_INPUT(155, ALT_A, PULLDOWN) 472#define GPIO155_KP_I5 PIN_CFG(155, ALT_A)
473#define GPIO155_LCD_D26 PIN_CFG(155, ALT_B) 473#define GPIO155_LCD_D26 PIN_CFG(155, ALT_B)
474#define GPIO155_STMAPE_CLK PIN_CFG(155, ALT_C) 474#define GPIO155_STMAPE_CLK PIN_CFG(155, ALT_C)
475 475
476#define GPIO156_GPIO PIN_CFG(156, GPIO) 476#define GPIO156_GPIO PIN_CFG(156, GPIO)
477#define GPIO156_KP_I4 PIN_CFG_INPUT(156, ALT_A, PULLDOWN) 477#define GPIO156_KP_I4 PIN_CFG(156, ALT_A)
478#define GPIO156_LCD_D27 PIN_CFG(156, ALT_B) 478#define GPIO156_LCD_D27 PIN_CFG(156, ALT_B)
479#define GPIO156_STMAPE_DAT3 PIN_CFG(156, ALT_C) 479#define GPIO156_STMAPE_DAT3 PIN_CFG(156, ALT_C)
480 480
481#define GPIO157_GPIO PIN_CFG(157, GPIO) 481#define GPIO157_GPIO PIN_CFG(157, GPIO)
482#define GPIO157_KP_O7 PIN_CFG_INPUT(157, ALT_A, PULLUP) 482#define GPIO157_KP_O7 PIN_CFG(157, ALT_A)
483#define GPIO157_LCD_D28 PIN_CFG(157, ALT_B) 483#define GPIO157_LCD_D28 PIN_CFG(157, ALT_B)
484#define GPIO157_STMAPE_DAT2 PIN_CFG(157, ALT_C) 484#define GPIO157_STMAPE_DAT2 PIN_CFG(157, ALT_C)
485 485
486#define GPIO158_GPIO PIN_CFG(158, GPIO) 486#define GPIO158_GPIO PIN_CFG(158, GPIO)
487#define GPIO158_KP_O6 PIN_CFG_INPUT(158, ALT_A, PULLUP) 487#define GPIO158_KP_O6 PIN_CFG(158, ALT_A)
488#define GPIO158_LCD_D29 PIN_CFG(158, ALT_B) 488#define GPIO158_LCD_D29 PIN_CFG(158, ALT_B)
489#define GPIO158_STMAPE_DAT1 PIN_CFG(158, ALT_C) 489#define GPIO158_STMAPE_DAT1 PIN_CFG(158, ALT_C)
490 490
491#define GPIO159_GPIO PIN_CFG(159, GPIO) 491#define GPIO159_GPIO PIN_CFG(159, GPIO)
492#define GPIO159_KP_O5 PIN_CFG_INPUT(159, ALT_A, PULLUP) 492#define GPIO159_KP_O5 PIN_CFG(159, ALT_A)
493#define GPIO159_LCD_D30 PIN_CFG(159, ALT_B) 493#define GPIO159_LCD_D30 PIN_CFG(159, ALT_B)
494#define GPIO159_STMAPE_DAT0 PIN_CFG(159, ALT_C) 494#define GPIO159_STMAPE_DAT0 PIN_CFG(159, ALT_C)
495 495
496#define GPIO160_GPIO PIN_CFG(160, GPIO) 496#define GPIO160_GPIO PIN_CFG(160, GPIO)
497#define GPIO160_KP_O4 PIN_CFG_INPUT(160, ALT_A, PULLUP) 497#define GPIO160_KP_O4 PIN_CFG(160, ALT_A)
498#define GPIO160_LCD_D31 PIN_CFG(160, ALT_B) 498#define GPIO160_LCD_D31 PIN_CFG(160, ALT_B)
499#define GPIO160_NONE PIN_CFG(160, ALT_C) 499#define GPIO160_NONE PIN_CFG(160, ALT_C)
500 500
501#define GPIO161_GPIO PIN_CFG(161, GPIO) 501#define GPIO161_GPIO PIN_CFG(161, GPIO)
502#define GPIO161_KP_I3 PIN_CFG_INPUT(161, ALT_A, PULLDOWN) 502#define GPIO161_KP_I3 PIN_CFG(161, ALT_A)
503#define GPIO161_LCD_D32 PIN_CFG(161, ALT_B) 503#define GPIO161_LCD_D32 PIN_CFG(161, ALT_B)
504#define GPIO161_UARTMOD_RXD PIN_CFG(161, ALT_C) 504#define GPIO161_UARTMOD_RXD PIN_CFG(161, ALT_C)
505 505
506#define GPIO162_GPIO PIN_CFG(162, GPIO) 506#define GPIO162_GPIO PIN_CFG(162, GPIO)
507#define GPIO162_KP_I2 PIN_CFG_INPUT(162, ALT_A, PULLDOWN) 507#define GPIO162_KP_I2 PIN_CFG(162, ALT_A)
508#define GPIO162_LCD_D33 PIN_CFG(162, ALT_B) 508#define GPIO162_LCD_D33 PIN_CFG(162, ALT_B)
509#define GPIO162_UARTMOD_TXD PIN_CFG(162, ALT_C) 509#define GPIO162_UARTMOD_TXD PIN_CFG(162, ALT_C)
510 510
511#define GPIO163_GPIO PIN_CFG(163, GPIO) 511#define GPIO163_GPIO PIN_CFG(163, GPIO)
512#define GPIO163_KP_I1 PIN_CFG_INPUT(163, ALT_A, PULLDOWN) 512#define GPIO163_KP_I1 PIN_CFG(163, ALT_A)
513#define GPIO163_LCD_D34 PIN_CFG(163, ALT_B) 513#define GPIO163_LCD_D34 PIN_CFG(163, ALT_B)
514#define GPIO163_STMMOD_CLK PIN_CFG(163, ALT_C) 514#define GPIO163_STMMOD_CLK PIN_CFG(163, ALT_C)
515 515
516#define GPIO164_GPIO PIN_CFG(164, GPIO) 516#define GPIO164_GPIO PIN_CFG(164, GPIO)
517#define GPIO164_KP_I0 PIN_CFG_INPUT(164, ALT_A, PULLUP) 517#define GPIO164_KP_I0 PIN_CFG(164, ALT_A)
518#define GPIO164_LCD_D35 PIN_CFG(164, ALT_B) 518#define GPIO164_LCD_D35 PIN_CFG(164, ALT_B)
519#define GPIO164_STMMOD_DAT3 PIN_CFG(164, ALT_C) 519#define GPIO164_STMMOD_DAT3 PIN_CFG(164, ALT_C)
520 520
521#define GPIO165_GPIO PIN_CFG(165, GPIO) 521#define GPIO165_GPIO PIN_CFG(165, GPIO)
522#define GPIO165_KP_O3 PIN_CFG_INPUT(165, ALT_A, PULLUP) 522#define GPIO165_KP_O3 PIN_CFG(165, ALT_A)
523#define GPIO165_LCD_D36 PIN_CFG(165, ALT_B) 523#define GPIO165_LCD_D36 PIN_CFG(165, ALT_B)
524#define GPIO165_STMMOD_DAT2 PIN_CFG(165, ALT_C) 524#define GPIO165_STMMOD_DAT2 PIN_CFG(165, ALT_C)
525 525
526#define GPIO166_GPIO PIN_CFG(166, GPIO) 526#define GPIO166_GPIO PIN_CFG(166, GPIO)
527#define GPIO166_KP_O2 PIN_CFG_INPUT(166, ALT_A, PULLUP) 527#define GPIO166_KP_O2 PIN_CFG(166, ALT_A)
528#define GPIO166_LCD_D37 PIN_CFG(166, ALT_B) 528#define GPIO166_LCD_D37 PIN_CFG(166, ALT_B)
529#define GPIO166_STMMOD_DAT1 PIN_CFG(166, ALT_C) 529#define GPIO166_STMMOD_DAT1 PIN_CFG(166, ALT_C)
530 530
531#define GPIO167_GPIO PIN_CFG(167, GPIO) 531#define GPIO167_GPIO PIN_CFG(167, GPIO)
532#define GPIO167_KP_O1 PIN_CFG_INPUT(167, ALT_A, PULLUP) 532#define GPIO167_KP_O1 PIN_CFG(167, ALT_A)
533#define GPIO167_LCD_D38 PIN_CFG(167, ALT_B) 533#define GPIO167_LCD_D38 PIN_CFG(167, ALT_B)
534#define GPIO167_STMMOD_DAT0 PIN_CFG(167, ALT_C) 534#define GPIO167_STMMOD_DAT0 PIN_CFG(167, ALT_C)
535 535
536#define GPIO168_GPIO PIN_CFG(168, GPIO) 536#define GPIO168_GPIO PIN_CFG(168, GPIO)
537#define GPIO168_KP_O0 PIN_CFG_INPUT(168, ALT_A, PULLUP) 537#define GPIO168_KP_O0 PIN_CFG(168, ALT_A)
538#define GPIO168_LCD_D39 PIN_CFG(168, ALT_B) 538#define GPIO168_LCD_D39 PIN_CFG(168, ALT_B)
539#define GPIO168_NONE PIN_CFG(168, ALT_C) 539#define GPIO168_NONE PIN_CFG(168, ALT_C)
540 540
@@ -637,7 +637,7 @@
637#define GPIO216_GPIO PIN_CFG(216, GPIO) 637#define GPIO216_GPIO PIN_CFG(216, GPIO)
638#define GPIO216_MC1_DAT2DIR PIN_CFG(216, ALT_A) 638#define GPIO216_MC1_DAT2DIR PIN_CFG(216, ALT_A)
639#define GPIO216_MC3_CMDDIR PIN_CFG(216, ALT_B) 639#define GPIO216_MC3_CMDDIR PIN_CFG(216, ALT_B)
640#define GPIO216_I2C3_SDA PIN_CFG_INPUT(216, ALT_C, PULLUP) 640#define GPIO216_I2C3_SDA PIN_CFG(216, ALT_C)
641#define GPIO216_SPI2_FRM PIN_CFG(216, ALT_C) 641#define GPIO216_SPI2_FRM PIN_CFG(216, ALT_C)
642 642
643#define GPIO217_GPIO PIN_CFG(217, GPIO) 643#define GPIO217_GPIO PIN_CFG(217, GPIO)
@@ -649,7 +649,7 @@
649#define GPIO218_GPIO PIN_CFG(218, GPIO) 649#define GPIO218_GPIO PIN_CFG(218, GPIO)
650#define GPIO218_MC1_DAT31DIR PIN_CFG(218, ALT_A) 650#define GPIO218_MC1_DAT31DIR PIN_CFG(218, ALT_A)
651#define GPIO218_MC3_DAT0DIR PIN_CFG(218, ALT_B) 651#define GPIO218_MC3_DAT0DIR PIN_CFG(218, ALT_B)
652#define GPIO218_I2C3_SCL PIN_CFG_INPUT(218, ALT_C, PULLUP) 652#define GPIO218_I2C3_SCL PIN_CFG(218, ALT_C)
653#define GPIO218_SPI2_RXD PIN_CFG(218, ALT_C) 653#define GPIO218_SPI2_RXD PIN_CFG(218, ALT_C)
654 654
655#define GPIO219_GPIO PIN_CFG(219, GPIO) 655#define GPIO219_GPIO PIN_CFG(219, GPIO)
@@ -698,12 +698,12 @@
698#define GPIO229_GPIO PIN_CFG(229, GPIO) 698#define GPIO229_GPIO PIN_CFG(229, GPIO)
699#define GPIO229_CLKOUT1 PIN_CFG(229, ALT_A) 699#define GPIO229_CLKOUT1 PIN_CFG(229, ALT_A)
700#define GPIO229_PWL PIN_CFG(229, ALT_B) 700#define GPIO229_PWL PIN_CFG(229, ALT_B)
701#define GPIO229_I2C3_SDA PIN_CFG_INPUT(229, ALT_C, PULLUP) 701#define GPIO229_I2C3_SDA PIN_CFG(229, ALT_C)
702 702
703#define GPIO230_GPIO PIN_CFG(230, GPIO) 703#define GPIO230_GPIO PIN_CFG(230, GPIO)
704#define GPIO230_CLKOUT2 PIN_CFG(230, ALT_A) 704#define GPIO230_CLKOUT2 PIN_CFG(230, ALT_A)
705#define GPIO230_PWL PIN_CFG(230, ALT_B) 705#define GPIO230_PWL PIN_CFG(230, ALT_B)
706#define GPIO230_I2C3_SCL PIN_CFG_INPUT(230, ALT_C, PULLUP) 706#define GPIO230_I2C3_SCL PIN_CFG(230, ALT_C)
707 707
708#define GPIO256_GPIO PIN_CFG(256, GPIO) 708#define GPIO256_GPIO PIN_CFG(256, GPIO)
709#define GPIO256_USB_NXT PIN_CFG(256, ALT_A) 709#define GPIO256_USB_NXT PIN_CFG(256, ALT_A)
diff --git a/arch/arm/mach-ux500/pins.c b/arch/arm/mach-ux500/pins.c
new file mode 100644
index 000000000000..38c1d47b29a1
--- /dev/null
+++ b/arch/arm/mach-ux500/pins.c
@@ -0,0 +1,88 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL), version 2
6 */
7
8#include <linux/kernel.h>
9#include <linux/string.h>
10#include <linux/device.h>
11#include <linux/mutex.h>
12#include <linux/spinlock.h>
13#include <linux/err.h>
14#include <plat/pincfg.h>
15
16#include "pins.h"
17
18static LIST_HEAD(pin_lookups);
19static DEFINE_MUTEX(pin_lookups_mutex);
20static DEFINE_SPINLOCK(pins_lock);
21
22void __init ux500_pins_add(struct ux500_pin_lookup *pl, size_t num)
23{
24 mutex_lock(&pin_lookups_mutex);
25
26 while (num--) {
27 list_add_tail(&pl->node, &pin_lookups);
28 pl++;
29 }
30
31 mutex_unlock(&pin_lookups_mutex);
32}
33
34struct ux500_pins *ux500_pins_get(const char *name)
35{
36 struct ux500_pins *pins = NULL;
37 struct ux500_pin_lookup *pl;
38
39 mutex_lock(&pin_lookups_mutex);
40
41 list_for_each_entry(pl, &pin_lookups, node) {
42 if (!strcmp(pl->name, name)) {
43 pins = pl->pins;
44 goto out;
45 }
46 }
47
48out:
49 mutex_unlock(&pin_lookups_mutex);
50 return pins;
51}
52
53int ux500_pins_enable(struct ux500_pins *pins)
54{
55 unsigned long flags;
56 int ret = 0;
57
58 spin_lock_irqsave(&pins_lock, flags);
59
60 if (pins->usage++ == 0)
61 ret = nmk_config_pins(pins->cfg, pins->num);
62
63 spin_unlock_irqrestore(&pins_lock, flags);
64 return ret;
65}
66
67int ux500_pins_disable(struct ux500_pins *pins)
68{
69 unsigned long flags;
70 int ret = 0;
71
72 spin_lock_irqsave(&pins_lock, flags);
73
74 if (WARN_ON(pins->usage == 0))
75 goto out;
76
77 if (--pins->usage == 0)
78 ret = nmk_config_pins_sleep(pins->cfg, pins->num);
79
80out:
81 spin_unlock_irqrestore(&pins_lock, flags);
82 return ret;
83}
84
85void ux500_pins_put(struct ux500_pins *pins)
86{
87 WARN_ON(!pins);
88}
diff --git a/arch/arm/mach-ux500/pins.h b/arch/arm/mach-ux500/pins.h
new file mode 100644
index 000000000000..0d36af2e7d92
--- /dev/null
+++ b/arch/arm/mach-ux500/pins.h
@@ -0,0 +1,46 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL), version 2
6 */
7
8#ifndef __MACH_UX500_PINS_H
9#define __MACH_UX500_PINS_H
10
11#include <linux/list.h>
12#include <plat/pincfg.h>
13
14#define PIN_LOOKUP(_name, _pins) \
15{ \
16 .name = _name, \
17 .pins = _pins, \
18}
19
20#define UX500_PINS(name, pins...) \
21struct ux500_pins name = { \
22 .cfg = (pin_cfg_t[]) {pins}, \
23 .num = ARRAY_SIZE(((pin_cfg_t[]) {pins})), \
24}
25
26struct ux500_pins {
27 int usage;
28 int num;
29 pin_cfg_t *cfg;
30};
31
32struct ux500_pin_lookup {
33 struct list_head node;
34 const char *name;
35 struct ux500_pins *pins;
36};
37
38void __init ux500_pins_add(struct ux500_pin_lookup *pl, size_t num);
39void __init ux500_offchip_gpio_init(struct ux500_pins *pins);
40struct ux500_pins *ux500_pins_get(const char *name);
41int ux500_pins_enable(struct ux500_pins *pins);
42int ux500_pins_disable(struct ux500_pins *pins);
43void ux500_pins_put(struct ux500_pins *pins);
44int pins_for_u9500(void);
45
46#endif
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index d2058ef8345f..eff5842f6232 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -99,7 +99,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
99 */ 99 */
100 write_pen_release(cpu_logical_map(cpu)); 100 write_pen_release(cpu_logical_map(cpu));
101 101
102 gic_raise_softirq(cpumask_of(cpu), 1); 102 smp_send_reschedule(cpu);
103 103
104 timeout = jiffies + (1 * HZ); 104 timeout = jiffies + (1 * HZ);
105 while (time_before(jiffies, timeout)) { 105 while (time_before(jiffies, timeout)) {
diff --git a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
index 9605bf227df9..3e8b7f16fb78 100644
--- a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
+++ b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
@@ -29,6 +29,7 @@
29#define NMK_GPIO_SLPC 0x1c 29#define NMK_GPIO_SLPC 0x1c
30#define NMK_GPIO_AFSLA 0x20 30#define NMK_GPIO_AFSLA 0x20
31#define NMK_GPIO_AFSLB 0x24 31#define NMK_GPIO_AFSLB 0x24
32#define NMK_GPIO_LOWEMI 0x28
32 33
33#define NMK_GPIO_RIMSC 0x40 34#define NMK_GPIO_RIMSC 0x40
34#define NMK_GPIO_FIMSC 0x44 35#define NMK_GPIO_FIMSC 0x44
diff --git a/arch/arm/plat-nomadik/include/plat/pincfg.h b/arch/arm/plat-nomadik/include/plat/pincfg.h
index 22cb97d2d8ad..c015133a7ad3 100644
--- a/arch/arm/plat-nomadik/include/plat/pincfg.h
+++ b/arch/arm/plat-nomadik/include/plat/pincfg.h
@@ -24,6 +24,7 @@
24 * bit 16..18 - SLPM pull up/down state 24 * bit 16..18 - SLPM pull up/down state
25 * bit 19..20 - SLPM direction 25 * bit 19..20 - SLPM direction
26 * bit 21..22 - SLPM Value (if output) 26 * bit 21..22 - SLPM Value (if output)
27 * bit 23..25 - PDIS value (if input)
27 * 28 *
28 * to facilitate the definition, the following macros are provided 29 * to facilitate the definition, the following macros are provided
29 * 30 *
@@ -67,6 +68,10 @@ typedef unsigned long pin_cfg_t;
67/* These two replace the above in DB8500v2+ */ 68/* These two replace the above in DB8500v2+ */
68#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT) 69#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
69#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT) 70#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
71#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
72
73#define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
74#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
70 75
71#define PIN_DIR_SHIFT 14 76#define PIN_DIR_SHIFT 14
72#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT) 77#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT)
@@ -105,6 +110,20 @@ typedef unsigned long pin_cfg_t;
105#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT) 110#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT)
106#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT) 111#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT)
107 112
113#define PIN_SLPM_PDIS_SHIFT 23
114#define PIN_SLPM_PDIS_MASK (0x3 << PIN_SLPM_PDIS_SHIFT)
115#define PIN_SLPM_PDIS(x) \
116 (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
117#define PIN_SLPM_PDIS_NO_CHANGE (0 << PIN_SLPM_PDIS_SHIFT)
118#define PIN_SLPM_PDIS_DISABLED (1 << PIN_SLPM_PDIS_SHIFT)
119#define PIN_SLPM_PDIS_ENABLED (2 << PIN_SLPM_PDIS_SHIFT)
120
121#define PIN_LOWEMI_SHIFT 25
122#define PIN_LOWEMI_MASK (0x1 << PIN_LOWEMI_SHIFT)
123#define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
124#define PIN_LOWEMI_DISABLED (0 << PIN_LOWEMI_SHIFT)
125#define PIN_LOWEMI_ENABLED (1 << PIN_LOWEMI_SHIFT)
126
108/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */ 127/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */
109#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN) 128#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN)
110#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP) 129#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 8070145ccb98..3f26db4ee8e6 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields {
305 * @rev_offs: IP block revision register offset (from module base addr) 305 * @rev_offs: IP block revision register offset (from module base addr)
306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) 306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) 307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
308 * @srst_udelay: Delay needed after doing a softreset in usecs
308 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} 309 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
309 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported 310 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
310 * @clockact: the default value of the module CLOCKACTIVITY bits 311 * @clockact: the default value of the module CLOCKACTIVITY bits
@@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig {
330 u16 sysc_offs; 331 u16 sysc_offs;
331 u16 syss_offs; 332 u16 syss_offs;
332 u16 sysc_flags; 333 u16 sysc_flags;
334 struct omap_hwmod_sysc_fields *sysc_fields;
335 u8 srst_udelay;
333 u8 idlemodes; 336 u8 idlemodes;
334 u8 clockact; 337 u8 clockact;
335 struct omap_hwmod_sysc_fields *sysc_fields;
336}; 338};
337 339
338/** 340/**
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index eec98afa0f83..f9a8c5341ee9 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -348,7 +348,6 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
348 sdrc_actim_ctrl_b_1, sdrc_mr_1); 348 sdrc_actim_ctrl_b_1, sdrc_mr_1);
349} 349}
350 350
351#ifdef CONFIG_PM
352void omap3_sram_restore_context(void) 351void omap3_sram_restore_context(void)
353{ 352{
354 omap_sram_ceil = omap_sram_base + omap_sram_size; 353 omap_sram_ceil = omap_sram_base + omap_sram_size;
@@ -358,17 +357,18 @@ void omap3_sram_restore_context(void)
358 omap3_sram_configure_core_dpll_sz); 357 omap3_sram_configure_core_dpll_sz);
359 omap_push_sram_idle(); 358 omap_push_sram_idle();
360} 359}
361#endif /* CONFIG_PM */
362
363#endif /* CONFIG_ARCH_OMAP3 */
364 360
365static inline int omap34xx_sram_init(void) 361static inline int omap34xx_sram_init(void)
366{ 362{
367#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
368 omap3_sram_restore_context(); 363 omap3_sram_restore_context();
369#endif
370 return 0; 364 return 0;
371} 365}
366#else
367static inline int omap34xx_sram_init(void)
368{
369 return 0;
370}
371#endif /* CONFIG_ARCH_OMAP3 */
372 372
373static inline int am33xx_sram_init(void) 373static inline int am33xx_sram_init(void)
374{ 374{
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 11:23:22 -0500