diff options
| author | Lothar Waßmann <LW@KARO-electronics.de> | 2016-01-20 05:08:58 -0500 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2016-02-29 03:17:40 -0500 |
| commit | c530d23a0ac7845fccd4fed9c0f147962a2bad48 (patch) | |
| tree | 69626a0d5e66708a0c94a108217c52a94736a280 /arch/arm | |
| parent | d97ca99f3ea8ed3b12c88b51ad53dd6c9bf7ae5d (diff) | |
ARM: dts: imx6ul: specify proper clocks for the PWM nodes
i.MX6UL PWMs require real clocks. Define the appropriate clocks for
the PWM units.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index e6e3e54604b1..3aba0bbdde02 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi | |||
| @@ -508,8 +508,8 @@ | |||
| 508 | compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; | 508 | compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; |
| 509 | reg = <0x020f0000 0x4000>; | 509 | reg = <0x020f0000 0x4000>; |
| 510 | interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; | 510 | interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; |
| 511 | clocks = <&clks IMX6UL_CLK_DUMMY>, | 511 | clocks = <&clks IMX6UL_CLK_PWM5>, |
| 512 | <&clks IMX6UL_CLK_DUMMY>; | 512 | <&clks IMX6UL_CLK_PWM5>; |
| 513 | clock-names = "ipg", "per"; | 513 | clock-names = "ipg", "per"; |
| 514 | #pwm-cells = <2>; | 514 | #pwm-cells = <2>; |
| 515 | }; | 515 | }; |
| @@ -518,8 +518,8 @@ | |||
| 518 | compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; | 518 | compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; |
| 519 | reg = <0x020f4000 0x4000>; | 519 | reg = <0x020f4000 0x4000>; |
| 520 | interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; | 520 | interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; |
| 521 | clocks = <&clks IMX6UL_CLK_DUMMY>, | 521 | clocks = <&clks IMX6UL_CLK_PWM6>, |
| 522 | <&clks IMX6UL_CLK_DUMMY>; | 522 | <&clks IMX6UL_CLK_PWM6>; |
| 523 | clock-names = "ipg", "per"; | 523 | clock-names = "ipg", "per"; |
| 524 | #pwm-cells = <2>; | 524 | #pwm-cells = <2>; |
| 525 | }; | 525 | }; |
| @@ -528,8 +528,8 @@ | |||
| 528 | compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; | 528 | compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; |
| 529 | reg = <0x020f8000 0x4000>; | 529 | reg = <0x020f8000 0x4000>; |
| 530 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | 530 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
| 531 | clocks = <&clks IMX6UL_CLK_DUMMY>, | 531 | clocks = <&clks IMX6UL_CLK_PWM7>, |
| 532 | <&clks IMX6UL_CLK_DUMMY>; | 532 | <&clks IMX6UL_CLK_PWM7>; |
| 533 | clock-names = "ipg", "per"; | 533 | clock-names = "ipg", "per"; |
| 534 | #pwm-cells = <2>; | 534 | #pwm-cells = <2>; |
| 535 | }; | 535 | }; |
| @@ -538,8 +538,8 @@ | |||
| 538 | compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; | 538 | compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; |
| 539 | reg = <0x020fc000 0x4000>; | 539 | reg = <0x020fc000 0x4000>; |
| 540 | interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; | 540 | interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; |
| 541 | clocks = <&clks IMX6UL_CLK_DUMMY>, | 541 | clocks = <&clks IMX6UL_CLK_PWM8>, |
| 542 | <&clks IMX6UL_CLK_DUMMY>; | 542 | <&clks IMX6UL_CLK_PWM8>; |
| 543 | clock-names = "ipg", "per"; | 543 | clock-names = "ipg", "per"; |
| 544 | #pwm-cells = <2>; | 544 | #pwm-cells = <2>; |
| 545 | }; | 545 | }; |