Merge tag 'mxs-sparse-irq' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc2

The series adds irqdomain support for mach-mxs and then enables
sparse-irq.  It dependes on pull request mxs-dt-3.7.

* tag 'mxs-sparse-irq' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mxs: remove mach/irqs.h
  ARM: mxs: select SPARSE_IRQ
  ARM: mxs: adopt irq_domain support for icoll driver
  ARM: mxs: select MULTI_IRQ_HANDLER
  ARM: mxs: retrieve timer irq from device tree
  gpio/mxs: adopt irq_domain support for mxs gpio driver

9 files changed, 80 insertions, 117 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e91c7cdc6fe5..58bffb386a8b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -489,7 +489,9 @@ config ARCH_MXS
         select CLKSRC_MMIO
         select COMMON_CLK
         select HAVE_CLK_PREPARE
+        select MULTI_IRQ_HANDLER
         select PINCTRL
+        select SPARSE_IRQ
         select USE_OF
         help
           Support for Freescale MXS-based family of processors
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index e6138310e5ce..bee37226399a 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -43,7 +43,7 @@
                         ranges;
 
                         icoll: interrupt-controller@80000000 {
-                                compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";
+                                compatible = "fsl,imx23-icoll", "fsl,icoll";
                                 interrupt-controller;
                                 #interrupt-cells = <1>;
                                 reg = <0x80000000 0x2000>;
@@ -389,8 +389,9 @@
                         };
 
                         timrot@80068000 {
+                                compatible = "fsl,imx23-timrot", "fsl,timrot";
                                 reg = <0x80068000 0x2000>;
-                                status = "disabled";
+                                interrupts = <28 29 30 31>;
                         };
 
                         auart0: serial@8006c000 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 3fa6d190fab4..99f7d7a8ba28 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -50,7 +50,7 @@
                         ranges;
 
                         icoll: interrupt-controller@80000000 {
-                                compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
+                                compatible = "fsl,imx28-icoll", "fsl,icoll";
                                 interrupt-controller;
                                 #interrupt-cells = <1>;
                                 reg = <0x80000000 0x2000>;
@@ -683,8 +683,9 @@
                         };
 
                         timrot@80068000 {
+                                compatible = "fsl,imx28-timrot", "fsl,timrot";
                                 reg = <0x80068000 0x2000>;
-                                status = "disabled";
+                                interrupts = <48 49 50 51>;
                         };
 
                         auart0: serial@8006a000 {
diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c
index 23ca9d083b2c..8fb23af154b3 100644
--- a/arch/arm/mach-mxs/icoll.c
+++ b/arch/arm/mach-mxs/icoll.c
@@ -19,20 +19,27 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <linux/irqdomain.h>
 #include <linux/io.h>
-
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <asm/exception.h>
 #include <mach/mxs.h>
 #include <mach/common.h>
 
 #define HW_ICOLL_VECTOR                         0x0000
 #define HW_ICOLL_LEVELACK                       0x0010
 #define HW_ICOLL_CTRL                           0x0020
+#define HW_ICOLL_STAT_OFFSET                    0x0070
 #define HW_ICOLL_INTERRUPTn_SET(n)              (0x0124 + (n) * 0x10)
 #define HW_ICOLL_INTERRUPTn_CLR(n)              (0x0128 + (n) * 0x10)
 #define BM_ICOLL_INTERRUPTn_ENABLE              0x00000004
 #define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0   0x1
 
+#define ICOLL_NUM_IRQS          128
+
 static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR);
+static struct irq_domain *icoll_domain;
 
 static void icoll_ack_irq(struct irq_data *d)
 {
@@ -48,13 +55,13 @@ static void icoll_ack_irq(struct irq_data *d)
 static void icoll_mask_irq(struct irq_data *d)
 {
         __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
-                        icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->irq));
+                        icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->hwirq));
 }
 
 static void icoll_unmask_irq(struct irq_data *d)
 {
         __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
-                        icoll_base + HW_ICOLL_INTERRUPTn_SET(d->irq));
+                        icoll_base + HW_ICOLL_INTERRUPTn_SET(d->hwirq));
 }
 
 static struct irq_chip mxs_icoll_chip = {
@@ -63,18 +70,56 @@ static struct irq_chip mxs_icoll_chip = {
         .irq_unmask = icoll_unmask_irq,
 };
 
-void __init icoll_init_irq(void)
+asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
 {
-        int i;
+        u32 irqnr;
+
+        do {
+                irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET);
+                if (irqnr != 0x7f) {
+                        __raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR);
+                        irqnr = irq_find_mapping(icoll_domain, irqnr);
+                        handle_IRQ(irqnr, regs);
+                        continue;
+                }
+                break;
+        } while (1);
+}
+
+static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,
+                                irq_hw_number_t hw)
+{
+        irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq);
+        set_irq_flags(virq, IRQF_VALID);
+
+        return 0;
+}
 
+static struct irq_domain_ops icoll_irq_domain_ops = {
+        .map = icoll_irq_domain_map,
+        .xlate = irq_domain_xlate_onecell,
+};
+
+void __init icoll_of_init(struct device_node *np,
+                          struct device_node *interrupt_parent)
+{
         /*
          * Interrupt Collector reset, which initializes the priority
          * for each irq to level 0.
          */
         mxs_reset_block(icoll_base + HW_ICOLL_CTRL);
 
-        for (i = 0; i < MXS_INTERNAL_IRQS; i++) {
-                irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq);
-                set_irq_flags(i, IRQF_VALID);
-        }
+        icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS,
+                                             &icoll_irq_domain_ops, NULL);
+        WARN_ON(!icoll_domain);
+}
+
+static const struct of_device_id icoll_of_match[] __initconst = {
+        {.compatible = "fsl,icoll", .data = icoll_of_init},
+        { /* sentinel */ }
+};
+
+void __init icoll_init_irq(void)
+{
+        of_irq_init(icoll_of_match);
 }
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index de6c7ba42544..10e4e12df870 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -13,7 +13,7 @@
 
 extern const u32 *mxs_get_ocotp(void);
 extern int mxs_reset_block(void __iomem *);
-extern void mxs_timer_init(int);
+extern void mxs_timer_init(void);
 extern void mxs_restart(char, const char *);
 extern int mxs_saif_clkmux_select(unsigned int clkmux);
 
@@ -28,6 +28,7 @@ extern void mx28_map_io(void);
 extern void mx28_init_irq(void);
 
 extern void icoll_init_irq(void);
+extern void icoll_handle_irq(struct pt_regs *);
 
 extern struct platform_device *mxs_add_dma(const char *devid,
                                                 resource_size_t base);
diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S
deleted file mode 100644
index 0c14259705b9..000000000000
--- a/arch/arm/mach-mxs/include/mach/entry-macro.S
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Low-level IRQ helper macros for Freescale MXS-based
- *
- * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-#include <mach/mxs.h>
-
-#define MXS_ICOLL_VBASE         MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR)
-#define HW_ICOLL_STAT_OFFSET    0x70
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        ldr     \irqnr, [\base, #HW_ICOLL_STAT_OFFSET]
-        cmp     \irqnr, #0x7F
-        strne   \irqnr, [\base]
-        moveqs  \irqnr, #0
-        .endm
-
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =MXS_ICOLL_VBASE
-        .endm
diff --git a/arch/arm/mach-mxs/include/mach/irqs.h b/arch/arm/mach-mxs/include/mach/irqs.h
deleted file mode 100644
index f771039b814a..000000000000
--- a/arch/arm/mach-mxs/include/mach/irqs.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_MXS_IRQS_H__
-#define __MACH_MXS_IRQS_H__
-
-#define MXS_INTERNAL_IRQS       128
-
-#define MXS_GPIO_IRQ_START      MXS_INTERNAL_IRQS
-
-/* the maximum for MXS-based */
-#define MXS_GPIO_IRQS           (32 * 5)
-
-/*
- * The next 16 interrupts are for board specific purposes.  Since
- * the kernel can only run on one machine at a time, we can re-use
- * these.  If you need more, increase MXS_BOARD_IRQS, but keep it
- * within sensible limits.
- */
-#define MXS_BOARD_IRQ_START     (MXS_GPIO_IRQ_START + MXS_GPIO_IRQS)
-#define MXS_BOARD_IRQS          16
-
-#define NR_IRQS                 (MXS_BOARD_IRQ_START + MXS_BOARD_IRQS)
-
-#endif /* __MACH_MXS_IRQS_H__ */
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 8dabfe81d07c..256ec656fc65 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -15,10 +15,8 @@
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/init.h>
-#include <linux/irqdomain.h>
 #include <linux/micrel_phy.h>
 #include <linux/mxsfb.h>
-#include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/phy.h>
 #include <asm/mach/arch.h>
@@ -105,37 +103,6 @@ static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
         { /* sentinel */ }
 };
 
-static int __init mxs_icoll_add_irq_domain(struct device_node *np,
-                                struct device_node *interrupt_parent)
-{
-        irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
-
-        return 0;
-}
-
-static int __init mxs_gpio_add_irq_domain(struct device_node *np,
-                                struct device_node *interrupt_parent)
-{
-        static int gpio_irq_base = MXS_GPIO_IRQ_START;
-
-        irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
-        gpio_irq_base += 32;
-
-        return 0;
-}
-
-static const struct of_device_id mxs_irq_match[] __initconst = {
-        { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, },
-        { .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, },
-        { /* sentinel */ }
-};
-
-static void __init mxs_dt_init_irq(void)
-{
-        icoll_init_irq();
-        of_irq_init(mxs_irq_match);
-}
-
 static void __init imx23_timer_init(void)
 {
         mx23_clocks_init();
@@ -305,7 +272,8 @@ static const char *imx28_dt_compat[] __initdata = {
 
 DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
         .map_io         = mx23_map_io,
-        .init_irq       = mxs_dt_init_irq,
+        .init_irq       = icoll_init_irq,
+        .handle_irq     = icoll_handle_irq,
         .timer          = &imx23_timer,
         .init_machine   = mxs_machine_init,
         .dt_compat      = imx23_dt_compat,
@@ -314,7 +282,8 @@ MACHINE_END
 
 DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
         .map_io         = mx28_map_io,
-        .init_irq       = mxs_dt_init_irq,
+        .init_irq       = icoll_init_irq,
+        .handle_irq     = icoll_handle_irq,
         .timer          = &imx28_timer,
         .init_machine   = mxs_machine_init,
         .dt_compat      = imx28_dt_compat,
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index 02d36de9c4e8..7c3792613392 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -25,6 +25,8 @@
 #include <linux/irq.h>
 #include <linux/clockchips.h>
 #include <linux/clk.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
 #include <mach/mxs.h>
@@ -244,9 +246,17 @@ static int __init mxs_clocksource_init(struct clk *timer_clk)
         return 0;
 }
 
-void __init mxs_timer_init(int irq)
+void __init mxs_timer_init(void)
 {
+        struct device_node *np;
         struct clk *timer_clk;
+        int irq;
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,timrot");
+        if (!np) {
+                pr_err("%s: failed find timrot node\n", __func__);
+                return;
+        }
 
         timer_clk = clk_get_sys("timrot", NULL);
         if (IS_ERR(timer_clk)) {
@@ -295,5 +305,6 @@ void __init mxs_timer_init(int irq)
         mxs_clockevent_init(timer_clk);
 
         /* Make irqs happen */
+        irq = irq_of_parse_and_map(np, 0);
         setup_irq(irq, &mxs_timer_irq);
 }