Merge tag 'kvm-4.15-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM updates from Radim Krčmář:
 "First batch of KVM changes for 4.15

  Common:
   - Python 3 support in kvm_stat
   - Accounting of slabs to kmemcg

  ARM:
   - Optimized arch timer handling for KVM/ARM
   - Improvements to the VGIC ITS code and introduction of an ITS reset
     ioctl
   - Unification of the 32-bit fault injection logic
   - More exact external abort matching logic

  PPC:
   - Support for running hashed page table (HPT) MMU mode on a host that
     is using the radix MMU mode; single threaded mode on POWER 9 is
     added as a pre-requisite
   - Resolution of merge conflicts with the last second 4.14 HPT fixes
   - Fixes and cleanups

  s390:
   - Some initial preparation patches for exitless interrupts and crypto
   - New capability for AIS migration
   - Fixes

  x86:
   - Improved emulation of LAPIC timer mode changes, MCi_STATUS MSRs,
     and after-reset state
   - Refined dependencies for VMX features
   - Fixes for nested SMI injection
   - A lot of cleanups"

* tag 'kvm-4.15-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (89 commits)
  KVM: s390: provide a capability for AIS state migration
  KVM: s390: clear_io_irq() requests are not expected for adapter interrupts
  KVM: s390: abstract conversion between isc and enum irq_types
  KVM: s390: vsie: use common code functions for pinning
  KVM: s390: SIE considerations for AP Queue virtualization
  KVM: s390: document memory ordering for kvm_s390_vcpu_wakeup
  KVM: PPC: Book3S HV: Cosmetic post-merge cleanups
  KVM: arm/arm64: fix the incompatible matching for external abort
  KVM: arm/arm64: Unify 32bit fault injection
  KVM: arm/arm64: vgic-its: Implement KVM_DEV_ARM_ITS_CTRL_RESET
  KVM: arm/arm64: Document KVM_DEV_ARM_ITS_CTRL_RESET
  KVM: arm/arm64: vgic-its: Free caches when GITS_BASER Valid bit is cleared
  KVM: arm/arm64: vgic-its: New helper functions to free the caches
  KVM: arm/arm64: vgic-its: Remove kvm_its_unmap_device
  arm/arm64: KVM: Load the timer state when enabling the timer
  KVM: arm/arm64: Rework kvm_timer_should_fire
  KVM: arm/arm64: Get rid of kvm_timer_flush_hwstate
  KVM: arm/arm64: Avoid phys timer emulation in vcpu entry/exit
  KVM: arm/arm64: Move phys_timer_emulate function
  KVM: arm/arm64: Use kvm_arm_timer_set/get_reg for guest register traps
  ...

1 files changed, 3 insertions, 85 deletions

diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c
index 3556715a774e..8ecbcb40e317 100644
--- a/arch/arm64/kvm/inject_fault.c
+++ b/arch/arm64/kvm/inject_fault.c
@@ -33,88 +33,6 @@
 #define LOWER_EL_AArch64_VECTOR         0x400
 #define LOWER_EL_AArch32_VECTOR         0x600
 
-/*
- * Table taken from ARMv8 ARM DDI0487B-B, table G1-10.
- */
-static const u8 return_offsets[8][2] = {
-        [0] = { 0, 0 },         /* Reset, unused */
-        [1] = { 4, 2 },         /* Undefined */
-        [2] = { 0, 0 },         /* SVC, unused */
-        [3] = { 4, 4 },         /* Prefetch abort */
-        [4] = { 8, 8 },         /* Data abort */
-        [5] = { 0, 0 },         /* HVC, unused */
-        [6] = { 4, 4 },         /* IRQ, unused */
-        [7] = { 4, 4 },         /* FIQ, unused */
-};
-
-static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
-{
-        unsigned long cpsr;
-        unsigned long new_spsr_value = *vcpu_cpsr(vcpu);
-        bool is_thumb = (new_spsr_value & COMPAT_PSR_T_BIT);
-        u32 return_offset = return_offsets[vect_offset >> 2][is_thumb];
-        u32 sctlr = vcpu_cp15(vcpu, c1_SCTLR);
-
-        cpsr = mode | COMPAT_PSR_I_BIT;
-
-        if (sctlr & (1 << 30))
-                cpsr |= COMPAT_PSR_T_BIT;
-        if (sctlr & (1 << 25))
-                cpsr |= COMPAT_PSR_E_BIT;
-
-        *vcpu_cpsr(vcpu) = cpsr;
-
-        /* Note: These now point to the banked copies */
-        *vcpu_spsr(vcpu) = new_spsr_value;
-        *vcpu_reg32(vcpu, 14) = *vcpu_pc(vcpu) + return_offset;
-
-        /* Branch to exception vector */
-        if (sctlr & (1 << 13))
-                vect_offset += 0xffff0000;
-        else /* always have security exceptions */
-                vect_offset += vcpu_cp15(vcpu, c12_VBAR);
-
-        *vcpu_pc(vcpu) = vect_offset;
-}
-
-static void inject_undef32(struct kvm_vcpu *vcpu)
-{
-        prepare_fault32(vcpu, COMPAT_PSR_MODE_UND, 4);
-}
-
-/*
- * Modelled after TakeDataAbortException() and TakePrefetchAbortException
- * pseudocode.
- */
-static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt,
-                         unsigned long addr)
-{
-        u32 vect_offset;
-        u32 *far, *fsr;
-        bool is_lpae;
-
-        if (is_pabt) {
-                vect_offset = 12;
-                far = &vcpu_cp15(vcpu, c6_IFAR);
-                fsr = &vcpu_cp15(vcpu, c5_IFSR);
-        } else { /* !iabt */
-                vect_offset = 16;
-                far = &vcpu_cp15(vcpu, c6_DFAR);
-                fsr = &vcpu_cp15(vcpu, c5_DFSR);
-        }
-
-        prepare_fault32(vcpu, COMPAT_PSR_MODE_ABT | COMPAT_PSR_A_BIT, vect_offset);
-
-        *far = addr;
-
-        /* Give the guest an IMPLEMENTATION DEFINED exception */
-        is_lpae = (vcpu_cp15(vcpu, c2_TTBCR) >> 31);
-        if (is_lpae)
-                *fsr = 1 << 9 | 0x34;
-        else
-                *fsr = 0x14;
-}
-
 enum exception_type {
         except_type_sync        = 0,
         except_type_irq         = 0x80,
@@ -211,7 +129,7 @@ static void inject_undef64(struct kvm_vcpu *vcpu)
 void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr)
 {
         if (!(vcpu->arch.hcr_el2 & HCR_RW))
-                inject_abt32(vcpu, false, addr);
+                kvm_inject_dabt32(vcpu, addr);
         else
                 inject_abt64(vcpu, false, addr);
 }
@@ -227,7 +145,7 @@ void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr)
 void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr)
 {
         if (!(vcpu->arch.hcr_el2 & HCR_RW))
-                inject_abt32(vcpu, true, addr);
+                kvm_inject_pabt32(vcpu, addr);
         else
                 inject_abt64(vcpu, true, addr);
 }
@@ -241,7 +159,7 @@ void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr)
 void kvm_inject_undefined(struct kvm_vcpu *vcpu)
 {
         if (!(vcpu->arch.hcr_el2 & HCR_RW))
-                inject_undef32(vcpu);
+                kvm_inject_undef32(vcpu);
         else
                 inject_undef64(vcpu);
 }