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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-08 12:54:55 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-08 12:54:55 -0400 |
| commit | dfd437a257924484b144ee750e60affc95562c6d (patch) | |
| tree | d692781730ed72743b8abbc42a04a176cb2f1d6d /arch/arm64/kernel/traps.c | |
| parent | 0ecfebd2b52404ae0c54a878c872bb93363ada36 (diff) | |
| parent | 0c61efd322b75ed3143e3d130ebecbebf561adf5 (diff) | |
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Catalin Marinas:
- arm64 support for syscall emulation via PTRACE_SYSEMU{,_SINGLESTEP}
- Wire up VM_FLUSH_RESET_PERMS for arm64, allowing the core code to
manage the permissions of executable vmalloc regions more strictly
- Slight performance improvement by keeping softirqs enabled while
touching the FPSIMD/SVE state (kernel_neon_begin/end)
- Expose a couple of ARMv8.5 features to user (HWCAP): CondM (new
XAFLAG and AXFLAG instructions for floating point comparison flags
manipulation) and FRINT (rounding floating point numbers to integers)
- Re-instate ARM64_PSEUDO_NMI support which was previously marked as
BROKEN due to some bugs (now fixed)
- Improve parking of stopped CPUs and implement an arm64-specific
panic_smp_self_stop() to avoid warning on not being able to stop
secondary CPUs during panic
- perf: enable the ARM Statistical Profiling Extensions (SPE) on ACPI
platforms
- perf: DDR performance monitor support for iMX8QXP
- cache_line_size() can now be set from DT or ACPI/PPTT if provided to
cope with a system cache info not exposed via the CPUID registers
- Avoid warning on hardware cache line size greater than
ARCH_DMA_MINALIGN if the system is fully coherent
- arm64 do_page_fault() and hugetlb cleanups
- Refactor set_pte_at() to avoid redundant READ_ONCE(*ptep)
- Ignore ACPI 5.1 FADTs reported as 5.0 (infer from the
'arm_boot_flags' introduced in 5.1)
- CONFIG_RANDOMIZE_BASE now enabled in defconfig
- Allow the selection of ARM64_MODULE_PLTS, currently only done via
RANDOMIZE_BASE (and an erratum workaround), allowing modules to spill
over into the vmalloc area
- Make ZONE_DMA32 configurable
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (54 commits)
perf: arm_spe: Enable ACPI/Platform automatic module loading
arm_pmu: acpi: spe: Add initial MADT/SPE probing
ACPI/PPTT: Add function to return ACPI 6.3 Identical tokens
ACPI/PPTT: Modify node flag detection to find last IDENTICAL
x86/entry: Simplify _TIF_SYSCALL_EMU handling
arm64: rename dump_instr as dump_kernel_instr
arm64/mm: Drop [PTE|PMD]_TYPE_FAULT
arm64: Implement panic_smp_self_stop()
arm64: Improve parking of stopped CPUs
arm64: Expose FRINT capabilities to userspace
arm64: Expose ARMv8.5 CondM capability to userspace
arm64: defconfig: enable CONFIG_RANDOMIZE_BASE
arm64: ARM64_MODULES_PLTS must depend on MODULES
arm64: bpf: do not allocate executable memory
arm64/kprobes: set VM_FLUSH_RESET_PERMS on kprobe instruction pages
arm64/mm: wire up CONFIG_ARCH_HAS_SET_DIRECT_MAP
arm64: module: create module allocations without exec permissions
arm64: Allow user selection of ARM64_MODULE_PLTS
acpi/arm64: ignore 5.1 FADTs that are reported as 5.0
arm64: Allow selecting Pseudo-NMI again
...
Diffstat (limited to 'arch/arm64/kernel/traps.c')
| -rw-r--r-- | arch/arm64/kernel/traps.c | 23 |
1 files changed, 7 insertions, 16 deletions
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 985721a1264c..a835a1a53826 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c | |||
| @@ -55,16 +55,19 @@ static void dump_backtrace_entry(unsigned long where) | |||
| 55 | printk(" %pS\n", (void *)where); | 55 | printk(" %pS\n", (void *)where); |
| 56 | } | 56 | } |
| 57 | 57 | ||
| 58 | static void __dump_instr(const char *lvl, struct pt_regs *regs) | 58 | static void dump_kernel_instr(const char *lvl, struct pt_regs *regs) |
| 59 | { | 59 | { |
| 60 | unsigned long addr = instruction_pointer(regs); | 60 | unsigned long addr = instruction_pointer(regs); |
| 61 | char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; | 61 | char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; |
| 62 | int i; | 62 | int i; |
| 63 | 63 | ||
| 64 | if (user_mode(regs)) | ||
| 65 | return; | ||
| 66 | |||
| 64 | for (i = -4; i < 1; i++) { | 67 | for (i = -4; i < 1; i++) { |
| 65 | unsigned int val, bad; | 68 | unsigned int val, bad; |
| 66 | 69 | ||
| 67 | bad = get_user(val, &((u32 *)addr)[i]); | 70 | bad = aarch64_insn_read(&((u32 *)addr)[i], &val); |
| 68 | 71 | ||
| 69 | if (!bad) | 72 | if (!bad) |
| 70 | p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val); | 73 | p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val); |
| @@ -73,19 +76,8 @@ static void __dump_instr(const char *lvl, struct pt_regs *regs) | |||
| 73 | break; | 76 | break; |
| 74 | } | 77 | } |
| 75 | } | 78 | } |
| 76 | printk("%sCode: %s\n", lvl, str); | ||
| 77 | } | ||
| 78 | 79 | ||
| 79 | static void dump_instr(const char *lvl, struct pt_regs *regs) | 80 | printk("%sCode: %s\n", lvl, str); |
| 80 | { | ||
| 81 | if (!user_mode(regs)) { | ||
| 82 | mm_segment_t fs = get_fs(); | ||
| 83 | set_fs(KERNEL_DS); | ||
| 84 | __dump_instr(lvl, regs); | ||
| 85 | set_fs(fs); | ||
| 86 | } else { | ||
| 87 | __dump_instr(lvl, regs); | ||
| 88 | } | ||
| 89 | } | 81 | } |
| 90 | 82 | ||
| 91 | void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) | 83 | void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) |
| @@ -171,8 +163,7 @@ static int __die(const char *str, int err, struct pt_regs *regs) | |||
| 171 | print_modules(); | 163 | print_modules(); |
| 172 | show_regs(regs); | 164 | show_regs(regs); |
| 173 | 165 | ||
| 174 | if (!user_mode(regs)) | 166 | dump_kernel_instr(KERN_EMERG, regs); |
| 175 | dump_instr(KERN_EMERG, regs); | ||
| 176 | 167 | ||
| 177 | return ret; | 168 | return ret; |
| 178 | } | 169 | } |
