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authorMark Rutland <mark.rutland@arm.com>2016-09-08 08:55:34 -0400
committerWill Deacon <will.deacon@arm.com>2016-09-09 06:40:39 -0400
commit7aff4a2dd3db4e519c636f43aa863078e3b30d0f (patch)
tree04647ea7e4ff76116cdfd25cd63d83436e388cb9 /arch/arm64/include
parentee5e41b5f21a5438664effce1ba5bdd11e03ee24 (diff)
arm64: sysreg: allow write_sysreg to use XZR
Currently write_sysreg has to allocate a temporary register to write zero to a system register, which is unfortunate given that the MSR instruction accepts XZR as an operand. Allow XZR to be used when appropriate by fiddling with the assembly constraints. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include')
-rw-r--r--arch/arm64/include/asm/sysreg.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index cc06794b7346..39fed2e56e98 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -273,10 +273,14 @@ static inline void config_sctlr_el1(u32 clear, u32 set)
273 __val; \ 273 __val; \
274}) 274})
275 275
276/*
277 * The "Z" constraint normally means a zero immediate, but when combined with
278 * the "%x0" template means XZR.
279 */
276#define write_sysreg(v, r) do { \ 280#define write_sysreg(v, r) do { \
277 u64 __val = (u64)v; \ 281 u64 __val = (u64)v; \
278 asm volatile("msr " __stringify(r) ", %0" \ 282 asm volatile("msr " __stringify(r) ", %x0" \
279 : : "r" (__val)); \ 283 : : "rZ" (__val)); \
280} while (0) 284} while (0)
281 285
282#endif 286#endif