diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2016-03-09 11:31:29 -0500 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2016-03-11 06:03:34 -0500 |
commit | fdc69e7df3cb24f18a93192641786e5b7ecd1dfe (patch) | |
tree | d0662c6d5f96c6ee153ef8fbaa9f8546a4908d65 /arch/arm64/include/asm/pgtable.h | |
parent | ef769e320863a186e489e3f66ed8df60487fe9bf (diff) |
arm64: Update PTE_RDONLY in set_pte_at() for PROT_NONE permission
The set_pte_at() function must update the hardware PTE_RDONLY bit
depending on the state of the PTE_WRITE and PTE_DIRTY bits of the given
entry value. However, it currently only performs this for pte_valid()
entries, ignoring PTE_PROT_NONE. The side-effect is that PROT_NONE
mappings would not have the PTE_RDONLY bit set. Without
CONFIG_ARM64_HW_AFDBM, this is not an issue since such PROT_NONE pages
are not accessible anyway.
With commit 2f4b829c625e ("arm64: Add support for hardware updates of
the access and dirty pte bits"), the ptep_set_wrprotect() function was
re-written to cope with automatic hardware updates of the dirty state.
As an optimisation, only PTE_RDONLY is checked to assess the "dirty"
status. Since set_pte_at() does not set this bit for PROT_NONE mappings,
such pages may be considered "dirty" as a result of
ptep_set_wrprotect().
This patch updates the pte_valid() check to pte_present() in
set_pte_at(). It also adds PTE_PROT_NONE to the swap entry bits comment.
Fixes: 2f4b829c625e ("arm64: Add support for hardware updates of the access and dirty pte bits")
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
Tested-by: Ganapatrao Kulkarni <gkulkarni@cavium.com>
Cc: <stable@vger.kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/pgtable.h')
-rw-r--r-- | arch/arm64/include/asm/pgtable.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 7c73b365fcfa..e308807105e2 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h | |||
@@ -201,7 +201,7 @@ extern void __sync_icache_dcache(pte_t pteval, unsigned long addr); | |||
201 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | 201 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, |
202 | pte_t *ptep, pte_t pte) | 202 | pte_t *ptep, pte_t pte) |
203 | { | 203 | { |
204 | if (pte_valid(pte)) { | 204 | if (pte_present(pte)) { |
205 | if (pte_sw_dirty(pte) && pte_write(pte)) | 205 | if (pte_sw_dirty(pte) && pte_write(pte)) |
206 | pte_val(pte) &= ~PTE_RDONLY; | 206 | pte_val(pte) &= ~PTE_RDONLY; |
207 | else | 207 | else |
@@ -626,6 +626,7 @@ extern pgd_t idmap_pg_dir[PTRS_PER_PGD]; | |||
626 | * bits 0-1: present (must be zero) | 626 | * bits 0-1: present (must be zero) |
627 | * bits 2-7: swap type | 627 | * bits 2-7: swap type |
628 | * bits 8-57: swap offset | 628 | * bits 8-57: swap offset |
629 | * bit 58: PTE_PROT_NONE (must be zero) | ||
629 | */ | 630 | */ |
630 | #define __SWP_TYPE_SHIFT 2 | 631 | #define __SWP_TYPE_SHIFT 2 |
631 | #define __SWP_TYPE_BITS 6 | 632 | #define __SWP_TYPE_BITS 6 |