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authorWill Deacon <will.deacon@arm.com>2015-10-06 13:46:21 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2015-10-07 06:44:05 -0400
commitc51e97d89e526368eb697f87cd4d391b9e19f369 (patch)
treefef5f19d6a638c17d9f30f7344bdae9bad4d9fcb /arch/arm64/include/asm/mmu_context.h
parent127db024a7baee9874014dac33628253f438b4da (diff)
arm64: mm: remove unused cpu_set_idmap_tcr_t0sz function
With commit b08d4640a3dc ("arm64: remove dead code"), cpu_set_idmap_tcr_t0sz is no longer called and can therefore be removed from the kernel. This patch removes the function and effectively inlines the helper function __cpu_set_tcr_t0sz into cpu_set_default_tcr_t0sz. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/mmu_context.h')
-rw-r--r--arch/arm64/include/asm/mmu_context.h35
1 files changed, 12 insertions, 23 deletions
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
index 8ec41e5f56f0..549b89554ce8 100644
--- a/arch/arm64/include/asm/mmu_context.h
+++ b/arch/arm64/include/asm/mmu_context.h
@@ -77,34 +77,23 @@ static inline bool __cpu_uses_extended_idmap(void)
77 unlikely(idmap_t0sz != TCR_T0SZ(VA_BITS))); 77 unlikely(idmap_t0sz != TCR_T0SZ(VA_BITS)));
78} 78}
79 79
80static inline void __cpu_set_tcr_t0sz(u64 t0sz)
81{
82 unsigned long tcr;
83
84 if (__cpu_uses_extended_idmap())
85 asm volatile (
86 " mrs %0, tcr_el1 ;"
87 " bfi %0, %1, %2, %3 ;"
88 " msr tcr_el1, %0 ;"
89 " isb"
90 : "=&r" (tcr)
91 : "r"(t0sz), "I"(TCR_T0SZ_OFFSET), "I"(TCR_TxSZ_WIDTH));
92}
93
94/*
95 * Set TCR.T0SZ to the value appropriate for activating the identity map.
96 */
97static inline void cpu_set_idmap_tcr_t0sz(void)
98{
99 __cpu_set_tcr_t0sz(idmap_t0sz);
100}
101
102/* 80/*
103 * Set TCR.T0SZ to its default value (based on VA_BITS) 81 * Set TCR.T0SZ to its default value (based on VA_BITS)
104 */ 82 */
105static inline void cpu_set_default_tcr_t0sz(void) 83static inline void cpu_set_default_tcr_t0sz(void)
106{ 84{
107 __cpu_set_tcr_t0sz(TCR_T0SZ(VA_BITS)); 85 unsigned long tcr;
86
87 if (!__cpu_uses_extended_idmap())
88 return;
89
90 asm volatile (
91 " mrs %0, tcr_el1 ;"
92 " bfi %0, %1, %2, %3 ;"
93 " msr tcr_el1, %0 ;"
94 " isb"
95 : "=&r" (tcr)
96 : "r"(TCR_T0SZ(VA_BITS)), "I"(TCR_T0SZ_OFFSET), "I"(TCR_TxSZ_WIDTH));
108} 97}
109 98
110static inline void switch_new_context(struct mm_struct *mm) 99static inline void switch_new_context(struct mm_struct *mm)