Merge branch 'baserock/bjdooks/312-rc4/be/core-v3' of git://git.baserock.org/delta/linux into devel-stable

Conflicts:
	arch/arm/kernel/head.S

This series has been well tested and it would be great to get this
merged now.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

5 files changed, 17 insertions, 11 deletions

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index cd2c88e7a8f7..1f8fed94c2a4 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -952,3 +952,9 @@ config ARCH_HAS_BARRIERS
         help
           This option allows the use of custom mandatory barriers
           included via the mach/barriers.h file.
+
+config ARCH_SUPPORTS_BIG_ENDIAN
+        bool
+        help
+          This option specifies the architecture can support big endian
+          operation.
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index 80741992a9fc..3815a8262af0 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -38,9 +38,8 @@ ENTRY(v6_early_abort)
         bne     do_DataAbort
         bic     r1, r1, #1 << 11                @ clear bit 11 of FSR
         ldr     r3, [r4]                        @ read aborted ARM instruction
-#ifdef CONFIG_CPU_ENDIAN_BE8
-        rev     r3, r3
-#endif
+ ARM_BE8(rev    r3, r3)
+
         do_ldrd_abort tmp=ip, insn=r3
         tst     r3, #1 << 20                    @ L = 0 -> write
         orreq   r1, r1, #1 << 11                @ yes.
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 6f4585b89078..924036473b16 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -25,6 +25,7 @@
 #include <asm/cp15.h>
 #include <asm/system_info.h>
 #include <asm/unaligned.h>
+#include <asm/opcodes.h>
 
 #include "fault.h"
 
@@ -762,21 +763,25 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         if (thumb_mode(regs)) {
                 u16 *ptr = (u16 *)(instrptr & ~1);
                 fault = probe_kernel_address(ptr, tinstr);
+                tinstr = __mem_to_opcode_thumb16(tinstr);
                 if (!fault) {
                         if (cpu_architecture() >= CPU_ARCH_ARMv7 &&
                             IS_T32(tinstr)) {
                                 /* Thumb-2 32-bit */
                                 u16 tinst2 = 0;
                                 fault = probe_kernel_address(ptr + 1, tinst2);
-                                instr = (tinstr << 16) | tinst2;
+                                tinst2 = __mem_to_opcode_thumb16(tinst2);
+                                instr = __opcode_thumb32_compose(tinstr, tinst2);
                                 thumb2_32b = 1;
                         } else {
                                 isize = 2;
                                 instr = thumb2arm(tinstr);
                         }
                 }
-        } else
+        } else {
                 fault = probe_kernel_address(instrptr, instr);
+                instr = __mem_to_opcode_arm(instr);
+        }
 
         if (fault) {
                 type = TYPE_FAULT;
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 1128064fddcb..45dc29f85d56 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -220,9 +220,7 @@ __v6_setup:
 #endif /* CONFIG_MMU */
         adr     r5, v6_crval
         ldmia   r5, {r5, r6}
-#ifdef CONFIG_CPU_ENDIAN_BE8
-        orr     r6, r6, #1 << 25                @ big-endian page tables
-#endif
+ ARM_BE8(orr    r6, r6, #1 << 25)               @ big-endian page tables
         mrc     p15, 0, r0, c1, c0, 0           @ read control register
         bic     r0, r0, r5                      @ clear bits them
         orr     r0, r0, r6                      @ set them
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index c63d9bdee51e..60920f62fdf5 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -367,9 +367,7 @@ __v7_setup:
 #endif
         adr     r5, v7_crval
         ldmia   r5, {r5, r6}
-#ifdef CONFIG_CPU_ENDIAN_BE8
-        orr     r6, r6, #1 << 25                @ big-endian page tables
-#endif
+ ARM_BE8(orr    r6, r6, #1 << 25)               @ big-endian page tables
 #ifdef CONFIG_SWP_EMULATE
         orr     r5, r5, #(1 << 10)              @ set SW bit in "clear"
         bic     r6, r6, #(1 << 10)              @ clear it in "mmuset"