diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 12:06:36 -0500 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 12:06:36 -0500 |
commit | 421b759b86eb8a914cbbd11f6d09a74f411762c6 (patch) | |
tree | 505ca7f23987d8eaaa519a7e8506b854e2c0d030 /arch/arm/mach-tegra | |
parent | e067096c8d57d191f29d734cd5692695c95cc36e (diff) | |
parent | a07613a54d700a974f3a4a657da78ef5d097315d (diff) |
Merge branch 'samsung/cleanup' into next/boards
Conflicts:
arch/arm/mach-imx/mach-imx6q.c
arch/arm/mach-omap2/board-ti8168evm.c
arch/arm/mach-s3c64xx/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/common.c
Lots of relatively simple conflicts between the board
changes and stuff from the arm tree. This pulls in
the resolution from the samsung/cleanup tree, so we
don't get conflicting merges.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r-- | arch/arm/mach-tegra/board-dt-tegra20.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-harmony.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-paz00.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-seaboard.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-trimslice.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-tegra/common.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/entry-macro.S | 18 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/system.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-tegra/irq.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-tegra/timer.c | 24 |
10 files changed, 10 insertions, 49 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 70f060251f00..c2ff8e020105 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c | |||
@@ -146,5 +146,6 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") | |||
146 | .handle_irq = gic_handle_irq, | 146 | .handle_irq = gic_handle_irq, |
147 | .timer = &tegra_timer, | 147 | .timer = &tegra_timer, |
148 | .init_machine = tegra_dt_init, | 148 | .init_machine = tegra_dt_init, |
149 | .restart = tegra_assert_system_reset, | ||
149 | .dt_compat = tegra20_dt_board_compat, | 150 | .dt_compat = tegra20_dt_board_compat, |
150 | MACHINE_END | 151 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index d60a0d45f2f7..a0f9634f6727 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c | |||
@@ -191,4 +191,5 @@ MACHINE_START(HARMONY, "harmony") | |||
191 | .handle_irq = gic_handle_irq, | 191 | .handle_irq = gic_handle_irq, |
192 | .timer = &tegra_timer, | 192 | .timer = &tegra_timer, |
193 | .init_machine = tegra_harmony_init, | 193 | .init_machine = tegra_harmony_init, |
194 | .restart = tegra_assert_system_reset, | ||
194 | MACHINE_END | 195 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index 8a5245919456..fcf4f377b1dc 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c | |||
@@ -221,4 +221,5 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ") | |||
221 | .handle_irq = gic_handle_irq, | 221 | .handle_irq = gic_handle_irq, |
222 | .timer = &tegra_timer, | 222 | .timer = &tegra_timer, |
223 | .init_machine = tegra_paz00_init, | 223 | .init_machine = tegra_paz00_init, |
224 | .restart = tegra_assert_system_reset, | ||
224 | MACHINE_END | 225 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c index b79f9ce9941c..cfc74d46a09e 100644 --- a/arch/arm/mach-tegra/board-seaboard.c +++ b/arch/arm/mach-tegra/board-seaboard.c | |||
@@ -288,6 +288,7 @@ MACHINE_START(SEABOARD, "seaboard") | |||
288 | .handle_irq = gic_handle_irq, | 288 | .handle_irq = gic_handle_irq, |
289 | .timer = &tegra_timer, | 289 | .timer = &tegra_timer, |
290 | .init_machine = tegra_seaboard_init, | 290 | .init_machine = tegra_seaboard_init, |
291 | .restart = tegra_assert_system_reset, | ||
291 | MACHINE_END | 292 | MACHINE_END |
292 | 293 | ||
293 | MACHINE_START(KAEN, "kaen") | 294 | MACHINE_START(KAEN, "kaen") |
@@ -298,6 +299,7 @@ MACHINE_START(KAEN, "kaen") | |||
298 | .handle_irq = gic_handle_irq, | 299 | .handle_irq = gic_handle_irq, |
299 | .timer = &tegra_timer, | 300 | .timer = &tegra_timer, |
300 | .init_machine = tegra_kaen_init, | 301 | .init_machine = tegra_kaen_init, |
302 | .restart = tegra_assert_system_reset, | ||
301 | MACHINE_END | 303 | MACHINE_END |
302 | 304 | ||
303 | MACHINE_START(WARIO, "wario") | 305 | MACHINE_START(WARIO, "wario") |
@@ -308,4 +310,5 @@ MACHINE_START(WARIO, "wario") | |||
308 | .handle_irq = gic_handle_irq, | 310 | .handle_irq = gic_handle_irq, |
309 | .timer = &tegra_timer, | 311 | .timer = &tegra_timer, |
310 | .init_machine = tegra_wario_init, | 312 | .init_machine = tegra_wario_init, |
313 | .restart = tegra_assert_system_reset, | ||
311 | MACHINE_END | 314 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c index 4a197a20be93..cd52820a3e37 100644 --- a/arch/arm/mach-tegra/board-trimslice.c +++ b/arch/arm/mach-tegra/board-trimslice.c | |||
@@ -180,4 +180,5 @@ MACHINE_START(TRIMSLICE, "trimslice") | |||
180 | .handle_irq = gic_handle_irq, | 180 | .handle_irq = gic_handle_irq, |
181 | .timer = &tegra_timer, | 181 | .timer = &tegra_timer, |
182 | .init_machine = tegra_trimslice_init, | 182 | .init_machine = tegra_trimslice_init, |
183 | .restart = tegra_assert_system_reset, | ||
183 | MACHINE_END | 184 | MACHINE_END |
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 72b666bd3043..a2eb90169aed 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
@@ -33,8 +33,6 @@ | |||
33 | #include "clock.h" | 33 | #include "clock.h" |
34 | #include "fuse.h" | 34 | #include "fuse.h" |
35 | 35 | ||
36 | void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset; | ||
37 | |||
38 | #ifdef CONFIG_OF | 36 | #ifdef CONFIG_OF |
39 | static const struct of_device_id tegra_dt_irq_match[] __initconst = { | 37 | static const struct of_device_id tegra_dt_irq_match[] __initconst = { |
40 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, | 38 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, |
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S index ac11262149c7..e577cfe27e72 100644 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/arch/arm/mach-tegra/include/mach/entry-macro.S | |||
@@ -18,21 +18,3 @@ | |||
18 | 18 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | 19 | .macro arch_ret_to_user, tmp1, tmp2 |
20 | .endm | 20 | .endm |
21 | |||
22 | #if !defined(CONFIG_ARM_GIC) | ||
23 | /* legacy interrupt controller for AP16 */ | ||
24 | |||
25 | .macro get_irqnr_preamble, base, tmp | ||
26 | @ enable imprecise aborts | ||
27 | cpsie a | ||
28 | @ EVP base at 0xf010f000 | ||
29 | mov \base, #0xf0000000 | ||
30 | orr \base, #0x00100000 | ||
31 | orr \base, #0x0000f000 | ||
32 | .endm | ||
33 | |||
34 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
35 | ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS | ||
36 | cmp \irqnr, #0x80 | ||
37 | .endm | ||
38 | #endif | ||
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h index 027c4215d313..a312988bf6f8 100644 --- a/arch/arm/mach-tegra/include/mach/system.h +++ b/arch/arm/mach-tegra/include/mach/system.h | |||
@@ -21,10 +21,6 @@ | |||
21 | #ifndef __MACH_TEGRA_SYSTEM_H | 21 | #ifndef __MACH_TEGRA_SYSTEM_H |
22 | #define __MACH_TEGRA_SYSTEM_H | 22 | #define __MACH_TEGRA_SYSTEM_H |
23 | 23 | ||
24 | #include <mach/iomap.h> | ||
25 | |||
26 | extern void (*arch_reset)(char mode, const char *cmd); | ||
27 | |||
28 | static inline void arch_idle(void) | 24 | static inline void arch_idle(void) |
29 | { | 25 | { |
30 | } | 26 | } |
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 004b0fdf0d76..4e1afcd54fae 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c | |||
@@ -29,10 +29,6 @@ | |||
29 | 29 | ||
30 | #include "board.h" | 30 | #include "board.h" |
31 | 31 | ||
32 | #define INT_SYS_NR (INT_GPIO_BASE - INT_PRI_BASE) | ||
33 | #define INT_SYS_SZ (INT_SEC_BASE - INT_PRI_BASE) | ||
34 | #define PPI_NR ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ) | ||
35 | |||
36 | #define ICTLR_CPU_IEP_VFIQ 0x08 | 32 | #define ICTLR_CPU_IEP_VFIQ 0x08 |
37 | #define ICTLR_CPU_IEP_FIR 0x14 | 33 | #define ICTLR_CPU_IEP_FIR 0x14 |
38 | #define ICTLR_CPU_IEP_FIR_SET 0x18 | 34 | #define ICTLR_CPU_IEP_FIR_SET 0x18 |
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index 6366654b54c5..1d1acda4f3e0 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c | |||
@@ -19,7 +19,6 @@ | |||
19 | 19 | ||
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/err.h> | 21 | #include <linux/err.h> |
22 | #include <linux/sched.h> | ||
23 | #include <linux/time.h> | 22 | #include <linux/time.h> |
24 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
25 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
@@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = { | |||
106 | .set_mode = tegra_timer_set_mode, | 105 | .set_mode = tegra_timer_set_mode, |
107 | }; | 106 | }; |
108 | 107 | ||
109 | static DEFINE_CLOCK_DATA(cd); | 108 | static u32 notrace tegra_read_sched_clock(void) |
110 | |||
111 | /* | ||
112 | * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60). | ||
113 | * This gives a resolution of about 1us and a wrap period of about 1h11min. | ||
114 | */ | ||
115 | #define SC_MULT 4194304000u | ||
116 | #define SC_SHIFT 22 | ||
117 | |||
118 | unsigned long long notrace sched_clock(void) | ||
119 | { | ||
120 | u32 cyc = timer_readl(TIMERUS_CNTR_1US); | ||
121 | return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); | ||
122 | } | ||
123 | |||
124 | static void notrace tegra_update_sched_clock(void) | ||
125 | { | 109 | { |
126 | u32 cyc = timer_readl(TIMERUS_CNTR_1US); | 110 | return timer_readl(TIMERUS_CNTR_1US); |
127 | update_sched_clock(&cd, cyc, (u32)~0); | ||
128 | } | 111 | } |
129 | 112 | ||
130 | /* | 113 | /* |
@@ -226,8 +209,7 @@ static void __init tegra_init_timer(void) | |||
226 | WARN(1, "Unknown clock rate"); | 209 | WARN(1, "Unknown clock rate"); |
227 | } | 210 | } |
228 | 211 | ||
229 | init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32, | 212 | setup_sched_clock(tegra_read_sched_clock, 32, 1000000); |
230 | 1000000, SC_MULT, SC_SHIFT); | ||
231 | 213 | ||
232 | if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, | 214 | if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, |
233 | "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { | 215 | "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { |