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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-06-26 14:34:35 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-06-26 14:34:35 -0400 |
commit | 4aa705b18bf17c4ff33ff7bbcd3f0c596443fa81 (patch) | |
tree | 3b166bff290d123ccaa88598ad2d45be67f5b358 /arch/arm/mach-socfpga/socfpga.c | |
parent | c11d716218910c3aa2bac1bb641e6086ad649555 (diff) | |
parent | 2879e43f09122f8b3ef5456e3d7e48716b086e60 (diff) |
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform support updates from Kevin Hilman:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
ARM: socfpga: fix build error due to secondary_startup
MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
ARM: ep93xx: simone: support for SPI-based MMC/SD cards
MAINTAINERS: update Shawn's email to use kernel.org one
ARM: socfpga: support suspend to ram
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
...
Diffstat (limited to 'arch/arm/mach-socfpga/socfpga.c')
-rw-r--r-- | arch/arm/mach-socfpga/socfpga.c | 41 |
1 files changed, 5 insertions, 36 deletions
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index f5e597c207b9..19643a756c48 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2012 Altera Corporation | 2 | * Copyright (C) 2012-2015 Altera Corporation |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify | 4 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License as published by | 5 | * it under the terms of the GNU General Public License as published by |
@@ -27,43 +27,11 @@ | |||
27 | 27 | ||
28 | #include "core.h" | 28 | #include "core.h" |
29 | 29 | ||
30 | void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE)); | ||
31 | void __iomem *sys_manager_base_addr; | 30 | void __iomem *sys_manager_base_addr; |
32 | void __iomem *rst_manager_base_addr; | 31 | void __iomem *rst_manager_base_addr; |
32 | void __iomem *sdr_ctl_base_addr; | ||
33 | unsigned long socfpga_cpu1start_addr; | 33 | unsigned long socfpga_cpu1start_addr; |
34 | 34 | ||
35 | static struct map_desc scu_io_desc __initdata = { | ||
36 | .virtual = SOCFPGA_SCU_VIRT_BASE, | ||
37 | .pfn = 0, /* run-time */ | ||
38 | .length = SZ_8K, | ||
39 | .type = MT_DEVICE, | ||
40 | }; | ||
41 | |||
42 | static struct map_desc uart_io_desc __initdata = { | ||
43 | .virtual = 0xfec02000, | ||
44 | .pfn = __phys_to_pfn(0xffc02000), | ||
45 | .length = SZ_8K, | ||
46 | .type = MT_DEVICE, | ||
47 | }; | ||
48 | |||
49 | static void __init socfpga_scu_map_io(void) | ||
50 | { | ||
51 | unsigned long base; | ||
52 | |||
53 | /* Get SCU base */ | ||
54 | asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); | ||
55 | |||
56 | scu_io_desc.pfn = __phys_to_pfn(base); | ||
57 | iotable_init(&scu_io_desc, 1); | ||
58 | } | ||
59 | |||
60 | static void __init socfpga_map_io(void) | ||
61 | { | ||
62 | socfpga_scu_map_io(); | ||
63 | iotable_init(&uart_io_desc, 1); | ||
64 | early_printk("Early printk initialized\n"); | ||
65 | } | ||
66 | |||
67 | void __init socfpga_sysmgr_init(void) | 35 | void __init socfpga_sysmgr_init(void) |
68 | { | 36 | { |
69 | struct device_node *np; | 37 | struct device_node *np; |
@@ -82,6 +50,9 @@ void __init socfpga_sysmgr_init(void) | |||
82 | 50 | ||
83 | np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); | 51 | np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); |
84 | rst_manager_base_addr = of_iomap(np, 0); | 52 | rst_manager_base_addr = of_iomap(np, 0); |
53 | |||
54 | np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl"); | ||
55 | sdr_ctl_base_addr = of_iomap(np, 0); | ||
85 | } | 56 | } |
86 | 57 | ||
87 | static void __init socfpga_init_irq(void) | 58 | static void __init socfpga_init_irq(void) |
@@ -111,8 +82,6 @@ static const char *altera_dt_match[] = { | |||
111 | DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA") | 82 | DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA") |
112 | .l2c_aux_val = 0, | 83 | .l2c_aux_val = 0, |
113 | .l2c_aux_mask = ~0, | 84 | .l2c_aux_mask = ~0, |
114 | .smp = smp_ops(socfpga_smp_ops), | ||
115 | .map_io = socfpga_map_io, | ||
116 | .init_irq = socfpga_init_irq, | 85 | .init_irq = socfpga_init_irq, |
117 | .restart = socfpga_cyclone5_restart, | 86 | .restart = socfpga_cyclone5_restart, |
118 | .dt_compat = altera_dt_match, | 87 | .dt_compat = altera_dt_match, |