diff options
author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-12-06 04:59:22 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2013-12-24 07:09:07 -0500 |
commit | d000fff90a8d0e2cd5b437b3fbc3d3d5b8322cba (patch) | |
tree | ce49b654817bca3fab37e34f47f64cff5cd0750d /arch/arm/mach-shmobile/setup-sh73a0.c | |
parent | c6a0d864b83178ab47822fdbfbe699c34a8b4b44 (diff) |
ARM: shmobile: sh73a0: Use macros to declare SCIF devices
Replace copy-n-paste SCIF platform data and device declaration with a
macro. This reduces the amount of code and improves readability.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/setup-sh73a0.c')
-rw-r--r-- | arch/arm/mach-shmobile/setup-sh73a0.c | 187 |
1 files changed, 27 insertions, 160 deletions
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 22de17417fd7..ba9b74198b72 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c | |||
@@ -71,167 +71,34 @@ void __init sh73a0_pinmux_init(void) | |||
71 | ARRAY_SIZE(pfc_resources)); | 71 | ARRAY_SIZE(pfc_resources)); |
72 | } | 72 | } |
73 | 73 | ||
74 | static struct plat_sci_port scif0_platform_data = { | 74 | /* SCIF */ |
75 | .mapbase = 0xe6c40000, | 75 | #define SH73A0_SCIF(scif_type, index, baseaddr, irq) \ |
76 | .flags = UPF_BOOT_AUTOCONF, | 76 | static struct plat_sci_port scif##index##_platform_data = { \ |
77 | .scscr = SCSCR_RE | SCSCR_TE, | 77 | .type = scif_type, \ |
78 | .scbrr_algo_id = SCBRR_ALGO_4, | 78 | .mapbase = baseaddr, \ |
79 | .type = PORT_SCIFA, | 79 | .flags = UPF_BOOT_AUTOCONF, \ |
80 | .irqs = { gic_spi(72), gic_spi(72), | 80 | .irqs = SCIx_IRQ_MUXED(irq), \ |
81 | gic_spi(72), gic_spi(72) }, | 81 | .scbrr_algo_id = SCBRR_ALGO_4, \ |
82 | }; | 82 | .scscr = SCSCR_RE | SCSCR_TE, \ |
83 | 83 | }; \ | |
84 | static struct platform_device scif0_device = { | 84 | \ |
85 | .name = "sh-sci", | 85 | static struct platform_device scif##index##_device = { \ |
86 | .id = 0, | 86 | .name = "sh-sci", \ |
87 | .dev = { | 87 | .id = index, \ |
88 | .platform_data = &scif0_platform_data, | 88 | .dev = { \ |
89 | }, | 89 | .platform_data = &scif##index##_platform_data, \ |
90 | }; | 90 | }, \ |
91 | 91 | } | |
92 | static struct plat_sci_port scif1_platform_data = { | ||
93 | .mapbase = 0xe6c50000, | ||
94 | .flags = UPF_BOOT_AUTOCONF, | ||
95 | .scscr = SCSCR_RE | SCSCR_TE, | ||
96 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
97 | .type = PORT_SCIFA, | ||
98 | .irqs = { gic_spi(73), gic_spi(73), | ||
99 | gic_spi(73), gic_spi(73) }, | ||
100 | }; | ||
101 | |||
102 | static struct platform_device scif1_device = { | ||
103 | .name = "sh-sci", | ||
104 | .id = 1, | ||
105 | .dev = { | ||
106 | .platform_data = &scif1_platform_data, | ||
107 | }, | ||
108 | }; | ||
109 | |||
110 | static struct plat_sci_port scif2_platform_data = { | ||
111 | .mapbase = 0xe6c60000, | ||
112 | .flags = UPF_BOOT_AUTOCONF, | ||
113 | .scscr = SCSCR_RE | SCSCR_TE, | ||
114 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
115 | .type = PORT_SCIFA, | ||
116 | .irqs = { gic_spi(74), gic_spi(74), | ||
117 | gic_spi(74), gic_spi(74) }, | ||
118 | }; | ||
119 | |||
120 | static struct platform_device scif2_device = { | ||
121 | .name = "sh-sci", | ||
122 | .id = 2, | ||
123 | .dev = { | ||
124 | .platform_data = &scif2_platform_data, | ||
125 | }, | ||
126 | }; | ||
127 | |||
128 | static struct plat_sci_port scif3_platform_data = { | ||
129 | .mapbase = 0xe6c70000, | ||
130 | .flags = UPF_BOOT_AUTOCONF, | ||
131 | .scscr = SCSCR_RE | SCSCR_TE, | ||
132 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
133 | .type = PORT_SCIFA, | ||
134 | .irqs = { gic_spi(75), gic_spi(75), | ||
135 | gic_spi(75), gic_spi(75) }, | ||
136 | }; | ||
137 | |||
138 | static struct platform_device scif3_device = { | ||
139 | .name = "sh-sci", | ||
140 | .id = 3, | ||
141 | .dev = { | ||
142 | .platform_data = &scif3_platform_data, | ||
143 | }, | ||
144 | }; | ||
145 | |||
146 | static struct plat_sci_port scif4_platform_data = { | ||
147 | .mapbase = 0xe6c80000, | ||
148 | .flags = UPF_BOOT_AUTOCONF, | ||
149 | .scscr = SCSCR_RE | SCSCR_TE, | ||
150 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
151 | .type = PORT_SCIFA, | ||
152 | .irqs = { gic_spi(78), gic_spi(78), | ||
153 | gic_spi(78), gic_spi(78) }, | ||
154 | }; | ||
155 | |||
156 | static struct platform_device scif4_device = { | ||
157 | .name = "sh-sci", | ||
158 | .id = 4, | ||
159 | .dev = { | ||
160 | .platform_data = &scif4_platform_data, | ||
161 | }, | ||
162 | }; | ||
163 | |||
164 | static struct plat_sci_port scif5_platform_data = { | ||
165 | .mapbase = 0xe6cb0000, | ||
166 | .flags = UPF_BOOT_AUTOCONF, | ||
167 | .scscr = SCSCR_RE | SCSCR_TE, | ||
168 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
169 | .type = PORT_SCIFA, | ||
170 | .irqs = { gic_spi(79), gic_spi(79), | ||
171 | gic_spi(79), gic_spi(79) }, | ||
172 | }; | ||
173 | |||
174 | static struct platform_device scif5_device = { | ||
175 | .name = "sh-sci", | ||
176 | .id = 5, | ||
177 | .dev = { | ||
178 | .platform_data = &scif5_platform_data, | ||
179 | }, | ||
180 | }; | ||
181 | |||
182 | static struct plat_sci_port scif6_platform_data = { | ||
183 | .mapbase = 0xe6cc0000, | ||
184 | .flags = UPF_BOOT_AUTOCONF, | ||
185 | .scscr = SCSCR_RE | SCSCR_TE, | ||
186 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
187 | .type = PORT_SCIFA, | ||
188 | .irqs = { gic_spi(156), gic_spi(156), | ||
189 | gic_spi(156), gic_spi(156) }, | ||
190 | }; | ||
191 | |||
192 | static struct platform_device scif6_device = { | ||
193 | .name = "sh-sci", | ||
194 | .id = 6, | ||
195 | .dev = { | ||
196 | .platform_data = &scif6_platform_data, | ||
197 | }, | ||
198 | }; | ||
199 | |||
200 | static struct plat_sci_port scif7_platform_data = { | ||
201 | .mapbase = 0xe6cd0000, | ||
202 | .flags = UPF_BOOT_AUTOCONF, | ||
203 | .scscr = SCSCR_RE | SCSCR_TE, | ||
204 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
205 | .type = PORT_SCIFA, | ||
206 | .irqs = { gic_spi(143), gic_spi(143), | ||
207 | gic_spi(143), gic_spi(143) }, | ||
208 | }; | ||
209 | |||
210 | static struct platform_device scif7_device = { | ||
211 | .name = "sh-sci", | ||
212 | .id = 7, | ||
213 | .dev = { | ||
214 | .platform_data = &scif7_platform_data, | ||
215 | }, | ||
216 | }; | ||
217 | |||
218 | static struct plat_sci_port scif8_platform_data = { | ||
219 | .mapbase = 0xe6c30000, | ||
220 | .flags = UPF_BOOT_AUTOCONF, | ||
221 | .scscr = SCSCR_RE | SCSCR_TE, | ||
222 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
223 | .type = PORT_SCIFB, | ||
224 | .irqs = { gic_spi(80), gic_spi(80), | ||
225 | gic_spi(80), gic_spi(80) }, | ||
226 | }; | ||
227 | 92 | ||
228 | static struct platform_device scif8_device = { | 93 | SH73A0_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(72)); |
229 | .name = "sh-sci", | 94 | SH73A0_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(73)); |
230 | .id = 8, | 95 | SH73A0_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(74)); |
231 | .dev = { | 96 | SH73A0_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(75)); |
232 | .platform_data = &scif8_platform_data, | 97 | SH73A0_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(78)); |
233 | }, | 98 | SH73A0_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(79)); |
234 | }; | 99 | SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156)); |
100 | SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143)); | ||
101 | SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80)); | ||
235 | 102 | ||
236 | static struct sh_timer_config cmt10_platform_data = { | 103 | static struct sh_timer_config cmt10_platform_data = { |
237 | .name = "CMT10", | 104 | .name = "CMT10", |