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authorLinus Torvalds <torvalds@linux-foundation.org>2015-02-17 12:17:33 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2015-02-17 12:17:33 -0500
commitea7531ac4a9d0b39edce43472147dc41cc2b7a34 (patch)
treec49d395de24f670bcf6cb5746af9e503b255e96b /arch/arm/mach-omap2
parent4025fa97ff39db054b47b9cdb9f3980480637668 (diff)
parent41e229a91207afc326f9a83ba33c098c8362d303 (diff)
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson: "This is a good healthy set of various code removals. Total net delta is 8100 lines removed. Among the larger cleanups are: - Removal of old Samsung S3C DMA infrastructure by Arnd - Removal of the non-DT version of the 'lager' board by Magnus Damm - General stale code removal on OMAP and Davinci by Rickard Strandqvist - Removal of non-DT support on am3517 platforms by Tony Lindgren ... plus several other cleanups of various platforms across the board" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (47 commits) ARM: sirf: drop redundant function and marco declaration arm: omap: specify PMUs are for ARMv7 CPUs arm: shmobile: specify PMUs are for ARMv7 CPUs arm: iop: specify PMUs are for XScale CPUs arm: pxa: specify PMUs are for XScale CPUs arm: realview: specify PMU types ARM: SAMSUNG: remove unused DMA infrastructure ARM: OMAP3: Add back Kconfig option MACH_OMAP3517EVM for ASoC ARM: davinci: Remove CDCE949 driver ARM: at91: remove useless at91rm9200_set_type() ARM: at91: remove useless at91rm9200_dt_initialize() ARM: at91: move debug-macro.S into the common space ARM: at91: remove useless at91_sysirq_mask_rtx ARM: at91: remove useless config MACH_AT91SAM9_DT ARM: at91: remove useless config MACH_AT91RM9200_DT ARM: at91: remove unused mach/memory.h ARM: at91: remove useless header file includes ARM: at91: remove unneeded header file rtc: at91/Kconfig: remove useless options ARM: at91/Documentation: add a README for Atmel SoCs ...
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Kconfig12
-rw-r--r--arch/arm/mach-omap2/Makefile9
-rw-r--r--arch/arm/mach-omap2/am35xx-emac.c114
-rw-r--r--arch/arm/mach-omap2/am35xx-emac.h15
-rw-r--r--arch/arm/mach-omap2/am35xx.h46
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c150
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c373
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c335
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c6
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_apll.c142
-rw-r--r--arch/arm/mach-omap2/clock.h1
-rw-r--r--arch/arm/mach-omap2/clock2xxx.h11
-rw-r--r--arch/arm/mach-omap2/cm2xxx.c10
-rw-r--r--arch/arm/mach-omap2/cm2xxx.h2
-rw-r--r--arch/arm/mach-omap2/cm33xx.c21
-rw-r--r--arch/arm/mach-omap2/dpll44xx.c20
-rw-r--r--arch/arm/mach-omap2/omap-pm-noop.c196
-rw-r--r--arch/arm/mach-omap2/omap-pm.h192
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c232
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.h16
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c33
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c35
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c1
-rw-r--r--arch/arm/mach-omap2/pmu.c5
-rw-r--r--arch/arm/mach-omap2/powerdomain.c82
-rw-r--r--arch/arm/mach-omap2/powerdomain.h5
-rw-r--r--arch/arm/mach-omap2/prm3xxx.h1
-rw-r--r--arch/arm/mach-omap2/prm44xx_54xx.h1
-rw-r--r--arch/arm/mach-omap2/usb-musb.c12
-rw-r--r--arch/arm/mach-omap2/usb.h2
-rw-r--r--arch/arm/mach-omap2/voltage.c110
-rw-r--r--arch/arm/mach-omap2/voltage.h13
32 files changed, 8 insertions, 2195 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 6ab656cc4f16..2b8e47788062 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -217,12 +217,6 @@ config MACH_OMAP3517EVM
217 bool "OMAP3517/ AM3517 EVM board" 217 bool "OMAP3517/ AM3517 EVM board"
218 depends on ARCH_OMAP3 218 depends on ARCH_OMAP3
219 default y 219 default y
220 select OMAP_PACKAGE_CBB
221
222config MACH_CRANEBOARD
223 bool "AM3517/05 CRANE board"
224 depends on ARCH_OMAP3
225 select OMAP_PACKAGE_CBB
226 220
227config MACH_OMAP3_PANDORA 221config MACH_OMAP3_PANDORA
228 bool "OMAP3 Pandora" 222 bool "OMAP3 Pandora"
@@ -263,12 +257,6 @@ config MACH_CM_T35
263 select MACH_CM_T3730 257 select MACH_CM_T3730
264 select OMAP_PACKAGE_CUS 258 select OMAP_PACKAGE_CUS
265 259
266config MACH_CM_T3517
267 bool "CompuLab CM-T3517 module"
268 depends on ARCH_OMAP3
269 default y
270 select OMAP_PACKAGE_CBB
271
272config MACH_CM_T3730 260config MACH_CM_T3730
273 bool 261 bool
274 262
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 3a6463f88ea2..fb78744f546b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -182,7 +182,6 @@ obj-$(CONFIG_SOC_DRA7XX) += clockdomains7xx_data.o
182obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o 182obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o
183obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o 183obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o
184obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_virt_prcm_set.o 184obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_virt_prcm_set.o
185obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_apll.o
186obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpll.o clkt_iclk.o 185obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpll.o clkt_iclk.o
187obj-$(CONFIG_SOC_OMAP2430) += clock2430.o 186obj-$(CONFIG_SOC_OMAP2430) += clock2430.o
188obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o 187obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o
@@ -251,13 +250,8 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o sdram-nokia.o
251obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-peripherals.o 250obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-peripherals.o
252obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-video.o 251obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-video.o
253obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o 252obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o
254obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o
255obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o 253obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o
256 254
257obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
258
259obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
260
261obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o 255obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o
262 256
263# Platform specific device init code 257# Platform specific device init code
@@ -287,7 +281,4 @@ ifneq ($(CONFIG_HWSPINLOCK_OMAP),)
287obj-y += hwspinlock.o 281obj-y += hwspinlock.o
288endif 282endif
289 283
290emac-$(CONFIG_TI_DAVINCI_EMAC) := am35xx-emac.o
291obj-y += $(emac-m) $(emac-y)
292
293obj-y += common-board-devices.o twl-common.o dss-common.o 284obj-y += common-board-devices.o twl-common.o dss-common.o
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
deleted file mode 100644
index 6a6935caac1e..000000000000
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ /dev/null
@@ -1,114 +0,0 @@
1/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on mach-omap2/board-am3517evm.c
5 * Copyright (C) 2009 Texas Instruments Incorporated
6 * Author: Ranjith Lohithakshan <ranjithl@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13 * whether express or implied; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#include <linux/err.h>
19#include <linux/davinci_emac.h>
20#include "omap_device.h"
21#include "am35xx.h"
22#include "control.h"
23#include "am35xx-emac.h"
24
25static void am35xx_enable_emac_int(void)
26{
27 u32 v;
28
29 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
30 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |
31 AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);
32 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
33 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
34}
35
36static void am35xx_disable_emac_int(void)
37{
38 u32 v;
39
40 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
41 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);
42 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
43 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
44}
45
46static struct emac_platform_data am35xx_emac_pdata = {
47 .ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET,
48 .ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET,
49 .ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET,
50 .ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE,
51 .hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR,
52 .version = EMAC_VERSION_2,
53 .interrupt_enable = am35xx_enable_emac_int,
54 .interrupt_disable = am35xx_disable_emac_int,
55};
56
57static struct mdio_platform_data am35xx_mdio_pdata;
58
59static int __init omap_davinci_emac_dev_init(struct omap_hwmod *oh,
60 void *pdata, int pdata_len)
61{
62 struct platform_device *pdev;
63
64 pdev = omap_device_build(oh->class->name, 0, oh, pdata, pdata_len);
65 if (IS_ERR(pdev)) {
66 WARN(1, "Can't build omap_device for %s:%s.\n",
67 oh->class->name, oh->name);
68 return PTR_ERR(pdev);
69 }
70
71 return 0;
72}
73
74void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en)
75{
76 struct omap_hwmod *oh;
77 u32 v;
78 int ret;
79
80 oh = omap_hwmod_lookup("davinci_mdio");
81 if (!oh) {
82 pr_err("Could not find davinci_mdio hwmod\n");
83 return;
84 }
85
86 am35xx_mdio_pdata.bus_freq = mdio_bus_freq;
87
88 ret = omap_davinci_emac_dev_init(oh, &am35xx_mdio_pdata,
89 sizeof(am35xx_mdio_pdata));
90 if (ret) {
91 pr_err("Could not build davinci_mdio hwmod device\n");
92 return;
93 }
94
95 oh = omap_hwmod_lookup("davinci_emac");
96 if (!oh) {
97 pr_err("Could not find davinci_emac hwmod\n");
98 return;
99 }
100
101 am35xx_emac_pdata.rmii_en = rmii_en;
102
103 ret = omap_davinci_emac_dev_init(oh, &am35xx_emac_pdata,
104 sizeof(am35xx_emac_pdata));
105 if (ret) {
106 pr_err("Could not build davinci_emac hwmod device\n");
107 return;
108 }
109
110 v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
111 v &= ~AM35XX_CPGMACSS_SW_RST;
112 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
113 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
114}
diff --git a/arch/arm/mach-omap2/am35xx-emac.h b/arch/arm/mach-omap2/am35xx-emac.h
deleted file mode 100644
index 15c6f9ce59a2..000000000000
--- a/arch/arm/mach-omap2/am35xx-emac.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#define AM35XX_DEFAULT_MDIO_FREQUENCY 1000000
10
11#if defined(CONFIG_TI_DAVINCI_EMAC) || defined(CONFIG_TI_DAVINCI_EMAC_MODULE)
12void am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en);
13#else
14static inline void am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en) {}
15#endif
diff --git a/arch/arm/mach-omap2/am35xx.h b/arch/arm/mach-omap2/am35xx.h
deleted file mode 100644
index 95594495fcf6..000000000000
--- a/arch/arm/mach-omap2/am35xx.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*:
2 * Address mappings and base address for AM35XX specific interconnects
3 * and peripherals.
4 *
5 * Copyright (C) 2009 Texas Instruments
6 *
7 * Author: Sriramakrishnan <srk@ti.com>
8 * Vaibhav Hiremath <hvaibhav@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14#ifndef __ASM_ARCH_AM35XX_H
15#define __ASM_ARCH_AM35XX_H
16
17/*
18 * Base addresses
19 * Note: OMAP3430 IVA2 memory space is being used for AM35xx IPSS modules
20 */
21#define AM35XX_IPSS_EMAC_BASE 0x5C000000
22#define AM35XX_IPSS_USBOTGSS_BASE 0x5C040000
23#define AM35XX_IPSS_HECC_BASE 0x5C050000
24#define AM35XX_IPSS_VPFE_BASE 0x5C060000
25
26
27/* HECC module specifc offset definitions */
28#define AM35XX_HECC_SCC_HECC_OFFSET (0x0)
29#define AM35XX_HECC_SCC_RAM_OFFSET (0x3000)
30#define AM35XX_HECC_RAM_OFFSET (0x3000)
31#define AM35XX_HECC_MBOX_OFFSET (0x2000)
32#define AM35XX_HECC_INT_LINE (0x0)
33#define AM35XX_HECC_VERSION (0x1)
34
35#define AM35XX_EMAC_CNTRL_OFFSET (0x10000)
36#define AM35XX_EMAC_CNTRL_MOD_OFFSET (0x0)
37#define AM35XX_EMAC_CNTRL_RAM_OFFSET (0x20000)
38#define AM35XX_EMAC_MDIO_OFFSET (0x30000)
39#define AM35XX_IPSS_MDIO_BASE (AM35XX_IPSS_EMAC_BASE + \
40 AM35XX_EMAC_MDIO_OFFSET)
41#define AM35XX_EMAC_CNTRL_RAM_SIZE (0x2000)
42#define AM35XX_EMAC_RAM_ADDR (AM3517_EMAC_BASE + \
43 AM3517_EMAC_CNTRL_RAM_OFFSET)
44#define AM35XX_EMAC_HW_RAM_ADDR (0x01E20000)
45
46#endif /* __ASM_ARCH_AM35XX_H */
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
deleted file mode 100644
index 8168ddabaeda..000000000000
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ /dev/null
@@ -1,150 +0,0 @@
1/*
2 * Support for AM3517/05 Craneboard
3 * http://www.mistralsolutions.com/products/craneboard.php
4 *
5 * Copyright (C) 2010 Mistral Solutions Pvt Ltd. <www.mistralsolutions.com>
6 * Author: R.Srinath <srinath@mistralsolutions.com>
7 *
8 * Based on mach-omap2/board-am3517evm.c
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation version 2.
13 *
14 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
15 * whether express or implied; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 */
19
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/gpio.h>
23#include <linux/mfd/tps65910.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h>
27#include <linux/omap-gpmc.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32
33#include "common.h"
34#include "common-board-devices.h"
35#include "board-flash.h"
36
37#include "am35xx-emac.h"
38#include "mux.h"
39#include "control.h"
40
41#define GPIO_USB_POWER 35
42#define GPIO_USB_NRESET 38
43
44#ifdef CONFIG_OMAP_MUX
45static struct omap_board_mux board_mux[] __initdata = {
46 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
47 { .reg_offset = OMAP_MUX_TERMINATOR },
48};
49#endif
50
51static struct usbhs_phy_data phy_data[] __initdata = {
52 {
53 .port = 1,
54 .reset_gpio = GPIO_USB_NRESET,
55 .vcc_gpio = GPIO_USB_POWER,
56 .vcc_polarity = 1,
57 },
58};
59
60static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
61 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
62};
63
64static struct mtd_partition crane_nand_partitions[] = {
65 {
66 .name = "X-Loader",
67 .offset = 0,
68 .size = 4 * NAND_BLOCK_SIZE,
69 .mask_flags = MTD_WRITEABLE,
70 },
71 {
72 .name = "U-Boot",
73 .offset = MTDPART_OFS_APPEND,
74 .size = 14 * NAND_BLOCK_SIZE,
75 .mask_flags = MTD_WRITEABLE,
76 },
77 {
78 .name = "U-Boot Env",
79 .offset = MTDPART_OFS_APPEND,
80 .size = 2 * NAND_BLOCK_SIZE,
81 },
82 {
83 .name = "Kernel",
84 .offset = MTDPART_OFS_APPEND,
85 .size = 40 * NAND_BLOCK_SIZE,
86 },
87 {
88 .name = "File System",
89 .offset = MTDPART_OFS_APPEND,
90 .size = MTDPART_SIZ_FULL,
91 },
92};
93
94static struct tps65910_board tps65910_pdata = {
95 .irq = 7 + OMAP_INTC_START,
96 .en_ck32k_xtal = true,
97};
98
99static struct i2c_board_info __initdata tps65910_board_info[] = {
100 {
101 I2C_BOARD_INFO("tps65910", 0x2d),
102 .platform_data = &tps65910_pdata,
103 },
104};
105
106static void __init am3517_crane_i2c_init(void)
107{
108 omap_register_i2c_bus(1, 2600, tps65910_board_info,
109 ARRAY_SIZE(tps65910_board_info));
110}
111
112static void __init am3517_crane_init(void)
113{
114 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
115 omap_serial_init();
116 omap_sdrc_init(NULL, NULL);
117 board_nand_init(crane_nand_partitions,
118 ARRAY_SIZE(crane_nand_partitions), 0,
119 NAND_BUSWIDTH_16, NULL);
120 am3517_crane_i2c_init();
121
122 /* Configure GPIO for EHCI port */
123 if (omap_mux_init_gpio(GPIO_USB_NRESET, OMAP_PIN_OUTPUT)) {
124 pr_err("Can not configure mux for GPIO_USB_NRESET %d\n",
125 GPIO_USB_NRESET);
126 return;
127 }
128
129 if (omap_mux_init_gpio(GPIO_USB_POWER, OMAP_PIN_OUTPUT)) {
130 pr_err("Can not configure mux for GPIO_USB_POWER %d\n",
131 GPIO_USB_POWER);
132 return;
133 }
134
135 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
136 usbhs_init(&usbhs_bdata);
137 am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);
138}
139
140MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
141 .atag_offset = 0x100,
142 .reserve = omap_reserve,
143 .map_io = omap3_map_io,
144 .init_early = am35xx_init_early,
145 .init_irq = omap3_init_irq,
146 .init_machine = am3517_crane_init,
147 .init_late = am35xx_init_late,
148 .init_time = omap3_sync32k_timer_init,
149 .restart = omap3xxx_restart,
150MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
deleted file mode 100644
index 1c091b3fa312..000000000000
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ /dev/null
@@ -1,373 +0,0 @@
1/*
2 * linux/arch/arm/mach-omap2/board-am3517evm.c
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated
5 * Author: Ranjith Lohithakshan <ranjithl@ti.com>
6 *
7 * Based on mach-omap2/board-omap3evm.c
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
14 * whether express or implied; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/clk.h>
22#include <linux/platform_device.h>
23#include <linux/gpio.h>
24#include <linux/platform_data/pca953x.h>
25#include <linux/can/platform/ti_hecc.h>
26#include <linux/davinci_emac.h>
27#include <linux/mmc/host.h>
28#include <linux/usb/musb.h>
29#include <linux/platform_data/gpio-omap.h>
30
31#include "am35xx.h"
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35
36#include "common.h"
37#include <video/omapdss.h>
38#include <video/omap-panel-data.h>
39
40#include "am35xx-emac.h"
41#include "mux.h"
42#include "control.h"
43#include "hsmmc.h"
44
45#define LCD_PANEL_PWR 176
46#define LCD_PANEL_BKLIGHT_PWR 182
47#define LCD_PANEL_PWM 181
48
49static struct i2c_board_info __initdata am3517evm_i2c1_boardinfo[] = {
50 {
51 I2C_BOARD_INFO("s35390a", 0x30),
52 },
53};
54
55/*
56 * RTC - S35390A
57 */
58#define GPIO_RTCS35390A_IRQ 55
59
60static void __init am3517_evm_rtc_init(void)
61{
62 int r;
63
64 omap_mux_init_gpio(GPIO_RTCS35390A_IRQ, OMAP_PIN_INPUT_PULLUP);
65
66 r = gpio_request_one(GPIO_RTCS35390A_IRQ, GPIOF_IN, "rtcs35390a-irq");
67 if (r < 0) {
68 printk(KERN_WARNING "failed to request GPIO#%d\n",
69 GPIO_RTCS35390A_IRQ);
70 return;
71 }
72
73 am3517evm_i2c1_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ);
74}
75
76/*
77 * I2C GPIO Expander - TCA6416
78 */
79
80/* Mounted on Base-Board */
81static struct pca953x_platform_data am3517evm_gpio_expander_info_0 = {
82 .gpio_base = OMAP_MAX_GPIO_LINES,
83};
84static struct i2c_board_info __initdata am3517evm_i2c2_boardinfo[] = {
85 {
86 I2C_BOARD_INFO("tlv320aic23", 0x1A),
87 },
88 {
89 I2C_BOARD_INFO("tca6416", 0x21),
90 .platform_data = &am3517evm_gpio_expander_info_0,
91 },
92};
93
94/* Mounted on UI Card */
95static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_1 = {
96 .gpio_base = OMAP_MAX_GPIO_LINES + 16,
97};
98static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_2 = {
99 .gpio_base = OMAP_MAX_GPIO_LINES + 32,
100};
101static struct i2c_board_info __initdata am3517evm_i2c3_boardinfo[] = {
102 {
103 I2C_BOARD_INFO("tca6416", 0x20),
104 .platform_data = &am3517evm_ui_gpio_expander_info_1,
105 },
106 {
107 I2C_BOARD_INFO("tca6416", 0x21),
108 .platform_data = &am3517evm_ui_gpio_expander_info_2,
109 },
110};
111
112static int __init am3517_evm_i2c_init(void)
113{
114 omap_register_i2c_bus(1, 400, NULL, 0);
115 omap_register_i2c_bus(2, 400, am3517evm_i2c2_boardinfo,
116 ARRAY_SIZE(am3517evm_i2c2_boardinfo));
117 omap_register_i2c_bus(3, 400, am3517evm_i2c3_boardinfo,
118 ARRAY_SIZE(am3517evm_i2c3_boardinfo));
119
120 return 0;
121}
122
123static const struct display_timing am3517_evm_lcd_videomode = {
124 .pixelclock = { 0, 9000000, 0 },
125
126 .hactive = { 0, 480, 0 },
127 .hfront_porch = { 0, 3, 0 },
128 .hback_porch = { 0, 2, 0 },
129 .hsync_len = { 0, 42, 0 },
130
131 .vactive = { 0, 272, 0 },
132 .vfront_porch = { 0, 3, 0 },
133 .vback_porch = { 0, 2, 0 },
134 .vsync_len = { 0, 11, 0 },
135
136 .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
137 DISPLAY_FLAGS_DE_LOW | DISPLAY_FLAGS_PIXDATA_POSEDGE,
138};
139
140static struct panel_dpi_platform_data am3517_evm_lcd_pdata = {
141 .name = "lcd",
142 .source = "dpi.0",
143
144 .data_lines = 16,
145
146 .display_timing = &am3517_evm_lcd_videomode,
147
148 .enable_gpio = LCD_PANEL_PWR,
149 .backlight_gpio = LCD_PANEL_BKLIGHT_PWR,
150};
151
152static struct platform_device am3517_evm_lcd_device = {
153 .name = "panel-dpi",
154 .id = 0,
155 .dev.platform_data = &am3517_evm_lcd_pdata,
156};
157
158static struct connector_dvi_platform_data am3517_evm_dvi_connector_pdata = {
159 .name = "dvi",
160 .source = "tfp410.0",
161 .i2c_bus_num = -1,
162};
163
164static struct platform_device am3517_evm_dvi_connector_device = {
165 .name = "connector-dvi",
166 .id = 0,
167 .dev.platform_data = &am3517_evm_dvi_connector_pdata,
168};
169
170static struct encoder_tfp410_platform_data am3517_evm_tfp410_pdata = {
171 .name = "tfp410.0",
172 .source = "dpi.0",
173 .data_lines = 24,
174 .power_down_gpio = -1,
175};
176
177static struct platform_device am3517_evm_tfp410_device = {
178 .name = "tfp410",
179 .id = 0,
180 .dev.platform_data = &am3517_evm_tfp410_pdata,
181};
182
183static struct connector_atv_platform_data am3517_evm_tv_pdata = {
184 .name = "tv",
185 .source = "venc.0",
186 .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,
187 .invert_polarity = false,
188};
189
190static struct platform_device am3517_evm_tv_connector_device = {
191 .name = "connector-analog-tv",
192 .id = 0,
193 .dev.platform_data = &am3517_evm_tv_pdata,
194};
195
196static struct omap_dss_board_info am3517_evm_dss_data = {
197 .default_display_name = "lcd",
198};
199
200static void __init am3517_evm_display_init(void)
201{
202 gpio_request_one(LCD_PANEL_PWM, GPIOF_OUT_INIT_HIGH, "lcd panel pwm");
203
204 omap_display_init(&am3517_evm_dss_data);
205
206 platform_device_register(&am3517_evm_tfp410_device);
207 platform_device_register(&am3517_evm_dvi_connector_device);
208 platform_device_register(&am3517_evm_lcd_device);
209 platform_device_register(&am3517_evm_tv_connector_device);
210}
211
212/*
213 * Board initialization
214 */
215
216static struct omap_musb_board_data musb_board_data = {
217 .interface_type = MUSB_INTERFACE_ULPI,
218 .mode = MUSB_OTG,
219 .power = 500,
220 .set_phy_power = am35x_musb_phy_power,
221 .clear_irq = am35x_musb_clear_irq,
222 .set_mode = am35x_set_mode,
223 .reset = am35x_musb_reset,
224};
225
226static __init void am3517_evm_musb_init(void)
227{
228 u32 devconf2;
229
230 /*
231 * Set up USB clock/mode in the DEVCONF2 register.
232 */
233 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
234
235 /* USB2.0 PHY reference clock is 13 MHz */
236 devconf2 &= ~(CONF2_REFFREQ | CONF2_OTGMODE | CONF2_PHY_GPIOMODE);
237 devconf2 |= CONF2_REFFREQ_13MHZ | CONF2_SESENDEN | CONF2_VBDTCTEN
238 | CONF2_DATPOL;
239
240 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
241
242 usb_musb_init(&musb_board_data);
243}
244
245static __init void am3517_evm_mcbsp1_init(void)
246{
247 u32 devconf0;
248
249 /* McBSP1 CLKR/FSR signal to be connected to CLKX/FSX pin */
250 devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
251 devconf0 |= OMAP2_MCBSP1_CLKR_MASK | OMAP2_MCBSP1_FSR_MASK;
252 omap_ctrl_writel(devconf0, OMAP2_CONTROL_DEVCONF0);
253}
254
255static struct usbhs_phy_data phy_data[] __initdata = {
256 {
257 .port = 1,
258 .reset_gpio = 57,
259 .vcc_gpio = -EINVAL,
260 },
261};
262
263static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
264 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
265 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
266};
267
268#ifdef CONFIG_OMAP_MUX
269static struct omap_board_mux board_mux[] __initdata = {
270 /* USB OTG DRVVBUS offset = 0x212 */
271 OMAP3_MUX(SAD2D_MCAD23, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
272 { .reg_offset = OMAP_MUX_TERMINATOR },
273};
274#endif
275
276
277static struct resource am3517_hecc_resources[] = {
278 {
279 .start = AM35XX_IPSS_HECC_BASE,
280 .end = AM35XX_IPSS_HECC_BASE + 0x3FFF,
281 .flags = IORESOURCE_MEM,
282 },
283 {
284 .start = 24 + OMAP_INTC_START,
285 .flags = IORESOURCE_IRQ,
286 },
287};
288
289static struct platform_device am3517_hecc_device = {
290 .name = "ti_hecc",
291 .id = -1,
292 .num_resources = ARRAY_SIZE(am3517_hecc_resources),
293 .resource = am3517_hecc_resources,
294};
295
296static struct ti_hecc_platform_data am3517_evm_hecc_pdata = {
297 .scc_hecc_offset = AM35XX_HECC_SCC_HECC_OFFSET,
298 .scc_ram_offset = AM35XX_HECC_SCC_RAM_OFFSET,
299 .hecc_ram_offset = AM35XX_HECC_RAM_OFFSET,
300 .mbx_offset = AM35XX_HECC_MBOX_OFFSET,
301 .int_line = AM35XX_HECC_INT_LINE,
302 .version = AM35XX_HECC_VERSION,
303};
304
305static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata)
306{
307 am3517_hecc_device.dev.platform_data = pdata;
308 platform_device_register(&am3517_hecc_device);
309}
310
311static struct omap2_hsmmc_info mmc[] = {
312 {
313 .mmc = 1,
314 .caps = MMC_CAP_4_BIT_DATA,
315 .gpio_cd = 127,
316 .gpio_wp = 126,
317 },
318 {
319 .mmc = 2,
320 .caps = MMC_CAP_4_BIT_DATA,
321 .gpio_cd = 128,
322 .gpio_wp = 129,
323 },
324 {} /* Terminator */
325};
326
327static void __init am3517_evm_init(void)
328{
329 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
330
331 am3517_evm_i2c_init();
332
333 am3517_evm_display_init();
334
335 omap_serial_init();
336 omap_sdrc_init(NULL, NULL);
337
338 /* Configure GPIO for EHCI port */
339 omap_mux_init_gpio(57, OMAP_PIN_OUTPUT);
340
341 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
342 usbhs_init(&usbhs_bdata);
343 am3517_evm_hecc_init(&am3517_evm_hecc_pdata);
344
345 /* RTC - S35390A */
346 am3517_evm_rtc_init();
347
348 i2c_register_board_info(1, am3517evm_i2c1_boardinfo,
349 ARRAY_SIZE(am3517evm_i2c1_boardinfo));
350 /*Ethernet*/
351 am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);
352
353 /* MUSB */
354 am3517_evm_musb_init();
355
356 /* McBSP1 */
357 am3517_evm_mcbsp1_init();
358
359 /* MMC init function */
360 omap_hsmmc_init(mmc);
361}
362
363MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
364 .atag_offset = 0x100,
365 .reserve = omap_reserve,
366 .map_io = omap3_map_io,
367 .init_early = am35xx_init_early,
368 .init_irq = omap3_init_irq,
369 .init_machine = am3517_evm_init,
370 .init_late = am35xx_init_late,
371 .init_time = omap3_sync32k_timer_init,
372 .restart = omap3xxx_restart,
373MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
deleted file mode 100644
index 794756df8529..000000000000
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ /dev/null
@@ -1,335 +0,0 @@
1/*
2 * linux/arch/arm/mach-omap2/board-cm-t3517.c
3 *
4 * Support for the CompuLab CM-T3517 modules
5 *
6 * Copyright (C) 2010 CompuLab, Ltd.
7 * Author: Igor Grinberg <grinberg@compulab.co.il>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/platform_device.h>
28#include <linux/delay.h>
29#include <linux/gpio.h>
30#include <linux/leds.h>
31#include <linux/omap-gpmc.h>
32#include <linux/rtc-v3020.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/nand.h>
35#include <linux/mtd/partitions.h>
36#include <linux/mmc/host.h>
37#include <linux/can/platform/ti_hecc.h>
38
39#include <asm/mach-types.h>
40#include <asm/mach/arch.h>
41#include <asm/mach/map.h>
42
43#include "common.h"
44#include <linux/platform_data/mtd-nand-omap2.h>
45
46#include "am35xx.h"
47
48#include "mux.h"
49#include "control.h"
50#include "hsmmc.h"
51#include "common-board-devices.h"
52#include "am35xx-emac.h"
53
54#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
55static struct gpio_led cm_t3517_leds[] = {
56 [0] = {
57 .gpio = 186,
58 .name = "cm-t3517:green",
59 .default_trigger = "heartbeat",
60 .active_low = 0,
61 },
62};
63
64static struct gpio_led_platform_data cm_t3517_led_pdata = {
65 .num_leds = ARRAY_SIZE(cm_t3517_leds),
66 .leds = cm_t3517_leds,
67};
68
69static struct platform_device cm_t3517_led_device = {
70 .name = "leds-gpio",
71 .id = -1,
72 .dev = {
73 .platform_data = &cm_t3517_led_pdata,
74 },
75};
76
77static void __init cm_t3517_init_leds(void)
78{
79 platform_device_register(&cm_t3517_led_device);
80}
81#else
82static inline void cm_t3517_init_leds(void) {}
83#endif
84
85#if defined(CONFIG_CAN_TI_HECC) || defined(CONFIG_CAN_TI_HECC_MODULE)
86static struct resource cm_t3517_hecc_resources[] = {
87 {
88 .start = AM35XX_IPSS_HECC_BASE,
89 .end = AM35XX_IPSS_HECC_BASE + SZ_16K - 1,
90 .flags = IORESOURCE_MEM,
91 },
92 {
93 .start = 24 + OMAP_INTC_START,
94 .flags = IORESOURCE_IRQ,
95 },
96};
97
98static struct ti_hecc_platform_data cm_t3517_hecc_pdata = {
99 .scc_hecc_offset = AM35XX_HECC_SCC_HECC_OFFSET,
100 .scc_ram_offset = AM35XX_HECC_SCC_RAM_OFFSET,
101 .hecc_ram_offset = AM35XX_HECC_RAM_OFFSET,
102 .mbx_offset = AM35XX_HECC_MBOX_OFFSET,
103 .int_line = AM35XX_HECC_INT_LINE,
104 .version = AM35XX_HECC_VERSION,
105};
106
107static struct platform_device cm_t3517_hecc_device = {
108 .name = "ti_hecc",
109 .id = 1,
110 .num_resources = ARRAY_SIZE(cm_t3517_hecc_resources),
111 .resource = cm_t3517_hecc_resources,
112 .dev = {
113 .platform_data = &cm_t3517_hecc_pdata,
114 },
115};
116
117static void cm_t3517_init_hecc(void)
118{
119 platform_device_register(&cm_t3517_hecc_device);
120}
121#else
122static inline void cm_t3517_init_hecc(void) {}
123#endif
124
125#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
126static struct omap2_hsmmc_info cm_t3517_mmc[] = {
127 {
128 .mmc = 1,
129 .caps = MMC_CAP_4_BIT_DATA,
130 .gpio_cd = 144,
131 .gpio_wp = 59,
132 },
133 {
134 .mmc = 2,
135 .caps = MMC_CAP_4_BIT_DATA,
136 .gpio_cd = -EINVAL,
137 .gpio_wp = -EINVAL,
138 },
139 {} /* Terminator */
140};
141#else
142#define cm_t3517_mmc NULL
143#endif
144
145#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
146#define RTC_IO_GPIO (153)
147#define RTC_WR_GPIO (154)
148#define RTC_RD_GPIO (53)
149#define RTC_CS_GPIO (163)
150#define RTC_CS_EN_GPIO (160)
151
152struct v3020_platform_data cm_t3517_v3020_pdata = {
153 .use_gpio = 1,
154 .gpio_cs = RTC_CS_GPIO,
155 .gpio_wr = RTC_WR_GPIO,
156 .gpio_rd = RTC_RD_GPIO,
157 .gpio_io = RTC_IO_GPIO,
158};
159
160static struct platform_device cm_t3517_rtc_device = {
161 .name = "v3020",
162 .id = -1,
163 .dev = {
164 .platform_data = &cm_t3517_v3020_pdata,
165 }
166};
167
168static void __init cm_t3517_init_rtc(void)
169{
170 int err;
171
172 err = gpio_request_one(RTC_CS_EN_GPIO, GPIOF_OUT_INIT_HIGH,
173 "rtc cs en");
174 if (err) {
175 pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err);
176 return;
177 }
178
179 platform_device_register(&cm_t3517_rtc_device);
180}
181#else
182static inline void cm_t3517_init_rtc(void) {}
183#endif
184
185#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
186#define HSUSB1_RESET_GPIO (146)
187#define HSUSB2_RESET_GPIO (147)
188#define USB_HUB_RESET_GPIO (152)
189
190static struct usbhs_phy_data phy_data[] __initdata = {
191 {
192 .port = 1,
193 .reset_gpio = HSUSB1_RESET_GPIO,
194 .vcc_gpio = -EINVAL,
195 },
196 {
197 .port = 2,
198 .reset_gpio = HSUSB2_RESET_GPIO,
199 .vcc_gpio = -EINVAL,
200 },
201};
202
203static struct usbhs_omap_platform_data cm_t3517_ehci_pdata __initdata = {
204 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
205 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
206};
207
208static int __init cm_t3517_init_usbh(void)
209{
210 int err;
211
212 err = gpio_request_one(USB_HUB_RESET_GPIO, GPIOF_OUT_INIT_LOW,
213 "usb hub rst");
214 if (err) {
215 pr_err("CM-T3517: usb hub rst gpio request failed: %d\n", err);
216 } else {
217 udelay(10);
218 gpio_set_value(USB_HUB_RESET_GPIO, 1);
219 msleep(1);
220 }
221
222 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
223 usbhs_init(&cm_t3517_ehci_pdata);
224
225 return 0;
226}
227#else
228static inline int cm_t3517_init_usbh(void)
229{
230 return 0;
231}
232#endif
233
234#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
235static struct mtd_partition cm_t3517_nand_partitions[] = {
236 {
237 .name = "xloader",
238 .offset = 0, /* Offset = 0x00000 */
239 .size = 4 * NAND_BLOCK_SIZE,
240 .mask_flags = MTD_WRITEABLE
241 },
242 {
243 .name = "uboot",
244 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
245 .size = 15 * NAND_BLOCK_SIZE,
246 },
247 {
248 .name = "uboot environment",
249 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
250 .size = 2 * NAND_BLOCK_SIZE,
251 },
252 {
253 .name = "linux",
254 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
255 .size = 32 * NAND_BLOCK_SIZE,
256 },
257 {
258 .name = "rootfs",
259 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
260 .size = MTDPART_SIZ_FULL,
261 },
262};
263
264static struct omap_nand_platform_data cm_t3517_nand_data = {
265 .parts = cm_t3517_nand_partitions,
266 .nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions),
267 .cs = 0,
268};
269
270static void __init cm_t3517_init_nand(void)
271{
272 if (gpmc_nand_init(&cm_t3517_nand_data, NULL) < 0)
273 pr_err("CM-T3517: NAND initialization failed\n");
274}
275#else
276static inline void cm_t3517_init_nand(void) {}
277#endif
278
279#ifdef CONFIG_OMAP_MUX
280static struct omap_board_mux board_mux[] __initdata = {
281 /* GPIO186 - Green LED */
282 OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
283
284 /* RTC GPIOs: */
285 /* IO - GPIO153 */
286 OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
287 /* WR# - GPIO154 */
288 OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
289 /* RD# - GPIO53 */
290 OMAP3_MUX(GPMC_NCS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
291 /* CS# - GPIO163 */
292 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
293 /* CS EN - GPIO160 */
294 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
295
296 /* HSUSB1 RESET */
297 OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
298 /* HSUSB2 RESET */
299 OMAP3_MUX(UART2_RX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
300 /* CM-T3517 USB HUB nRESET */
301 OMAP3_MUX(MCBSP4_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
302
303 /* CD - GPIO144 and WP - GPIO59 for MMC1 - SB-T35 */
304 OMAP3_MUX(UART2_CTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
305 OMAP3_MUX(GPMC_CLK, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
306
307 { .reg_offset = OMAP_MUX_TERMINATOR },
308};
309#endif
310
311static void __init cm_t3517_init(void)
312{
313 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
314 omap_serial_init();
315 omap_sdrc_init(NULL, NULL);
316 cm_t3517_init_leds();
317 cm_t3517_init_nand();
318 cm_t3517_init_rtc();
319 cm_t3517_init_usbh();
320 cm_t3517_init_hecc();
321 am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);
322 omap_hsmmc_init(cm_t3517_mmc);
323}
324
325MACHINE_START(CM_T3517, "Compulab CM-T3517")
326 .atag_offset = 0x100,
327 .reserve = omap_reserve,
328 .map_io = omap3_map_io,
329 .init_early = am35xx_init_early,
330 .init_irq = omap3_init_irq,
331 .init_machine = cm_t3517_init,
332 .init_late = am35xx_init_late,
333 .init_time = omap3_gptimer_timer_init,
334 .restart = omap3xxx_restart,
335MACHINE_END
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 644ff3231bb8..e79c80bbc755 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -3634,10 +3634,6 @@ int __init omap3xxx_clk_init(void)
3634 omap_clocks_register(omap36xx_am35xx_omap3430es2plus_clks, 3634 omap_clocks_register(omap36xx_am35xx_omap3430es2plus_clks,
3635 ARRAY_SIZE(omap36xx_am35xx_omap3430es2plus_clks)); 3635 ARRAY_SIZE(omap36xx_am35xx_omap3430es2plus_clks));
3636 omap_clocks_register(omap3xxx_clks, ARRAY_SIZE(omap3xxx_clks)); 3636 omap_clocks_register(omap3xxx_clks, ARRAY_SIZE(omap3xxx_clks));
3637 } else if (soc_is_am33xx()) {
3638 cpu_mask = RATE_IN_AM33XX;
3639 } else if (cpu_is_ti814x()) {
3640 cpu_mask = RATE_IN_TI814X;
3641 } else if (cpu_is_omap34xx()) { 3637 } else if (cpu_is_omap34xx()) {
3642 if (omap_rev() == OMAP3430_REV_ES1_0) { 3638 if (omap_rev() == OMAP3430_REV_ES1_0) {
3643 cpu_mask = RATE_IN_3430ES1; 3639 cpu_mask = RATE_IN_3430ES1;
@@ -3681,7 +3677,7 @@ int __init omap3xxx_clk_init(void)
3681 * Lock DPLL5 -- here only until other device init code can 3677 * Lock DPLL5 -- here only until other device init code can
3682 * handle this 3678 * handle this
3683 */ 3679 */
3684 if (!cpu_is_ti81xx() && (omap_rev() >= OMAP3430_REV_ES2_0)) 3680 if (omap_rev() >= OMAP3430_REV_ES2_0)
3685 omap3_clk_lock_dpll5(); 3681 omap3_clk_lock_dpll5();
3686 3682
3687 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ 3683 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
deleted file mode 100644
index c78e893eba7d..000000000000
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ /dev/null
@@ -1,142 +0,0 @@
1/*
2 * OMAP2xxx APLL clock control functions
3 *
4 * Copyright (C) 2005-2008 Texas Instruments, Inc.
5 * Copyright (C) 2004-2010 Nokia Corporation
6 *
7 * Contacts:
8 * Richard Woodruff <r-woodruff2@ti.com>
9 * Paul Walmsley
10 *
11 * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
12 * Gordon McNutt and RidgeRun, Inc.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18#undef DEBUG
19
20#include <linux/kernel.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23
24
25#include "clock.h"
26#include "clock2xxx.h"
27#include "cm2xxx.h"
28#include "cm-regbits-24xx.h"
29
30/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
31#define EN_APLL_STOPPED 0
32#define EN_APLL_LOCKED 3
33
34/* CM_CLKSEL1_PLL.APLLS_CLKIN options (24XX) */
35#define APLLS_CLKIN_19_2MHZ 0
36#define APLLS_CLKIN_13MHZ 2
37#define APLLS_CLKIN_12MHZ 3
38
39/* Private functions */
40
41/**
42 * omap2xxx_clk_apll_locked - is the APLL locked?
43 * @hw: struct clk_hw * of the APLL to check
44 *
45 * If the APLL IP block referred to by @hw indicates that it's locked,
46 * return true; otherwise, return false.
47 */
48static bool omap2xxx_clk_apll_locked(struct clk_hw *hw)
49{
50 struct clk_hw_omap *clk = to_clk_hw_omap(hw);
51 u32 r, apll_mask;
52
53 apll_mask = EN_APLL_LOCKED << clk->enable_bit;
54
55 r = omap2xxx_cm_get_pll_status();
56
57 return ((r & apll_mask) == apll_mask) ? true : false;
58}
59
60int omap2_clk_apll96_enable(struct clk_hw *hw)
61{
62 return omap2xxx_cm_apll96_enable();
63}
64
65int omap2_clk_apll54_enable(struct clk_hw *hw)
66{
67 return omap2xxx_cm_apll54_enable();
68}
69
70static void _apll96_allow_idle(struct clk_hw_omap *clk)
71{
72 omap2xxx_cm_set_apll96_auto_low_power_stop();
73}
74
75static void _apll96_deny_idle(struct clk_hw_omap *clk)
76{
77 omap2xxx_cm_set_apll96_disable_autoidle();
78}
79
80static void _apll54_allow_idle(struct clk_hw_omap *clk)
81{
82 omap2xxx_cm_set_apll54_auto_low_power_stop();
83}
84
85static void _apll54_deny_idle(struct clk_hw_omap *clk)
86{
87 omap2xxx_cm_set_apll54_disable_autoidle();
88}
89
90void omap2_clk_apll96_disable(struct clk_hw *hw)
91{
92 omap2xxx_cm_apll96_disable();
93}
94
95void omap2_clk_apll54_disable(struct clk_hw *hw)
96{
97 omap2xxx_cm_apll54_disable();
98}
99
100unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw,
101 unsigned long parent_rate)
102{
103 return (omap2xxx_clk_apll_locked(hw)) ? 54000000 : 0;
104}
105
106unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw,
107 unsigned long parent_rate)
108{
109 return (omap2xxx_clk_apll_locked(hw)) ? 96000000 : 0;
110}
111
112/* Public data */
113const struct clk_hw_omap_ops clkhwops_apll54 = {
114 .allow_idle = _apll54_allow_idle,
115 .deny_idle = _apll54_deny_idle,
116};
117
118const struct clk_hw_omap_ops clkhwops_apll96 = {
119 .allow_idle = _apll96_allow_idle,
120 .deny_idle = _apll96_deny_idle,
121};
122
123/* Public functions */
124
125u32 omap2xxx_get_apll_clkin(void)
126{
127 u32 aplls, srate = 0;
128
129 aplls = omap2xxx_cm_get_pll_config();
130 aplls &= OMAP24XX_APLLS_CLKIN_MASK;
131 aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT;
132
133 if (aplls == APLLS_CLKIN_19_2MHZ)
134 srate = 19200000;
135 else if (aplls == APLLS_CLKIN_13MHZ)
136 srate = 13000000;
137 else if (aplls == APLLS_CLKIN_12MHZ)
138 srate = 12000000;
139
140 return srate;
141}
142
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index a4282e79143e..1cf9dd85248a 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -177,7 +177,6 @@ struct clksel {
177u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk); 177u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk);
178void omap3_dpll_allow_idle(struct clk_hw_omap *clk); 178void omap3_dpll_allow_idle(struct clk_hw_omap *clk);
179void omap3_dpll_deny_idle(struct clk_hw_omap *clk); 179void omap3_dpll_deny_idle(struct clk_hw_omap *clk);
180int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk);
181void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk); 180void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk);
182void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk); 181void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk);
183 182
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index a090225ceeba..125c37614848 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -22,12 +22,7 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk,
22unsigned long omap2_osc_clk_recalc(struct clk_hw *clk, 22unsigned long omap2_osc_clk_recalc(struct clk_hw *clk,
23 unsigned long parent_rate); 23 unsigned long parent_rate);
24void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw); 24void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw);
25unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw,
26 unsigned long parent_rate);
27unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw,
28 unsigned long parent_rate);
29unsigned long omap2xxx_clk_get_core_rate(void); 25unsigned long omap2xxx_clk_get_core_rate(void);
30u32 omap2xxx_get_apll_clkin(void);
31u32 omap2xxx_get_sysclkdiv(void); 26u32 omap2xxx_get_sysclkdiv(void);
32void omap2xxx_clk_prepare_for_reboot(void); 27void omap2xxx_clk_prepare_for_reboot(void);
33void omap2xxx_clkt_vps_check_bootloader_rates(void); 28void omap2xxx_clkt_vps_check_bootloader_rates(void);
@@ -46,11 +41,5 @@ int omap2430_clk_init(void);
46#endif 41#endif
47 42
48extern struct clk_hw *dclk_hw; 43extern struct clk_hw *dclk_hw;
49int omap2_enable_osc_ck(struct clk_hw *hw);
50void omap2_disable_osc_ck(struct clk_hw *hw);
51int omap2_clk_apll96_enable(struct clk_hw *hw);
52int omap2_clk_apll54_enable(struct clk_hw *hw);
53void omap2_clk_apll96_disable(struct clk_hw *hw);
54void omap2_clk_apll54_disable(struct clk_hw *hw);
55 44
56#endif 45#endif
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index a96d901b1d5d..ef62ac9dcd05 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -370,16 +370,6 @@ u32 omap2xxx_cm_get_core_pll_config(void)
370 return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); 370 return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
371} 371}
372 372
373u32 omap2xxx_cm_get_pll_config(void)
374{
375 return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
376}
377
378u32 omap2xxx_cm_get_pll_status(void)
379{
380 return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
381}
382
383void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm) 373void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm)
384{ 374{
385 u32 tmp; 375 u32 tmp;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index c89502b168ae..83b6c597b0e1 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -60,8 +60,6 @@ extern int omap2xxx_cm_fclks_active(void);
60extern int omap2xxx_cm_mpu_retention_allowed(void); 60extern int omap2xxx_cm_mpu_retention_allowed(void);
61extern u32 omap2xxx_cm_get_core_clk_src(void); 61extern u32 omap2xxx_cm_get_core_clk_src(void);
62extern u32 omap2xxx_cm_get_core_pll_config(void); 62extern u32 omap2xxx_cm_get_core_pll_config(void);
63extern u32 omap2xxx_cm_get_pll_config(void);
64extern u32 omap2xxx_cm_get_pll_status(void);
65extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, 63extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
66 u32 mdm); 64 u32 mdm);
67 65
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b9ad463a368a..cc5aac784278 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -72,27 +72,6 @@ static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
72 return v; 72 return v;
73} 73}
74 74
75static inline u32 am33xx_cm_set_reg_bits(u32 bits, s16 inst, s16 idx)
76{
77 return am33xx_cm_rmw_reg_bits(bits, bits, inst, idx);
78}
79
80static inline u32 am33xx_cm_clear_reg_bits(u32 bits, s16 inst, s16 idx)
81{
82 return am33xx_cm_rmw_reg_bits(bits, 0x0, inst, idx);
83}
84
85static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask)
86{
87 u32 v;
88
89 v = am33xx_cm_read_reg(inst, idx);
90 v &= mask;
91 v >>= __ffs(mask);
92
93 return v;
94}
95
96/** 75/**
97 * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield 76 * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
98 * @inst: CM instance register offset (*_INST macro) 77 * @inst: CM instance register offset (*_INST macro)
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 0e58e5a85d53..fc712240e5fd 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -36,26 +36,6 @@
36/* Static rate multiplier for OMAP4 REGM4XEN clocks */ 36/* Static rate multiplier for OMAP4 REGM4XEN clocks */
37#define OMAP4430_REGM4XEN_MULT 4 37#define OMAP4430_REGM4XEN_MULT 4
38 38
39/* Supported only on OMAP4 */
40int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk)
41{
42 u32 v;
43 u32 mask;
44
45 if (!clk || !clk->clksel_reg)
46 return -EINVAL;
47
48 mask = clk->flags & CLOCK_CLKOUTX2 ?
49 OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK :
50 OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
51
52 v = omap2_clk_readl(clk, clk->clksel_reg);
53 v &= mask;
54 v >>= __ffs(mask);
55
56 return v;
57}
58
59void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk) 39void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)
60{ 40{
61 u32 v; 41 u32 v;
diff --git a/arch/arm/mach-omap2/omap-pm-noop.c b/arch/arm/mach-omap2/omap-pm-noop.c
index 6a3be2bebddb..a1ee8066958e 100644
--- a/arch/arm/mach-omap2/omap-pm-noop.c
+++ b/arch/arm/mach-omap2/omap-pm-noop.c
@@ -86,200 +86,10 @@ int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r)
86 return 0; 86 return 0;
87} 87}
88 88
89int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev,
90 long t)
91{
92 if (!req_dev || !dev || t < -1) {
93 WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
94 return -EINVAL;
95 }
96
97 if (t == -1)
98 pr_debug("OMAP PM: remove max device latency constraint: dev %s\n",
99 dev_name(dev));
100 else
101 pr_debug("OMAP PM: add max device latency constraint: dev %s, t = %ld usec\n",
102 dev_name(dev), t);
103
104 /*
105 * For current Linux, this needs to map the device to a
106 * powerdomain, then go through the list of current max lat
107 * constraints on that powerdomain and find the smallest. If
108 * the latency constraint has changed, the code should
109 * recompute the state to enter for the next powerdomain
110 * state. Conceivably, this code should also determine
111 * whether to actually disable the device clocks or not,
112 * depending on how long it takes to re-enable the clocks.
113 *
114 * TI CDP code can call constraint_set here.
115 */
116
117 return 0;
118}
119
120int omap_pm_set_max_sdma_lat(struct device *dev, long t)
121{
122 if (!dev || t < -1) {
123 WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
124 return -EINVAL;
125 }
126
127 if (t == -1)
128 pr_debug("OMAP PM: remove max DMA latency constraint: dev %s\n",
129 dev_name(dev));
130 else
131 pr_debug("OMAP PM: add max DMA latency constraint: dev %s, t = %ld usec\n",
132 dev_name(dev), t);
133
134 /*
135 * For current Linux PM QOS params, this code should scan the
136 * list of maximum CPU and DMA latencies and select the
137 * smallest, then set cpu_dma_latency pm_qos_param
138 * accordingly.
139 *
140 * For future Linux PM QOS params, with separate CPU and DMA
141 * latency params, this code should just set the dma_latency param.
142 *
143 * TI CDP code can call constraint_set here.
144 */
145
146 return 0;
147}
148
149int omap_pm_set_min_clk_rate(struct device *dev, struct clk *c, long r)
150{
151 if (!dev || !c || r < 0) {
152 WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
153 return -EINVAL;
154 }
155
156 if (r == 0)
157 pr_debug("OMAP PM: remove min clk rate constraint: dev %s\n",
158 dev_name(dev));
159 else
160 pr_debug("OMAP PM: add min clk rate constraint: dev %s, rate = %ld Hz\n",
161 dev_name(dev), r);
162
163 /*
164 * Code in a real implementation should keep track of these
165 * constraints on the clock, and determine the highest minimum
166 * clock rate. It should iterate over each OPP and determine
167 * whether the OPP will result in a clock rate that would
168 * satisfy this constraint (and any other PM constraint in effect
169 * at that time). Once it finds the lowest-voltage OPP that
170 * meets those conditions, it should switch to it, or return
171 * an error if the code is not capable of doing so.
172 */
173
174 return 0;
175}
176
177/* 89/*
178 * DSP Bridge-specific constraints 90 * DSP Bridge-specific constraints
179 */ 91 */
180 92
181const struct omap_opp *omap_pm_dsp_get_opp_table(void)
182{
183 pr_debug("OMAP PM: DSP request for OPP table\n");
184
185 /*
186 * Return DSP frequency table here: The final item in the
187 * array should have .rate = .opp_id = 0.
188 */
189
190 return NULL;
191}
192
193void omap_pm_dsp_set_min_opp(u8 opp_id)
194{
195 if (opp_id == 0) {
196 WARN_ON(1);
197 return;
198 }
199
200 pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id);
201
202 /*
203 *
204 * For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we
205 * can just test to see which is higher, the CPU's desired OPP
206 * ID or the DSP's desired OPP ID, and use whichever is
207 * highest.
208 *
209 * In CDP12.14+, the VDD1 OPP custom clock that controls the DSP
210 * rate is keyed on MPU speed, not the OPP ID. So we need to
211 * map the OPP ID to the MPU speed for use with clk_set_rate()
212 * if it is higher than the current OPP clock rate.
213 *
214 */
215}
216
217
218u8 omap_pm_dsp_get_opp(void)
219{
220 pr_debug("OMAP PM: DSP requests current DSP OPP ID\n");
221
222 /*
223 * For l-o dev tree, call clk_get_rate() on VDD1 OPP clock
224 *
225 * CDP12.14+:
226 * Call clk_get_rate() on the OPP custom clock, map that to an
227 * OPP ID using the tables defined in board-*.c/chip-*.c files.
228 */
229
230 return 0;
231}
232
233/*
234 * CPUFreq-originated constraint
235 *
236 * In the future, this should be handled by custom OPP clocktype
237 * functions.
238 */
239
240struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void)
241{
242 pr_debug("OMAP PM: CPUFreq request for frequency table\n");
243
244 /*
245 * Return CPUFreq frequency table here: loop over
246 * all VDD1 clkrates, pull out the mpu_ck frequencies, build
247 * table
248 */
249
250 return NULL;
251}
252
253void omap_pm_cpu_set_freq(unsigned long f)
254{
255 if (f == 0) {
256 WARN_ON(1);
257 return;
258 }
259
260 pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n",
261 f);
262
263 /*
264 * For l-o dev tree, determine whether MPU freq or DSP OPP id
265 * freq is higher. Find the OPP ID corresponding to the
266 * higher frequency. Call clk_round_rate() and clk_set_rate()
267 * on the OPP custom clock.
268 *
269 * CDP should just be able to set the VDD1 OPP clock rate here.
270 */
271}
272
273unsigned long omap_pm_cpu_get_freq(void)
274{
275 pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n");
276
277 /*
278 * Call clk_get_rate() on the mpu_ck.
279 */
280
281 return 0;
282}
283 93
284/** 94/**
285 * omap_pm_enable_off_mode - notify OMAP PM that off-mode is enabled 95 * omap_pm_enable_off_mode - notify OMAP PM that off-mode is enabled
@@ -363,9 +173,3 @@ int __init omap_pm_if_init(void)
363{ 173{
364 return 0; 174 return 0;
365} 175}
366
367void omap_pm_if_exit(void)
368{
369 /* Deallocate CPUFreq frequency table here */
370}
371
diff --git a/arch/arm/mach-omap2/omap-pm.h b/arch/arm/mach-omap2/omap-pm.h
index 1d777e63e05c..109bef5538eb 100644
--- a/arch/arm/mach-omap2/omap-pm.h
+++ b/arch/arm/mach-omap2/omap-pm.h
@@ -50,14 +50,6 @@ int __init omap_pm_if_early_init(void);
50 */ 50 */
51int __init omap_pm_if_init(void); 51int __init omap_pm_if_init(void);
52 52
53/**
54 * omap_pm_if_exit - OMAP PM exit code
55 *
56 * Exit code; currently unused. The "_if_" is to avoid name
57 * collisions with the PM idle-loop code.
58 */
59void omap_pm_if_exit(void);
60
61/* 53/*
62 * Device-driver-originated constraints (via board-*.c files, platform_data) 54 * Device-driver-originated constraints (via board-*.c files, platform_data)
63 */ 55 */
@@ -132,163 +124,6 @@ int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
132int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r); 124int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
133 125
134 126
135/**
136 * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
137 * @req_dev: struct device * requesting the constraint, or NULL if none
138 * @dev: struct device * to set the constraint one
139 * @t: maximum device wakeup latency in microseconds
140 *
141 * Request that the maximum amount of time necessary for a device @dev
142 * to become accessible after its clocks are enabled should be no
143 * greater than @t microseconds. Specifically, this represents the
144 * time from when a device driver enables device clocks with
145 * clk_enable(), to when the register reads and writes on the device
146 * will succeed. This function should be called before clk_disable()
147 * is called, since the power state transition decision may be made
148 * during clk_disable().
149 *
150 * It is intended that underlying PM code will use this information to
151 * determine what power state to put the powerdomain enclosing this
152 * device into.
153 *
154 * Multiple calls to omap_pm_set_max_dev_wakeup_lat() will replace the
155 * previous wakeup latency values for this device. To remove the
156 * wakeup latency restriction for this device, call with t = -1.
157 *
158 * Returns -EINVAL for an invalid argument, -ERANGE if the constraint
159 * is not satisfiable, or 0 upon success.
160 */
161int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev,
162 long t);
163
164
165/**
166 * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
167 * @dev: struct device *
168 * @t: maximum DMA transfer start latency in microseconds
169 *
170 * Request that the maximum system DMA transfer start latency for this
171 * device 'dev' should be no greater than 't' microseconds. "DMA
172 * transfer start latency" here is defined as the elapsed time from
173 * when a device (e.g., McBSP) requests that a system DMA transfer
174 * start or continue, to the time at which data starts to flow into
175 * that device from the system DMA controller.
176 *
177 * It is intended that underlying PM code will use this information to
178 * determine what power state to put the CORE powerdomain into.
179 *
180 * Since system DMA transfers may not involve the MPU, this function
181 * will not affect MPU wakeup latency. Use set_max_cpu_lat() to do
182 * so. Similarly, this function will not affect device wakeup latency
183 * -- use set_max_dev_wakeup_lat() to affect that.
184 *
185 * Multiple calls to set_max_sdma_lat() will replace the previous t
186 * value for this device. To remove the maximum DMA latency for this
187 * device, call with t = -1.
188 *
189 * Returns -EINVAL for an invalid argument, -ERANGE if the constraint
190 * is not satisfiable, or 0 upon success.
191 */
192int omap_pm_set_max_sdma_lat(struct device *dev, long t);
193
194
195/**
196 * omap_pm_set_min_clk_rate - set minimum clock rate requested by @dev
197 * @dev: struct device * requesting the constraint
198 * @clk: struct clk * to set the minimum rate constraint on
199 * @r: minimum rate in Hz
200 *
201 * Request that the minimum clock rate on the device @dev's clk @clk
202 * be no less than @r Hz.
203 *
204 * It is expected that the OMAP PM code will use this information to
205 * find an OPP or clock setting that will satisfy this clock rate
206 * constraint, along with any other applicable system constraints on
207 * the clock rate or corresponding voltage, etc.
208 *
209 * omap_pm_set_min_clk_rate() differs from the clock code's
210 * clk_set_rate() in that it considers other constraints before taking
211 * any hardware action, and may change a system OPP rather than just a
212 * clock rate. clk_set_rate() is intended to be a low-level
213 * interface.
214 *
215 * omap_pm_set_min_clk_rate() is easily open to abuse. A better API
216 * would be something like "omap_pm_set_min_dev_performance()";
217 * however, there is no easily-generalizable concept of performance
218 * that applies to all devices. Only a device (and possibly the
219 * device subsystem) has both the subsystem-specific knowledge, and
220 * the hardware IP block-specific knowledge, to translate a constraint
221 * on "touchscreen sampling accuracy" or "number of pixels or polygons
222 * rendered per second" to a clock rate. This translation can be
223 * dependent on the hardware IP block's revision, or firmware version,
224 * and the driver is the only code on the system that has this
225 * information and can know how to translate that into a clock rate.
226 *
227 * The intended use-case for this function is for userspace or other
228 * kernel code to communicate a particular performance requirement to
229 * a subsystem; then for the subsystem to communicate that requirement
230 * to something that is meaningful to the device driver; then for the
231 * device driver to convert that requirement to a clock rate, and to
232 * then call omap_pm_set_min_clk_rate().
233 *
234 * Users of this function (such as device drivers) should not simply
235 * call this function with some high clock rate to ensure "high
236 * performance." Rather, the device driver should take a performance
237 * constraint from its subsystem, such as "render at least X polygons
238 * per second," and use some formula or table to convert that into a
239 * clock rate constraint given the hardware type and hardware
240 * revision. Device drivers or subsystems should not assume that they
241 * know how to make a power/performance tradeoff - some device use
242 * cases may tolerate a lower-fidelity device function for lower power
243 * consumption; others may demand a higher-fidelity device function,
244 * no matter what the power consumption.
245 *
246 * Multiple calls to omap_pm_set_min_clk_rate() will replace the
247 * previous rate value for the device @dev. To remove the minimum clock
248 * rate constraint for the device, call with r = 0.
249 *
250 * Returns -EINVAL for an invalid argument, -ERANGE if the constraint
251 * is not satisfiable, or 0 upon success.
252 */
253int omap_pm_set_min_clk_rate(struct device *dev, struct clk *c, long r);
254
255/*
256 * DSP Bridge-specific constraints
257 */
258
259/**
260 * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
261 *
262 * Intended for use by DSPBridge. Returns an array of OPP->DSP clock
263 * frequency entries. The final item in the array should have .rate =
264 * .opp_id = 0.
265 */
266const struct omap_opp *omap_pm_dsp_get_opp_table(void);
267
268/**
269 * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
270 * @opp_id: target DSP OPP ID
271 *
272 * Set a minimum OPP ID for the DSP. This is intended to be called
273 * only from the DSP Bridge MPU-side driver. Unfortunately, the only
274 * information that code receives from the DSP/BIOS load estimator is the
275 * target OPP ID; hence, this interface. No return value.
276 */
277void omap_pm_dsp_set_min_opp(u8 opp_id);
278
279/**
280 * omap_pm_dsp_get_opp - report the current DSP OPP ID
281 *
282 * Report the current OPP for the DSP. Since on OMAP3, the DSP and
283 * MPU share a single voltage domain, the OPP ID returned back may
284 * represent a higher DSP speed than the OPP requested via
285 * omap_pm_dsp_set_min_opp().
286 *
287 * Returns the current VDD1 OPP ID, or 0 upon error.
288 */
289u8 omap_pm_dsp_get_opp(void);
290
291
292/* 127/*
293 * CPUFreq-originated constraint 128 * CPUFreq-originated constraint
294 * 129 *
@@ -296,33 +131,6 @@ u8 omap_pm_dsp_get_opp(void);
296 * functions. 131 * functions.
297 */ 132 */
298 133
299/**
300 * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
301 *
302 * Provide a frequency table usable by CPUFreq for the current chip/board.
303 * Returns a pointer to a struct cpufreq_frequency_table array or NULL
304 * upon error.
305 */
306struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
307
308/**
309 * omap_pm_cpu_set_freq - set the current minimum MPU frequency
310 * @f: MPU frequency in Hz
311 *
312 * Set the current minimum CPU frequency. The actual CPU frequency
313 * used could end up higher if the DSP requested a higher OPP.
314 * Intended to be called by plat-omap/cpu_omap.c:omap_target(). No
315 * return value.
316 */
317void omap_pm_cpu_set_freq(unsigned long f);
318
319/**
320 * omap_pm_cpu_get_freq - report the current CPU frequency
321 *
322 * Returns the current MPU frequency, or 0 upon error.
323 */
324unsigned long omap_pm_cpu_get_freq(void);
325
326 134
327/* 135/*
328 * Device context loss tracking 136 * Device context loss tracking
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 2af58570cb65..bb41dc2b580e 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -3384,91 +3384,6 @@ int omap_hwmod_shutdown(struct omap_hwmod *oh)
3384 return 0; 3384 return 0;
3385} 3385}
3386 3386
3387/**
3388 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3389 * @oh: struct omap_hwmod *oh
3390 *
3391 * Intended to be called by the omap_device code.
3392 */
3393int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3394{
3395 unsigned long flags;
3396
3397 spin_lock_irqsave(&oh->_lock, flags);
3398 _enable_clocks(oh);
3399 spin_unlock_irqrestore(&oh->_lock, flags);
3400
3401 return 0;
3402}
3403
3404/**
3405 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3406 * @oh: struct omap_hwmod *oh
3407 *
3408 * Intended to be called by the omap_device code.
3409 */
3410int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3411{
3412 unsigned long flags;
3413
3414 spin_lock_irqsave(&oh->_lock, flags);
3415 _disable_clocks(oh);
3416 spin_unlock_irqrestore(&oh->_lock, flags);
3417
3418 return 0;
3419}
3420
3421/**
3422 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3423 * @oh: struct omap_hwmod *oh
3424 *
3425 * Intended to be called by drivers and core code when all posted
3426 * writes to a device must complete before continuing further
3427 * execution (for example, after clearing some device IRQSTATUS
3428 * register bits)
3429 *
3430 * XXX what about targets with multiple OCP threads?
3431 */
3432void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3433{
3434 BUG_ON(!oh);
3435
3436 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
3437 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3438 oh->name);
3439 return;
3440 }
3441
3442 /*
3443 * Forces posted writes to complete on the OCP thread handling
3444 * register writes
3445 */
3446 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
3447}
3448
3449/**
3450 * omap_hwmod_reset - reset the hwmod
3451 * @oh: struct omap_hwmod *
3452 *
3453 * Under some conditions, a driver may wish to reset the entire device.
3454 * Called from omap_device code. Returns -EINVAL on error or passes along
3455 * the return value from _reset().
3456 */
3457int omap_hwmod_reset(struct omap_hwmod *oh)
3458{
3459 int r;
3460 unsigned long flags;
3461
3462 if (!oh)
3463 return -EINVAL;
3464
3465 spin_lock_irqsave(&oh->_lock, flags);
3466 r = _reset(oh);
3467 spin_unlock_irqrestore(&oh->_lock, flags);
3468
3469 return r;
3470}
3471
3472/* 3387/*
3473 * IP block data retrieval functions 3388 * IP block data retrieval functions
3474 */ 3389 */
@@ -3729,52 +3644,12 @@ void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3729 return oh->_mpu_rt_va; 3644 return oh->_mpu_rt_va;
3730} 3645}
3731 3646
3732/**
3733 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3734 * @oh: struct omap_hwmod *
3735 * @init_oh: struct omap_hwmod * (initiator)
3736 *
3737 * Add a sleep dependency between the initiator @init_oh and @oh.
3738 * Intended to be called by DSP/Bridge code via platform_data for the
3739 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3740 * code needs to add/del initiator dependencies dynamically
3741 * before/after accessing a device. Returns the return value from
3742 * _add_initiator_dep().
3743 *
3744 * XXX Keep a usecount in the clockdomain code
3745 */
3746int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3747 struct omap_hwmod *init_oh)
3748{
3749 return _add_initiator_dep(oh, init_oh);
3750}
3751
3752/* 3647/*
3753 * XXX what about functions for drivers to save/restore ocp_sysconfig 3648 * XXX what about functions for drivers to save/restore ocp_sysconfig
3754 * for context save/restore operations? 3649 * for context save/restore operations?
3755 */ 3650 */
3756 3651
3757/** 3652/**
3758 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3759 * @oh: struct omap_hwmod *
3760 * @init_oh: struct omap_hwmod * (initiator)
3761 *
3762 * Remove a sleep dependency between the initiator @init_oh and @oh.
3763 * Intended to be called by DSP/Bridge code via platform_data for the
3764 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3765 * code needs to add/del initiator dependencies dynamically
3766 * before/after accessing a device. Returns the return value from
3767 * _del_initiator_dep().
3768 *
3769 * XXX Keep a usecount in the clockdomain code
3770 */
3771int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3772 struct omap_hwmod *init_oh)
3773{
3774 return _del_initiator_dep(oh, init_oh);
3775}
3776
3777/**
3778 * omap_hwmod_enable_wakeup - allow device to wake up the system 3653 * omap_hwmod_enable_wakeup - allow device to wake up the system
3779 * @oh: struct omap_hwmod * 3654 * @oh: struct omap_hwmod *
3780 * 3655 *
@@ -3895,33 +3770,6 @@ int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3895} 3770}
3896 3771
3897/** 3772/**
3898 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3899 * contained in the hwmod module
3900 * @oh: struct omap_hwmod *
3901 * @name: name of the reset line to look up and read
3902 *
3903 * Return the current state of the hwmod @oh's reset line named @name:
3904 * returns -EINVAL upon parameter error or if this operation
3905 * is unsupported on the current OMAP; otherwise, passes along the return
3906 * value from _read_hardreset().
3907 */
3908int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3909{
3910 int ret;
3911 unsigned long flags;
3912
3913 if (!oh)
3914 return -EINVAL;
3915
3916 spin_lock_irqsave(&oh->_lock, flags);
3917 ret = _read_hardreset(oh, name);
3918 spin_unlock_irqrestore(&oh->_lock, flags);
3919
3920 return ret;
3921}
3922
3923
3924/**
3925 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname 3773 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3926 * @classname: struct omap_hwmod_class name to search for 3774 * @classname: struct omap_hwmod_class name to search for
3927 * @fn: callback function pointer to call for each hwmod in class @classname 3775 * @fn: callback function pointer to call for each hwmod in class @classname
@@ -4031,86 +3879,6 @@ int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
4031} 3879}
4032 3880
4033/** 3881/**
4034 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
4035 * @oh: struct omap_hwmod *
4036 *
4037 * Prevent the hwmod @oh from being reset during the setup process.
4038 * Intended for use by board-*.c files on boards with devices that
4039 * cannot tolerate being reset. Must be called before the hwmod has
4040 * been set up. Returns 0 upon success or negative error code upon
4041 * failure.
4042 */
4043int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
4044{
4045 if (!oh)
4046 return -EINVAL;
4047
4048 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4049 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
4050 oh->name);
4051 return -EINVAL;
4052 }
4053
4054 oh->flags |= HWMOD_INIT_NO_RESET;
4055
4056 return 0;
4057}
4058
4059/**
4060 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
4061 * @oh: struct omap_hwmod * containing hwmod mux entries
4062 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
4063 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
4064 *
4065 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
4066 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
4067 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
4068 * this function is not called for a given pad_idx, then the ISR
4069 * associated with @oh's first MPU IRQ will be triggered when an I/O
4070 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
4071 * the _dynamic or wakeup_ entry: if there are other entries not
4072 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
4073 * entries are NOT COUNTED in the dynamic pad index. This function
4074 * must be called separately for each pad that requires its interrupt
4075 * to be re-routed this way. Returns -EINVAL if there is an argument
4076 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
4077 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
4078 *
4079 * XXX This function interface is fragile. Rather than using array
4080 * indexes, which are subject to unpredictable change, it should be
4081 * using hwmod IRQ names, and some other stable key for the hwmod mux
4082 * pad records.
4083 */
4084int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
4085{
4086 int nr_irqs;
4087
4088 might_sleep();
4089
4090 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
4091 pad_idx >= oh->mux->nr_pads_dynamic)
4092 return -EINVAL;
4093
4094 /* Check the number of available mpu_irqs */
4095 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
4096 ;
4097
4098 if (irq_idx >= nr_irqs)
4099 return -EINVAL;
4100
4101 if (!oh->mux->irqs) {
4102 /* XXX What frees this? */
4103 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
4104 GFP_KERNEL);
4105 if (!oh->mux->irqs)
4106 return -ENOMEM;
4107 }
4108 oh->mux->irqs[pad_idx] = irq_idx;
4109
4110 return 0;
4111}
4112
4113/**
4114 * omap_hwmod_init - initialize the hwmod code 3882 * omap_hwmod_init - initialize the hwmod code
4115 * 3883 *
4116 * Sets up some function pointers needed by the hwmod code to operate on the 3884 * Sets up some function pointers needed by the hwmod code to operate on the
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 5b42fafcaf55..fcfdd85aad62 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -703,13 +703,6 @@ int omap_hwmod_shutdown(struct omap_hwmod *oh);
703 703
704int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name); 704int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
705int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name); 705int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
706int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
707
708int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
709int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
710
711int omap_hwmod_reset(struct omap_hwmod *oh);
712void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
713 706
714void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); 707void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
715u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); 708u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
@@ -724,11 +717,6 @@ int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
724struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh); 717struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
725void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh); 718void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
726 719
727int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
728 struct omap_hwmod *init_oh);
729int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
730 struct omap_hwmod *init_oh);
731
732int omap_hwmod_enable_wakeup(struct omap_hwmod *oh); 720int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
733int omap_hwmod_disable_wakeup(struct omap_hwmod *oh); 721int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
734 722
@@ -740,10 +728,6 @@ int omap_hwmod_for_each_by_class(const char *classname,
740int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state); 728int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
741int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh); 729int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
742 730
743int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
744
745int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
746
747extern void __init omap_hwmod_init(void); 731extern void __init omap_hwmod_init(void);
748 732
749const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh); 733const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 11468eea3871..4e8e93c398db 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -29,8 +29,6 @@
29#include <linux/platform_data/mailbox-omap.h> 29#include <linux/platform_data/mailbox-omap.h>
30#include <plat/dmtimer.h> 30#include <plat/dmtimer.h>
31 31
32#include "am35xx.h"
33
34#include "soc.h" 32#include "soc.h"
35#include "omap_hwmod.h" 33#include "omap_hwmod.h"
36#include "omap_hwmod_common_data.h" 34#include "omap_hwmod_common_data.h"
@@ -50,6 +48,8 @@
50 * elsewhere. 48 * elsewhere.
51 */ 49 */
52 50
51#define AM35XX_IPSS_USBOTGSS_BASE 0x5C040000
52
53/* 53/*
54 * IP blocks 54 * IP blocks
55 */ 55 */
@@ -3459,15 +3459,6 @@ static struct omap_hwmod_ocp_if am35xx_mdio__l3 = {
3459 .user = OCP_USER_MPU, 3459 .user = OCP_USER_MPU,
3460}; 3460};
3461 3461
3462static struct omap_hwmod_addr_space am35xx_mdio_addrs[] = {
3463 {
3464 .pa_start = AM35XX_IPSS_MDIO_BASE,
3465 .pa_end = AM35XX_IPSS_MDIO_BASE + SZ_4K - 1,
3466 .flags = ADDR_TYPE_RT,
3467 },
3468 { }
3469};
3470
3471/* l4_core -> davinci mdio */ 3462/* l4_core -> davinci mdio */
3472/* 3463/*
3473 * XXX Should be connected to an IPSS hwmod, not the L4_CORE directly; 3464 * XXX Should be connected to an IPSS hwmod, not the L4_CORE directly;
@@ -3478,25 +3469,15 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__mdio = {
3478 .master = &omap3xxx_l4_core_hwmod, 3469 .master = &omap3xxx_l4_core_hwmod,
3479 .slave = &am35xx_mdio_hwmod, 3470 .slave = &am35xx_mdio_hwmod,
3480 .clk = "emac_fck", 3471 .clk = "emac_fck",
3481 .addr = am35xx_mdio_addrs,
3482 .user = OCP_USER_MPU, 3472 .user = OCP_USER_MPU,
3483}; 3473};
3484 3474
3485static struct omap_hwmod_irq_info am35xx_emac_mpu_irqs[] = {
3486 { .name = "rxthresh", .irq = 67 + OMAP_INTC_START, },
3487 { .name = "rx_pulse", .irq = 68 + OMAP_INTC_START, },
3488 { .name = "tx_pulse", .irq = 69 + OMAP_INTC_START },
3489 { .name = "misc_pulse", .irq = 70 + OMAP_INTC_START },
3490 { .irq = -1 },
3491};
3492
3493static struct omap_hwmod_class am35xx_emac_class = { 3475static struct omap_hwmod_class am35xx_emac_class = {
3494 .name = "davinci_emac", 3476 .name = "davinci_emac",
3495}; 3477};
3496 3478
3497static struct omap_hwmod am35xx_emac_hwmod = { 3479static struct omap_hwmod am35xx_emac_hwmod = {
3498 .name = "davinci_emac", 3480 .name = "davinci_emac",
3499 .mpu_irqs = am35xx_emac_mpu_irqs,
3500 .class = &am35xx_emac_class, 3481 .class = &am35xx_emac_class,
3501 /* 3482 /*
3502 * According to Mark Greer, the MPU will not return from WFI 3483 * According to Mark Greer, the MPU will not return from WFI
@@ -3519,15 +3500,6 @@ static struct omap_hwmod_ocp_if am35xx_emac__l3 = {
3519 .user = OCP_USER_MPU, 3500 .user = OCP_USER_MPU,
3520}; 3501};
3521 3502
3522static struct omap_hwmod_addr_space am35xx_emac_addrs[] = {
3523 {
3524 .pa_start = AM35XX_IPSS_EMAC_BASE,
3525 .pa_end = AM35XX_IPSS_EMAC_BASE + 0x30000 - 1,
3526 .flags = ADDR_TYPE_RT,
3527 },
3528 { }
3529};
3530
3531/* l4_core -> davinci emac */ 3503/* l4_core -> davinci emac */
3532/* 3504/*
3533 * XXX Should be connected to an IPSS hwmod, not the L4_CORE directly; 3505 * XXX Should be connected to an IPSS hwmod, not the L4_CORE directly;
@@ -3538,7 +3510,6 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__emac = {
3538 .master = &omap3xxx_l4_core_hwmod, 3510 .master = &omap3xxx_l4_core_hwmod,
3539 .slave = &am35xx_emac_hwmod, 3511 .slave = &am35xx_emac_hwmod,
3540 .clk = "emac_ick", 3512 .clk = "emac_ick",
3541 .addr = am35xx_emac_addrs,
3542 .user = OCP_USER_MPU, 3513 .user = OCP_USER_MPU,
3543}; 3514};
3544 3515
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 1a19fa096bab..8e903564ede2 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -152,38 +152,3 @@ void am35x_set_mode(u8 musb_mode)
152 152
153 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); 153 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
154} 154}
155
156void ti81xx_musb_phy_power(u8 on)
157{
158 void __iomem *scm_base = NULL;
159 u32 usbphycfg;
160
161 scm_base = ioremap(TI81XX_SCM_BASE, SZ_2K);
162 if (!scm_base) {
163 pr_err("system control module ioremap failed\n");
164 return;
165 }
166
167 usbphycfg = readl_relaxed(scm_base + USBCTRL0);
168
169 if (on) {
170 if (cpu_is_ti816x()) {
171 usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
172 usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC;
173 } else if (cpu_is_ti814x()) {
174 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
175 | USBPHY_DPINPUT | USBPHY_DMINPUT);
176 usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN
177 | USBPHY_DPOPBUFCTL | USBPHY_DMOPBUFCTL);
178 }
179 } else {
180 if (cpu_is_ti816x())
181 usbphycfg &= ~TI816X_USBPHY0_NORMAL_MODE;
182 else if (cpu_is_ti814x())
183 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
184
185 }
186 writel_relaxed(usbphycfg, scm_base + USBCTRL0);
187
188 iounmap(scm_base);
189}
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 3d7eee1d3cfa..190fa43e7479 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -19,7 +19,6 @@
19#include <linux/platform_data/pinctrl-single.h> 19#include <linux/platform_data/pinctrl-single.h>
20#include <linux/platform_data/iommu-omap.h> 20#include <linux/platform_data/iommu-omap.h>
21 21
22#include "am35xx.h"
23#include "common.h" 22#include "common.h"
24#include "common-board-devices.h" 23#include "common-board-devices.h"
25#include "dss-common.h" 24#include "dss-common.h"
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
index 33c8846b4193..a69e9a33cb6d 100644
--- a/arch/arm/mach-omap2/pmu.c
+++ b/arch/arm/mach-omap2/pmu.c
@@ -13,7 +13,7 @@
13 */ 13 */
14#include <linux/of.h> 14#include <linux/of.h>
15 15
16#include <asm/pmu.h> 16#include <asm/system_info.h>
17 17
18#include "soc.h" 18#include "soc.h"
19#include "omap_hwmod.h" 19#include "omap_hwmod.h"
@@ -37,7 +37,8 @@ static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[])
37{ 37{
38 int i; 38 int i;
39 struct omap_hwmod *oh[3]; 39 struct omap_hwmod *oh[3];
40 char *dev_name = "arm-pmu"; 40 char *dev_name = cpu_architecture() == CPU_ARCH_ARMv6 ?
41 "armv6-pmu" : "armv7-pmu";
41 42
42 if ((!oh_num) || (oh_num > 3)) 43 if ((!oh_num) || (oh_num > 3))
43 return -EINVAL; 44 return -EINVAL;
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 7fb033eca0a5..78af6d8cf2e2 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -115,7 +115,6 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
115 } 115 }
116 pwrdm->voltdm.ptr = voltdm; 116 pwrdm->voltdm.ptr = voltdm;
117 INIT_LIST_HEAD(&pwrdm->voltdm_node); 117 INIT_LIST_HEAD(&pwrdm->voltdm_node);
118 voltdm_add_pwrdm(voltdm, pwrdm);
119skip_voltdm: 118skip_voltdm:
120 spin_lock_init(&pwrdm->_lock); 119 spin_lock_init(&pwrdm->_lock);
121 120
@@ -484,87 +483,6 @@ pac_exit:
484} 483}
485 484
486/** 485/**
487 * pwrdm_del_clkdm - remove a clockdomain from a powerdomain
488 * @pwrdm: struct powerdomain * to add the clockdomain to
489 * @clkdm: struct clockdomain * to associate with a powerdomain
490 *
491 * Dissociate the clockdomain @clkdm from the powerdomain
492 * @pwrdm. Returns -EINVAL if presented with invalid pointers; -ENOENT
493 * if @clkdm was not associated with the powerdomain, or 0 upon
494 * success.
495 */
496int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
497{
498 int ret = -EINVAL;
499 int i;
500
501 if (!pwrdm || !clkdm)
502 return -EINVAL;
503
504 pr_debug("powerdomain: %s: dissociating clockdomain %s\n",
505 pwrdm->name, clkdm->name);
506
507 for (i = 0; i < PWRDM_MAX_CLKDMS; i++)
508 if (pwrdm->pwrdm_clkdms[i] == clkdm)
509 break;
510
511 if (i == PWRDM_MAX_CLKDMS) {
512 pr_debug("powerdomain: %s: clkdm %s not associated?!\n",
513 pwrdm->name, clkdm->name);
514 ret = -ENOENT;
515 goto pdc_exit;
516 }
517
518 pwrdm->pwrdm_clkdms[i] = NULL;
519
520 ret = 0;
521
522pdc_exit:
523 return ret;
524}
525
526/**
527 * pwrdm_for_each_clkdm - call function on each clkdm in a pwrdm
528 * @pwrdm: struct powerdomain * to iterate over
529 * @fn: callback function *
530 *
531 * Call the supplied function @fn for each clockdomain in the powerdomain
532 * @pwrdm. The callback function can return anything but 0 to bail
533 * out early from the iterator. Returns -EINVAL if presented with
534 * invalid pointers; or passes along the last return value of the
535 * callback function, which should be 0 for success or anything else
536 * to indicate failure.
537 */
538int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
539 int (*fn)(struct powerdomain *pwrdm,
540 struct clockdomain *clkdm))
541{
542 int ret = 0;
543 int i;
544
545 if (!fn)
546 return -EINVAL;
547
548 for (i = 0; i < PWRDM_MAX_CLKDMS && !ret; i++)
549 if (pwrdm->pwrdm_clkdms[i])
550 ret = (*fn)(pwrdm, pwrdm->pwrdm_clkdms[i]);
551
552 return ret;
553}
554
555/**
556 * pwrdm_get_voltdm - return a ptr to the voltdm that this pwrdm resides in
557 * @pwrdm: struct powerdomain *
558 *
559 * Return a pointer to the struct voltageomain that the specified powerdomain
560 * @pwrdm exists in.
561 */
562struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm)
563{
564 return pwrdm->voltdm.ptr;
565}
566
567/**
568 * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain 486 * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain
569 * @pwrdm: struct powerdomain * 487 * @pwrdm: struct powerdomain *
570 * 488 *
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index 11bd4dd7d8d6..28a796ce07d7 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -212,11 +212,6 @@ int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
212 void *user); 212 void *user);
213 213
214int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); 214int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
215int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
216int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
217 int (*fn)(struct powerdomain *pwrdm,
218 struct clockdomain *clkdm));
219struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm);
220 215
221int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); 216int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
222 217
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index cfde3f4a03cc..ed8a3d8b739a 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -145,7 +145,6 @@ extern void omap3_prm_vcvp_write(u32 val, u8 offset);
145extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); 145extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
146 146
147extern int __init omap3xxx_prm_init(void); 147extern int __init omap3xxx_prm_init(void);
148extern u32 omap3xxx_prm_get_reset_sources(void);
149int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits); 148int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);
150void omap3xxx_prm_iva_idle(void); 149void omap3xxx_prm_iva_idle(void);
151void omap3_prm_reset_modem(void); 150void omap3_prm_reset_modem(void);
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index f7512515fde5..714329565b90 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -39,7 +39,6 @@ extern void omap4_prm_vcvp_write(u32 val, u8 offset);
39extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); 39extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
40 40
41extern int __init omap44xx_prm_init(void); 41extern int __init omap44xx_prm_init(void);
42extern u32 omap44xx_prm_get_reset_sources(void);
43 42
44#endif 43#endif
45 44
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index bc897231bd10..e4562b2b973b 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -82,16 +82,8 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
82 musb_plat.mode = board_data->mode; 82 musb_plat.mode = board_data->mode;
83 musb_plat.extvbus = board_data->extvbus; 83 musb_plat.extvbus = board_data->extvbus;
84 84
85 if (soc_is_am35xx()) { 85 oh_name = "usb_otg_hs";
86 oh_name = "am35x_otg_hs"; 86 name = "musb-omap2430";
87 name = "musb-am35x";
88 } else if (cpu_is_ti81xx()) {
89 oh_name = "usb_otg_hs";
90 name = "musb-ti81xx";
91 } else {
92 oh_name = "usb_otg_hs";
93 name = "musb-omap2430";
94 }
95 87
96 oh = omap_hwmod_lookup(oh_name); 88 oh = omap_hwmod_lookup(oh_name);
97 if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", 89 if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
diff --git a/arch/arm/mach-omap2/usb.h b/arch/arm/mach-omap2/usb.h
index 4ba2ae759895..3395365ef1db 100644
--- a/arch/arm/mach-omap2/usb.h
+++ b/arch/arm/mach-omap2/usb.h
@@ -68,5 +68,3 @@ extern void am35x_musb_reset(void);
68extern void am35x_musb_phy_power(u8 on); 68extern void am35x_musb_phy_power(u8 on);
69extern void am35x_musb_clear_irq(void); 69extern void am35x_musb_clear_irq(void);
70extern void am35x_set_mode(u8 musb_mode); 70extern void am35x_set_mode(u8 musb_mode);
71extern void ti81xx_musb_phy_power(u8 on);
72
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 3783b8625f0f..cba8cada8c81 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -224,37 +224,6 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm,
224} 224}
225 225
226/** 226/**
227 * omap_change_voltscale_method() - API to change the voltage scaling method.
228 * @voltdm: pointer to the VDD whose voltage scaling method
229 * has to be changed.
230 * @voltscale_method: the method to be used for voltage scaling.
231 *
232 * This API can be used by the board files to change the method of voltage
233 * scaling between vpforceupdate and vcbypass. The parameter values are
234 * defined in voltage.h
235 */
236void omap_change_voltscale_method(struct voltagedomain *voltdm,
237 int voltscale_method)
238{
239 if (!voltdm || IS_ERR(voltdm)) {
240 pr_warn("%s: VDD specified does not exist!\n", __func__);
241 return;
242 }
243
244 switch (voltscale_method) {
245 case VOLTSCALE_VPFORCEUPDATE:
246 voltdm->scale = omap_vp_forceupdate_scale;
247 return;
248 case VOLTSCALE_VCBYPASS:
249 voltdm->scale = omap_vc_bypass_scale;
250 return;
251 default:
252 pr_warn("%s: Trying to change the method of voltage scaling to an unsupported one!\n",
253 __func__);
254 }
255}
256
257/**
258 * omap_voltage_late_init() - Init the various voltage parameters 227 * omap_voltage_late_init() - Init the various voltage parameters
259 * 228 *
260 * This API is to be called in the later stages of the 229 * This API is to be called in the later stages of the
@@ -316,90 +285,11 @@ static struct voltagedomain *_voltdm_lookup(const char *name)
316 return voltdm; 285 return voltdm;
317} 286}
318 287
319/**
320 * voltdm_add_pwrdm - add a powerdomain to a voltagedomain
321 * @voltdm: struct voltagedomain * to add the powerdomain to
322 * @pwrdm: struct powerdomain * to associate with a voltagedomain
323 *
324 * Associate the powerdomain @pwrdm with a voltagedomain @voltdm. This
325 * enables the use of voltdm_for_each_pwrdm(). Returns -EINVAL if
326 * presented with invalid pointers; -ENOMEM if memory could not be allocated;
327 * or 0 upon success.
328 */
329int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm)
330{
331 if (!voltdm || !pwrdm)
332 return -EINVAL;
333
334 pr_debug("voltagedomain: %s: associating powerdomain %s\n",
335 voltdm->name, pwrdm->name);
336
337 list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list);
338
339 return 0;
340}
341
342/**
343 * voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm
344 * @voltdm: struct voltagedomain * to iterate over
345 * @fn: callback function *
346 *
347 * Call the supplied function @fn for each powerdomain in the
348 * voltagedomain @voltdm. Returns -EINVAL if presented with invalid
349 * pointers; or passes along the last return value of the callback
350 * function, which should be 0 for success or anything else to
351 * indicate failure.
352 */
353int voltdm_for_each_pwrdm(struct voltagedomain *voltdm,
354 int (*fn)(struct voltagedomain *voltdm,
355 struct powerdomain *pwrdm))
356{
357 struct powerdomain *pwrdm;
358 int ret = 0;
359
360 if (!fn)
361 return -EINVAL;
362
363 list_for_each_entry(pwrdm, &voltdm->pwrdm_list, voltdm_node)
364 ret = (*fn)(voltdm, pwrdm);
365
366 return ret;
367}
368
369/**
370 * voltdm_for_each - call function on each registered voltagedomain
371 * @fn: callback function *
372 *
373 * Call the supplied function @fn for each registered voltagedomain.
374 * The callback function @fn can return anything but 0 to bail out
375 * early from the iterator. Returns the last return value of the
376 * callback function, which should be 0 for success or anything else
377 * to indicate failure; or -EINVAL if the function pointer is null.
378 */
379int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user),
380 void *user)
381{
382 struct voltagedomain *temp_voltdm;
383 int ret = 0;
384
385 if (!fn)
386 return -EINVAL;
387
388 list_for_each_entry(temp_voltdm, &voltdm_list, node) {
389 ret = (*fn)(temp_voltdm, user);
390 if (ret)
391 break;
392 }
393
394 return ret;
395}
396
397static int _voltdm_register(struct voltagedomain *voltdm) 288static int _voltdm_register(struct voltagedomain *voltdm)
398{ 289{
399 if (!voltdm || !voltdm->name) 290 if (!voltdm || !voltdm->name)
400 return -EINVAL; 291 return -EINVAL;
401 292
402 INIT_LIST_HEAD(&voltdm->pwrdm_list);
403 list_add(&voltdm->node, &voltdm_list); 293 list_add(&voltdm->node, &voltdm_list);
404 294
405 pr_debug("voltagedomain: registered %s\n", voltdm->name); 295 pr_debug("voltagedomain: registered %s\n", voltdm->name);
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index f7f2879b31b0..e64550321510 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -23,10 +23,6 @@
23 23
24struct powerdomain; 24struct powerdomain;
25 25
26/* XXX document */
27#define VOLTSCALE_VPFORCEUPDATE 1
28#define VOLTSCALE_VCBYPASS 2
29
30/* 26/*
31 * OMAP3 GENERIC setup times. Revisit to see if these needs to be 27 * OMAP3 GENERIC setup times. Revisit to see if these needs to be
32 * passed from board or PMIC file 28 * passed from board or PMIC file
@@ -55,7 +51,6 @@ struct omap_vfsm_instance {
55 * @name: Name of the voltage domain which can be used as a unique identifier. 51 * @name: Name of the voltage domain which can be used as a unique identifier.
56 * @scalable: Whether or not this voltage domain is scalable 52 * @scalable: Whether or not this voltage domain is scalable
57 * @node: list_head linking all voltage domains 53 * @node: list_head linking all voltage domains
58 * @pwrdm_list: list_head linking all powerdomains in this voltagedomain
59 * @vc: pointer to VC channel associated with this voltagedomain 54 * @vc: pointer to VC channel associated with this voltagedomain
60 * @vp: pointer to VP associated with this voltagedomain 55 * @vp: pointer to VP associated with this voltagedomain
61 * @read: read a VC/VP register 56 * @read: read a VC/VP register
@@ -71,7 +66,6 @@ struct voltagedomain {
71 char *name; 66 char *name;
72 bool scalable; 67 bool scalable;
73 struct list_head node; 68 struct list_head node;
74 struct list_head pwrdm_list;
75 struct omap_vc_channel *vc; 69 struct omap_vc_channel *vc;
76 const struct omap_vfsm_instance *vfsm; 70 const struct omap_vfsm_instance *vfsm;
77 struct omap_vp_instance *vp; 71 struct omap_vp_instance *vp;
@@ -163,8 +157,6 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
163 unsigned long volt); 157 unsigned long volt);
164int omap_voltage_register_pmic(struct voltagedomain *voltdm, 158int omap_voltage_register_pmic(struct voltagedomain *voltdm,
165 struct omap_voltdm_pmic *pmic); 159 struct omap_voltdm_pmic *pmic);
166void omap_change_voltscale_method(struct voltagedomain *voltdm,
167 int voltscale_method);
168int omap_voltage_late_init(void); 160int omap_voltage_late_init(void);
169 161
170extern void omap2xxx_voltagedomains_init(void); 162extern void omap2xxx_voltagedomains_init(void);
@@ -175,11 +167,6 @@ extern void omap54xx_voltagedomains_init(void);
175struct voltagedomain *voltdm_lookup(const char *name); 167struct voltagedomain *voltdm_lookup(const char *name);
176void voltdm_init(struct voltagedomain **voltdm_list); 168void voltdm_init(struct voltagedomain **voltdm_list);
177int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); 169int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm);
178int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user),
179 void *user);
180int voltdm_for_each_pwrdm(struct voltagedomain *voltdm,
181 int (*fn)(struct voltagedomain *voltdm,
182 struct powerdomain *pwrdm));
183int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); 170int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt);
184void voltdm_reset(struct voltagedomain *voltdm); 171void voltdm_reset(struct voltagedomain *voltdm);
185unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); 172unsigned long voltdm_get_voltage(struct voltagedomain *voltdm);
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-24 23:32:14 -0400