diff options
author | Tony Lindgren <tony@atomide.com> | 2014-11-21 18:22:24 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2014-11-21 18:22:24 -0500 |
commit | 88e66102b7c7e6f6a142f57e6183ef9193f3220e (patch) | |
tree | 72145413de8c13eed4977d294965d1438721d127 /arch/arm/mach-omap2 | |
parent | 9889278181bcdbae882664d8cee5bb0e064397e4 (diff) | |
parent | 1f074f996482220f90fbe3dcfafeb3db46ec748a (diff) |
Merge tag 'for-v3.19/omap-b2' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.19/soc
Several more OMAP patches targeted for v3.19. They include:
- OMAP4/5: DSS hwmod cleanup patches from Tomi Valkeinen.
- DRA7xx: hwmod data support for UARTs 7 through 10.
- AM43xx: hwmod data support for the onboard ADC.
Basic build, boot, and PM test reports are here:
http://www.pwsan.com/omap/testlogs/omap-b-for-v3.19/20141121110550/
Note that I cannot test the DRA7xx or AM43xx patches, since I do not have
these boards.
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 39 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 25 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 100 |
6 files changed, 190 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index acae6d5d1151..a2c7b300fe89 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -2719,11 +2719,33 @@ static int __init _setup(struct omap_hwmod *oh, void *data) | |||
2719 | if (oh->_state != _HWMOD_STATE_INITIALIZED) | 2719 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
2720 | return 0; | 2720 | return 0; |
2721 | 2721 | ||
2722 | if (oh->parent_hwmod) { | ||
2723 | int r; | ||
2724 | |||
2725 | r = _enable(oh->parent_hwmod); | ||
2726 | WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n", | ||
2727 | oh->name, oh->parent_hwmod->name); | ||
2728 | } | ||
2729 | |||
2722 | _setup_iclk_autoidle(oh); | 2730 | _setup_iclk_autoidle(oh); |
2723 | 2731 | ||
2724 | if (!_setup_reset(oh)) | 2732 | if (!_setup_reset(oh)) |
2725 | _setup_postsetup(oh); | 2733 | _setup_postsetup(oh); |
2726 | 2734 | ||
2735 | if (oh->parent_hwmod) { | ||
2736 | u8 postsetup_state; | ||
2737 | |||
2738 | postsetup_state = oh->parent_hwmod->_postsetup_state; | ||
2739 | |||
2740 | if (postsetup_state == _HWMOD_STATE_IDLE) | ||
2741 | _idle(oh->parent_hwmod); | ||
2742 | else if (postsetup_state == _HWMOD_STATE_DISABLED) | ||
2743 | _shutdown(oh->parent_hwmod); | ||
2744 | else if (postsetup_state != _HWMOD_STATE_ENABLED) | ||
2745 | WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", | ||
2746 | oh->parent_hwmod->name, postsetup_state); | ||
2747 | } | ||
2748 | |||
2727 | return 0; | 2749 | return 0; |
2728 | } | 2750 | } |
2729 | 2751 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 512f809a3f4d..35ca6efbec31 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h | |||
@@ -633,6 +633,7 @@ struct omap_hwmod_link { | |||
633 | * @flags: hwmod flags (documented below) | 633 | * @flags: hwmod flags (documented below) |
634 | * @_lock: spinlock serializing operations on this hwmod | 634 | * @_lock: spinlock serializing operations on this hwmod |
635 | * @node: list node for hwmod list (internal use) | 635 | * @node: list node for hwmod list (internal use) |
636 | * @parent_hwmod: (temporary) a pointer to the hierarchical parent of this hwmod | ||
636 | * | 637 | * |
637 | * @main_clk refers to this module's "main clock," which for our | 638 | * @main_clk refers to this module's "main clock," which for our |
638 | * purposes is defined as "the functional clock needed for register | 639 | * purposes is defined as "the functional clock needed for register |
@@ -643,6 +644,12 @@ struct omap_hwmod_link { | |||
643 | * the omap_hwmod code and should not be set during initialization. | 644 | * the omap_hwmod code and should not be set during initialization. |
644 | * | 645 | * |
645 | * @masters and @slaves are now deprecated. | 646 | * @masters and @slaves are now deprecated. |
647 | * | ||
648 | * @parent_hwmod is temporary; there should be no need for it, as this | ||
649 | * information should already be expressed in the OCP interface | ||
650 | * structures. @parent_hwmod is present as a workaround until we improve | ||
651 | * handling for hwmods with multiple parents (e.g., OMAP4+ DSS with | ||
652 | * multiple register targets across different interconnects). | ||
646 | */ | 653 | */ |
647 | struct omap_hwmod { | 654 | struct omap_hwmod { |
648 | const char *name; | 655 | const char *name; |
@@ -680,6 +687,7 @@ struct omap_hwmod { | |||
680 | u8 _int_flags; | 687 | u8 _int_flags; |
681 | u8 _state; | 688 | u8 _state; |
682 | u8 _postsetup_state; | 689 | u8 _postsetup_state; |
690 | struct omap_hwmod *parent_hwmod; | ||
683 | }; | 691 | }; |
684 | 692 | ||
685 | struct omap_hwmod *omap_hwmod_lookup(const char *name); | 693 | struct omap_hwmod *omap_hwmod_lookup(const char *name); |
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index fea01aa3ef42..5c6c8410160e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c | |||
@@ -417,6 +417,37 @@ static struct omap_hwmod am43xx_qspi_hwmod = { | |||
417 | }, | 417 | }, |
418 | }; | 418 | }; |
419 | 419 | ||
420 | /* | ||
421 | * 'adc/tsc' class | ||
422 | * TouchScreen Controller (Analog-To-Digital Converter) | ||
423 | */ | ||
424 | static struct omap_hwmod_class_sysconfig am43xx_adc_tsc_sysc = { | ||
425 | .rev_offs = 0x00, | ||
426 | .sysc_offs = 0x10, | ||
427 | .sysc_flags = SYSC_HAS_SIDLEMODE, | ||
428 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
429 | SIDLE_SMART_WKUP), | ||
430 | .sysc_fields = &omap_hwmod_sysc_type2, | ||
431 | }; | ||
432 | |||
433 | static struct omap_hwmod_class am43xx_adc_tsc_hwmod_class = { | ||
434 | .name = "adc_tsc", | ||
435 | .sysc = &am43xx_adc_tsc_sysc, | ||
436 | }; | ||
437 | |||
438 | static struct omap_hwmod am43xx_adc_tsc_hwmod = { | ||
439 | .name = "adc_tsc", | ||
440 | .class = &am43xx_adc_tsc_hwmod_class, | ||
441 | .clkdm_name = "l3s_tsc_clkdm", | ||
442 | .main_clk = "adc_tsc_fck", | ||
443 | .prcm = { | ||
444 | .omap4 = { | ||
445 | .clkctrl_offs = AM43XX_CM_WKUP_ADC_TSC_CLKCTRL_OFFSET, | ||
446 | .modulemode = MODULEMODE_SWCTRL, | ||
447 | }, | ||
448 | }, | ||
449 | }; | ||
450 | |||
420 | /* dss */ | 451 | /* dss */ |
421 | 452 | ||
422 | static struct omap_hwmod am43xx_dss_core_hwmod = { | 453 | static struct omap_hwmod am43xx_dss_core_hwmod = { |
@@ -547,6 +578,13 @@ static struct omap_hwmod_ocp_if am43xx_l4_wkup__gpio0 = { | |||
547 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 578 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
548 | }; | 579 | }; |
549 | 580 | ||
581 | static struct omap_hwmod_ocp_if am43xx_l4_wkup__adc_tsc = { | ||
582 | .master = &am33xx_l4_wkup_hwmod, | ||
583 | .slave = &am43xx_adc_tsc_hwmod, | ||
584 | .clk = "dpll_core_m4_div2_ck", | ||
585 | .user = OCP_USER_MPU, | ||
586 | }; | ||
587 | |||
550 | static struct omap_hwmod_ocp_if am43xx_l4_hs__cpgmac0 = { | 588 | static struct omap_hwmod_ocp_if am43xx_l4_hs__cpgmac0 = { |
551 | .master = &am43xx_l4_hs_hwmod, | 589 | .master = &am43xx_l4_hs_hwmod, |
552 | .slave = &am33xx_cpgmac0_hwmod, | 590 | .slave = &am33xx_cpgmac0_hwmod, |
@@ -789,6 +827,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { | |||
789 | &am43xx_l4_wkup__i2c1, | 827 | &am43xx_l4_wkup__i2c1, |
790 | &am43xx_l4_wkup__gpio0, | 828 | &am43xx_l4_wkup__gpio0, |
791 | &am43xx_l4_wkup__wd_timer1, | 829 | &am43xx_l4_wkup__wd_timer1, |
830 | &am43xx_l4_wkup__adc_tsc, | ||
792 | &am43xx_l3_s__qspi, | 831 | &am43xx_l3_s__qspi, |
793 | &am33xx_l4_per__dcan0, | 832 | &am33xx_l4_per__dcan0, |
794 | &am33xx_l4_per__dcan1, | 833 | &am33xx_l4_per__dcan1, |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 44e5634bba34..d6f41e1b6d1b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -589,6 +589,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = { | |||
589 | .omap4 = { | 589 | .omap4 = { |
590 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | 590 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, |
591 | .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | 591 | .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, |
592 | .modulemode = MODULEMODE_SWCTRL, | ||
592 | }, | 593 | }, |
593 | }, | 594 | }, |
594 | .opt_clks = dss_opt_clks, | 595 | .opt_clks = dss_opt_clks, |
@@ -647,7 +648,8 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | |||
647 | .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | 648 | .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, |
648 | }, | 649 | }, |
649 | }, | 650 | }, |
650 | .dev_attr = &omap44xx_dss_dispc_dev_attr | 651 | .dev_attr = &omap44xx_dss_dispc_dev_attr, |
652 | .parent_hwmod = &omap44xx_dss_hwmod, | ||
651 | }; | 653 | }; |
652 | 654 | ||
653 | /* | 655 | /* |
@@ -701,6 +703,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | |||
701 | }, | 703 | }, |
702 | .opt_clks = dss_dsi1_opt_clks, | 704 | .opt_clks = dss_dsi1_opt_clks, |
703 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), | 705 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), |
706 | .parent_hwmod = &omap44xx_dss_hwmod, | ||
704 | }; | 707 | }; |
705 | 708 | ||
706 | /* dss_dsi2 */ | 709 | /* dss_dsi2 */ |
@@ -733,6 +736,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | |||
733 | }, | 736 | }, |
734 | .opt_clks = dss_dsi2_opt_clks, | 737 | .opt_clks = dss_dsi2_opt_clks, |
735 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), | 738 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), |
739 | .parent_hwmod = &omap44xx_dss_hwmod, | ||
736 | }; | 740 | }; |
737 | 741 | ||
738 | /* | 742 | /* |
@@ -790,6 +794,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | |||
790 | }, | 794 | }, |
791 | .opt_clks = dss_hdmi_opt_clks, | 795 | .opt_clks = dss_hdmi_opt_clks, |
792 | .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), | 796 | .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), |
797 | .parent_hwmod = &omap44xx_dss_hwmod, | ||
793 | }; | 798 | }; |
794 | 799 | ||
795 | /* | 800 | /* |
@@ -819,7 +824,7 @@ static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { | |||
819 | }; | 824 | }; |
820 | 825 | ||
821 | static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { | 826 | static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { |
822 | { .role = "ick", .clk = "dss_fck" }, | 827 | { .role = "ick", .clk = "l3_div_ck" }, |
823 | }; | 828 | }; |
824 | 829 | ||
825 | static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | 830 | static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { |
@@ -836,6 +841,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | |||
836 | }, | 841 | }, |
837 | .opt_clks = dss_rfbi_opt_clks, | 842 | .opt_clks = dss_rfbi_opt_clks, |
838 | .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), | 843 | .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), |
844 | .parent_hwmod = &omap44xx_dss_hwmod, | ||
839 | }; | 845 | }; |
840 | 846 | ||
841 | /* | 847 | /* |
@@ -859,6 +865,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { | |||
859 | .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | 865 | .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, |
860 | }, | 866 | }, |
861 | }, | 867 | }, |
868 | .parent_hwmod = &omap44xx_dss_hwmod, | ||
862 | }; | 869 | }; |
863 | 870 | ||
864 | /* | 871 | /* |
@@ -3671,7 +3678,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { | |||
3671 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { | 3678 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { |
3672 | .master = &omap44xx_l3_main_2_hwmod, | 3679 | .master = &omap44xx_l3_main_2_hwmod, |
3673 | .slave = &omap44xx_dss_hwmod, | 3680 | .slave = &omap44xx_dss_hwmod, |
3674 | .clk = "dss_fck", | 3681 | .clk = "l3_div_ck", |
3675 | .addr = omap44xx_dss_dma_addrs, | 3682 | .addr = omap44xx_dss_dma_addrs, |
3676 | .user = OCP_USER_SDMA, | 3683 | .user = OCP_USER_SDMA, |
3677 | }; | 3684 | }; |
@@ -3707,7 +3714,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { | |||
3707 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { | 3714 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { |
3708 | .master = &omap44xx_l3_main_2_hwmod, | 3715 | .master = &omap44xx_l3_main_2_hwmod, |
3709 | .slave = &omap44xx_dss_dispc_hwmod, | 3716 | .slave = &omap44xx_dss_dispc_hwmod, |
3710 | .clk = "dss_fck", | 3717 | .clk = "l3_div_ck", |
3711 | .addr = omap44xx_dss_dispc_dma_addrs, | 3718 | .addr = omap44xx_dss_dispc_dma_addrs, |
3712 | .user = OCP_USER_SDMA, | 3719 | .user = OCP_USER_SDMA, |
3713 | }; | 3720 | }; |
@@ -3743,7 +3750,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { | |||
3743 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { | 3750 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { |
3744 | .master = &omap44xx_l3_main_2_hwmod, | 3751 | .master = &omap44xx_l3_main_2_hwmod, |
3745 | .slave = &omap44xx_dss_dsi1_hwmod, | 3752 | .slave = &omap44xx_dss_dsi1_hwmod, |
3746 | .clk = "dss_fck", | 3753 | .clk = "l3_div_ck", |
3747 | .addr = omap44xx_dss_dsi1_dma_addrs, | 3754 | .addr = omap44xx_dss_dsi1_dma_addrs, |
3748 | .user = OCP_USER_SDMA, | 3755 | .user = OCP_USER_SDMA, |
3749 | }; | 3756 | }; |
@@ -3779,7 +3786,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { | |||
3779 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { | 3786 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { |
3780 | .master = &omap44xx_l3_main_2_hwmod, | 3787 | .master = &omap44xx_l3_main_2_hwmod, |
3781 | .slave = &omap44xx_dss_dsi2_hwmod, | 3788 | .slave = &omap44xx_dss_dsi2_hwmod, |
3782 | .clk = "dss_fck", | 3789 | .clk = "l3_div_ck", |
3783 | .addr = omap44xx_dss_dsi2_dma_addrs, | 3790 | .addr = omap44xx_dss_dsi2_dma_addrs, |
3784 | .user = OCP_USER_SDMA, | 3791 | .user = OCP_USER_SDMA, |
3785 | }; | 3792 | }; |
@@ -3815,7 +3822,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { | |||
3815 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { | 3822 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { |
3816 | .master = &omap44xx_l3_main_2_hwmod, | 3823 | .master = &omap44xx_l3_main_2_hwmod, |
3817 | .slave = &omap44xx_dss_hdmi_hwmod, | 3824 | .slave = &omap44xx_dss_hdmi_hwmod, |
3818 | .clk = "dss_fck", | 3825 | .clk = "l3_div_ck", |
3819 | .addr = omap44xx_dss_hdmi_dma_addrs, | 3826 | .addr = omap44xx_dss_hdmi_dma_addrs, |
3820 | .user = OCP_USER_SDMA, | 3827 | .user = OCP_USER_SDMA, |
3821 | }; | 3828 | }; |
@@ -3851,7 +3858,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { | |||
3851 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { | 3858 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { |
3852 | .master = &omap44xx_l3_main_2_hwmod, | 3859 | .master = &omap44xx_l3_main_2_hwmod, |
3853 | .slave = &omap44xx_dss_rfbi_hwmod, | 3860 | .slave = &omap44xx_dss_rfbi_hwmod, |
3854 | .clk = "dss_fck", | 3861 | .clk = "l3_div_ck", |
3855 | .addr = omap44xx_dss_rfbi_dma_addrs, | 3862 | .addr = omap44xx_dss_rfbi_dma_addrs, |
3856 | .user = OCP_USER_SDMA, | 3863 | .user = OCP_USER_SDMA, |
3857 | }; | 3864 | }; |
@@ -3887,7 +3894,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { | |||
3887 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { | 3894 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { |
3888 | .master = &omap44xx_l3_main_2_hwmod, | 3895 | .master = &omap44xx_l3_main_2_hwmod, |
3889 | .slave = &omap44xx_dss_venc_hwmod, | 3896 | .slave = &omap44xx_dss_venc_hwmod, |
3890 | .clk = "dss_fck", | 3897 | .clk = "l3_div_ck", |
3891 | .addr = omap44xx_dss_venc_dma_addrs, | 3898 | .addr = omap44xx_dss_venc_dma_addrs, |
3892 | .user = OCP_USER_SDMA, | 3899 | .user = OCP_USER_SDMA, |
3893 | }; | 3900 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 1103aa0e0d29..229c7fb7e1c3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c | |||
@@ -421,6 +421,7 @@ static struct omap_hwmod omap54xx_dss_dispc_hwmod = { | |||
421 | .opt_clks = dss_dispc_opt_clks, | 421 | .opt_clks = dss_dispc_opt_clks, |
422 | .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), | 422 | .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), |
423 | .dev_attr = &dss_dispc_dev_attr, | 423 | .dev_attr = &dss_dispc_dev_attr, |
424 | .parent_hwmod = &omap54xx_dss_hwmod, | ||
424 | }; | 425 | }; |
425 | 426 | ||
426 | /* | 427 | /* |
@@ -462,6 +463,7 @@ static struct omap_hwmod omap54xx_dss_dsi1_a_hwmod = { | |||
462 | }, | 463 | }, |
463 | .opt_clks = dss_dsi1_a_opt_clks, | 464 | .opt_clks = dss_dsi1_a_opt_clks, |
464 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_a_opt_clks), | 465 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_a_opt_clks), |
466 | .parent_hwmod = &omap54xx_dss_hwmod, | ||
465 | }; | 467 | }; |
466 | 468 | ||
467 | /* dss_dsi1_c */ | 469 | /* dss_dsi1_c */ |
@@ -482,6 +484,7 @@ static struct omap_hwmod omap54xx_dss_dsi1_c_hwmod = { | |||
482 | }, | 484 | }, |
483 | .opt_clks = dss_dsi1_c_opt_clks, | 485 | .opt_clks = dss_dsi1_c_opt_clks, |
484 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_c_opt_clks), | 486 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_c_opt_clks), |
487 | .parent_hwmod = &omap54xx_dss_hwmod, | ||
485 | }; | 488 | }; |
486 | 489 | ||
487 | /* | 490 | /* |
@@ -521,6 +524,7 @@ static struct omap_hwmod omap54xx_dss_hdmi_hwmod = { | |||
521 | }, | 524 | }, |
522 | .opt_clks = dss_hdmi_opt_clks, | 525 | .opt_clks = dss_hdmi_opt_clks, |
523 | .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), | 526 | .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), |
527 | .parent_hwmod = &omap54xx_dss_hwmod, | ||
524 | }; | 528 | }; |
525 | 529 | ||
526 | /* | 530 | /* |
@@ -560,6 +564,7 @@ static struct omap_hwmod omap54xx_dss_rfbi_hwmod = { | |||
560 | }, | 564 | }, |
561 | .opt_clks = dss_rfbi_opt_clks, | 565 | .opt_clks = dss_rfbi_opt_clks, |
562 | .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), | 566 | .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), |
567 | .parent_hwmod = &omap54xx_dss_hwmod, | ||
563 | }; | 568 | }; |
564 | 569 | ||
565 | /* | 570 | /* |
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 5684f112654b..e2a70439bf35 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c | |||
@@ -2075,6 +2075,70 @@ static struct omap_hwmod dra7xx_uart6_hwmod = { | |||
2075 | }, | 2075 | }, |
2076 | }; | 2076 | }; |
2077 | 2077 | ||
2078 | /* uart7 */ | ||
2079 | static struct omap_hwmod dra7xx_uart7_hwmod = { | ||
2080 | .name = "uart7", | ||
2081 | .class = &dra7xx_uart_hwmod_class, | ||
2082 | .clkdm_name = "l4per2_clkdm", | ||
2083 | .main_clk = "uart7_gfclk_mux", | ||
2084 | .flags = HWMOD_SWSUP_SIDLE_ACT, | ||
2085 | .prcm = { | ||
2086 | .omap4 = { | ||
2087 | .clkctrl_offs = DRA7XX_CM_L4PER2_UART7_CLKCTRL_OFFSET, | ||
2088 | .context_offs = DRA7XX_RM_L4PER2_UART7_CONTEXT_OFFSET, | ||
2089 | .modulemode = MODULEMODE_SWCTRL, | ||
2090 | }, | ||
2091 | }, | ||
2092 | }; | ||
2093 | |||
2094 | /* uart8 */ | ||
2095 | static struct omap_hwmod dra7xx_uart8_hwmod = { | ||
2096 | .name = "uart8", | ||
2097 | .class = &dra7xx_uart_hwmod_class, | ||
2098 | .clkdm_name = "l4per2_clkdm", | ||
2099 | .main_clk = "uart8_gfclk_mux", | ||
2100 | .flags = HWMOD_SWSUP_SIDLE_ACT, | ||
2101 | .prcm = { | ||
2102 | .omap4 = { | ||
2103 | .clkctrl_offs = DRA7XX_CM_L4PER2_UART8_CLKCTRL_OFFSET, | ||
2104 | .context_offs = DRA7XX_RM_L4PER2_UART8_CONTEXT_OFFSET, | ||
2105 | .modulemode = MODULEMODE_SWCTRL, | ||
2106 | }, | ||
2107 | }, | ||
2108 | }; | ||
2109 | |||
2110 | /* uart9 */ | ||
2111 | static struct omap_hwmod dra7xx_uart9_hwmod = { | ||
2112 | .name = "uart9", | ||
2113 | .class = &dra7xx_uart_hwmod_class, | ||
2114 | .clkdm_name = "l4per2_clkdm", | ||
2115 | .main_clk = "uart9_gfclk_mux", | ||
2116 | .flags = HWMOD_SWSUP_SIDLE_ACT, | ||
2117 | .prcm = { | ||
2118 | .omap4 = { | ||
2119 | .clkctrl_offs = DRA7XX_CM_L4PER2_UART9_CLKCTRL_OFFSET, | ||
2120 | .context_offs = DRA7XX_RM_L4PER2_UART9_CONTEXT_OFFSET, | ||
2121 | .modulemode = MODULEMODE_SWCTRL, | ||
2122 | }, | ||
2123 | }, | ||
2124 | }; | ||
2125 | |||
2126 | /* uart10 */ | ||
2127 | static struct omap_hwmod dra7xx_uart10_hwmod = { | ||
2128 | .name = "uart10", | ||
2129 | .class = &dra7xx_uart_hwmod_class, | ||
2130 | .clkdm_name = "wkupaon_clkdm", | ||
2131 | .main_clk = "uart10_gfclk_mux", | ||
2132 | .flags = HWMOD_SWSUP_SIDLE_ACT, | ||
2133 | .prcm = { | ||
2134 | .omap4 = { | ||
2135 | .clkctrl_offs = DRA7XX_CM_WKUPAON_UART10_CLKCTRL_OFFSET, | ||
2136 | .context_offs = DRA7XX_RM_WKUPAON_UART10_CONTEXT_OFFSET, | ||
2137 | .modulemode = MODULEMODE_SWCTRL, | ||
2138 | }, | ||
2139 | }, | ||
2140 | }; | ||
2141 | |||
2078 | /* | 2142 | /* |
2079 | * 'usb_otg_ss' class | 2143 | * 'usb_otg_ss' class |
2080 | * | 2144 | * |
@@ -3095,6 +3159,38 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__uart6 = { | |||
3095 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 3159 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
3096 | }; | 3160 | }; |
3097 | 3161 | ||
3162 | /* l4_per2 -> uart7 */ | ||
3163 | static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart7 = { | ||
3164 | .master = &dra7xx_l4_per2_hwmod, | ||
3165 | .slave = &dra7xx_uart7_hwmod, | ||
3166 | .clk = "l3_iclk_div", | ||
3167 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
3168 | }; | ||
3169 | |||
3170 | /* l4_per2 -> uart8 */ | ||
3171 | static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart8 = { | ||
3172 | .master = &dra7xx_l4_per2_hwmod, | ||
3173 | .slave = &dra7xx_uart8_hwmod, | ||
3174 | .clk = "l3_iclk_div", | ||
3175 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
3176 | }; | ||
3177 | |||
3178 | /* l4_per2 -> uart9 */ | ||
3179 | static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart9 = { | ||
3180 | .master = &dra7xx_l4_per2_hwmod, | ||
3181 | .slave = &dra7xx_uart9_hwmod, | ||
3182 | .clk = "l3_iclk_div", | ||
3183 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
3184 | }; | ||
3185 | |||
3186 | /* l4_wkup -> uart10 */ | ||
3187 | static struct omap_hwmod_ocp_if dra7xx_l4_wkup__uart10 = { | ||
3188 | .master = &dra7xx_l4_wkup_hwmod, | ||
3189 | .slave = &dra7xx_uart10_hwmod, | ||
3190 | .clk = "wkupaon_iclk_mux", | ||
3191 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
3192 | }; | ||
3193 | |||
3098 | /* l4_per3 -> usb_otg_ss1 */ | 3194 | /* l4_per3 -> usb_otg_ss1 */ |
3099 | static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = { | 3195 | static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = { |
3100 | .master = &dra7xx_l4_per3_hwmod, | 3196 | .master = &dra7xx_l4_per3_hwmod, |
@@ -3259,6 +3355,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { | |||
3259 | &dra7xx_l4_per1__uart4, | 3355 | &dra7xx_l4_per1__uart4, |
3260 | &dra7xx_l4_per1__uart5, | 3356 | &dra7xx_l4_per1__uart5, |
3261 | &dra7xx_l4_per1__uart6, | 3357 | &dra7xx_l4_per1__uart6, |
3358 | &dra7xx_l4_per2__uart7, | ||
3359 | &dra7xx_l4_per2__uart8, | ||
3360 | &dra7xx_l4_per2__uart9, | ||
3361 | &dra7xx_l4_wkup__uart10, | ||
3262 | &dra7xx_l4_per3__usb_otg_ss1, | 3362 | &dra7xx_l4_per3__usb_otg_ss1, |
3263 | &dra7xx_l4_per3__usb_otg_ss2, | 3363 | &dra7xx_l4_per3__usb_otg_ss2, |
3264 | &dra7xx_l4_per3__usb_otg_ss3, | 3364 | &dra7xx_l4_per3__usb_otg_ss3, |