Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Arnd Bergmann:
 "A large number of cleanups, all over the platforms.  This is dominated
  largely by the Samsung platforms (s3c, s5p, exynos) and a few of the
  others moving code out of arch/arm into more appropriate subsystems.

  The clocksource and irqchip drivers are now abstracted to the point
  where platforms that are already cleaned up do not need to even
  specify the driver they use, it can all get configured from the device
  tree as we do for normal device drivers.  The clocksource changes
  basically touch every single platform in the process.

  We further clean up the use of platform specific header files here,
  with the goal of turning more of the platforms over to being
  "multiplatform" enabled, which implies that they cannot expose their
  headers to architecture independent code any more.

  It is expected that no functional changes are part of the cleanup.
  The overall reduction in total code lines is mostly the result of
  removing broken and obsolete code."

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits)
  ARM: mvebu: correct gated clock documentation
  ARM: kirkwood: add missing include for nsa310
  ARM: exynos: move exynos4210-combiner to drivers/irqchip
  mfd: db8500-prcmu: update resource passing
  drivers/db8500-cpufreq: delete dangling include
  ARM: at91: remove NEOCORE 926 board
  sunxi: Cleanup the reset code and add meaningful registers defines
  ARM: S3C24XX: header mach/regs-mem.h local
  ARM: S3C24XX: header mach/regs-power.h local
  ARM: S3C24XX: header mach/regs-s3c2412-mem.h local
  ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/
  ARM: S3C24XX: transform s3c2443 subirqs into new structure
  ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs
  ARM: S3C24XX: move s3c2443 irq code to irq.c
  ARM: S3C24XX: transform s3c2416 irqs into new structure
  ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs
  ARM: S3C24XX: move s3c2416 irq init to common irq code
  ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property
  ARM: S3C24XX: Move irq syscore-ops to irq-pm
  clocksource: always define CLOCKSOURCE_OF_DECLARE
  ...

1 files changed, 8 insertions, 27 deletions

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 265de51b43d9..71729888ff03 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 static struct clock_event_device clockevent_gpt = {
         .name           = "gp_timer",
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
         .rating         = 300,
         .set_next_event = omap2_gp_timer_set_next_event,
         .set_mode       = omap2_gp_timer_set_mode,
@@ -336,17 +335,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
 
         __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
 
-        clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
-                                     clockevent_gpt.shift);
-        clockevent_gpt.max_delta_ns =
-                clockevent_delta2ns(0xffffffff, &clockevent_gpt);
-        clockevent_gpt.min_delta_ns =
-                clockevent_delta2ns(3, &clockevent_gpt);
-                /* Timer internal resynch latency. */
-
         clockevent_gpt.cpumask = cpu_possible_mask;
         clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
-        clockevents_register_device(&clockevent_gpt);
+        clockevents_config_and_register(&clockevent_gpt, clkev.rate,
+                                        3, /* Timer internal resynch latency */
+                                        0xffffffff);
 
         pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
                 gptimer_id, clkev.rate);
@@ -552,7 +545,7 @@ static inline void __init realtime_counter_init(void)
 
 #define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,   \
                                clksrc_nr, clksrc_src)                   \
-static void __init omap##name##_gptimer_timer_init(void)                \
+void __init omap##name##_gptimer_timer_init(void)                       \
 {                                                                       \
         omap_dmtimer_init();                                            \
         omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
@@ -561,7 +554,7 @@ static void __init omap##name##_gptimer_timer_init(void)		\
 
 #define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,  \
                                 clksrc_nr, clksrc_src)                  \
-static void __init omap##name##_sync32k_timer_init(void)                \
+void __init omap##name##_sync32k_timer_init(void)               \
 {                                                                       \
         omap_dmtimer_init();                                            \
         omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
@@ -572,33 +565,23 @@ static void __init omap##name##_sync32k_timer_init(void)		\
                 omap2_sync32k_clocksource_init();                       \
 }
 
-#define OMAP_SYS_TIMER(name, clksrc)                                    \
-struct sys_timer omap##name##_timer = {                                 \
-        .init   = omap##name##_##clksrc##_timer_init,                   \
-};
-
 #ifdef CONFIG_ARCH_OMAP2
 OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon",
                         2, OMAP2_MPU_SOURCE);
-OMAP_SYS_TIMER(2, sync32k);
 #endif /* CONFIG_ARCH_OMAP2 */
 
 #ifdef CONFIG_ARCH_OMAP3
 OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon",
                         2, OMAP3_MPU_SOURCE);
-OMAP_SYS_TIMER(3, sync32k);
 OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure",
                         2, OMAP3_MPU_SOURCE);
-OMAP_SYS_TIMER(3_secure, sync32k);
 OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon",
                        2, OMAP3_MPU_SOURCE);
-OMAP_SYS_TIMER(3_gp, gptimer);
 #endif /* CONFIG_ARCH_OMAP3 */
 
 #ifdef CONFIG_SOC_AM33XX
 OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon",
                        2, OMAP4_MPU_SOURCE);
-OMAP_SYS_TIMER(3_am33xx, gptimer);
 #endif /* CONFIG_SOC_AM33XX */
 
 #ifdef CONFIG_ARCH_OMAP4
@@ -606,7 +589,7 @@ OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
                         2, OMAP4_MPU_SOURCE);
 #ifdef CONFIG_LOCAL_TIMERS
 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
-static void __init omap4_local_timer_init(void)
+void __init omap4_local_timer_init(void)
 {
         omap4_sync32k_timer_init();
         /* Local timers are not supprted on OMAP4430 ES1.0 */
@@ -624,18 +607,17 @@ static void __init omap4_local_timer_init(void)
         }
 }
 #else /* CONFIG_LOCAL_TIMERS */
-static void __init omap4_local_timer_init(void)
+void __init omap4_local_timer_init(void)
 {
         omap4_sync32k_timer_init();
 }
 #endif /* CONFIG_LOCAL_TIMERS */
-OMAP_SYS_TIMER(4, local);
 #endif /* CONFIG_ARCH_OMAP4 */
 
 #ifdef CONFIG_SOC_OMAP5
 OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
                         2, OMAP4_MPU_SOURCE);
-static void __init omap5_realtime_timer_init(void)
+void __init omap5_realtime_timer_init(void)
 {
         int err;
 
@@ -646,7 +628,6 @@ static void __init omap5_realtime_timer_init(void)
         if (err)
                 pr_err("%s: arch_timer_register failed %d\n", __func__, err);
 }
-OMAP_SYS_TIMER(5, realtime);
 #endif /* CONFIG_SOC_OMAP5 */
 
 /**