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authorTony Lindgren <tony@atomide.com>2019-03-21 14:00:21 -0400
committerTony Lindgren <tony@atomide.com>2019-04-08 13:10:59 -0400
commitede0ac642213bf7743bd9287d88bc56bafe3639f (patch)
tree3373672abd8b6a54ac8bc9646f99b4250c614b50 /arch/arm/mach-omap2/omap_hwmod_7xx_data.c
parent2af5473e2bf027075184b549a4fe7e077aa32a5f (diff)
ARM: OMAP2+: Drop mmc platform data for dra7
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_7xx_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c149
1 files changed, 0 insertions, 149 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 7a800f428238..62d665089066 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -18,7 +18,6 @@
18 */ 18 */
19 19
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/platform_data/hsmmc-omap.h>
22#include <linux/power/smartreflex.h> 21#include <linux/power/smartreflex.h>
23#include <linux/platform_data/i2c-omap.h> 22#include <linux/platform_data/i2c-omap.h>
24 23
@@ -1628,118 +1627,6 @@ static struct omap_hwmod dra7xx_mcasp8_hwmod = {
1628}; 1627};
1629 1628
1630/* 1629/*
1631 * 'mmc' class
1632 *
1633 */
1634
1635static struct omap_hwmod_class_sysconfig dra7xx_mmc_sysc = {
1636 .rev_offs = 0x0000,
1637 .sysc_offs = 0x0010,
1638 .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
1639 SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |
1640 SYSC_HAS_SOFTRESET),
1641 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1642 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
1643 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
1644 .sysc_fields = &omap_hwmod_sysc_type2,
1645};
1646
1647static struct omap_hwmod_class dra7xx_mmc_hwmod_class = {
1648 .name = "mmc",
1649 .sysc = &dra7xx_mmc_sysc,
1650};
1651
1652/* mmc1 */
1653static struct omap_hwmod_opt_clk mmc1_opt_clks[] = {
1654 { .role = "clk32k", .clk = "mmc1_clk32k" },
1655};
1656
1657/* mmc1 dev_attr */
1658static struct omap_hsmmc_dev_attr mmc1_dev_attr = {
1659 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1660};
1661
1662static struct omap_hwmod dra7xx_mmc1_hwmod = {
1663 .name = "mmc1",
1664 .class = &dra7xx_mmc_hwmod_class,
1665 .clkdm_name = "l3init_clkdm",
1666 .main_clk = "mmc1_fclk_div",
1667 .prcm = {
1668 .omap4 = {
1669 .clkctrl_offs = DRA7XX_CM_L3INIT_MMC1_CLKCTRL_OFFSET,
1670 .context_offs = DRA7XX_RM_L3INIT_MMC1_CONTEXT_OFFSET,
1671 .modulemode = MODULEMODE_SWCTRL,
1672 },
1673 },
1674 .opt_clks = mmc1_opt_clks,
1675 .opt_clks_cnt = ARRAY_SIZE(mmc1_opt_clks),
1676 .dev_attr = &mmc1_dev_attr,
1677};
1678
1679/* mmc2 */
1680static struct omap_hwmod_opt_clk mmc2_opt_clks[] = {
1681 { .role = "clk32k", .clk = "mmc2_clk32k" },
1682};
1683
1684static struct omap_hwmod dra7xx_mmc2_hwmod = {
1685 .name = "mmc2",
1686 .class = &dra7xx_mmc_hwmod_class,
1687 .clkdm_name = "l3init_clkdm",
1688 .main_clk = "mmc2_fclk_div",
1689 .prcm = {
1690 .omap4 = {
1691 .clkctrl_offs = DRA7XX_CM_L3INIT_MMC2_CLKCTRL_OFFSET,
1692 .context_offs = DRA7XX_RM_L3INIT_MMC2_CONTEXT_OFFSET,
1693 .modulemode = MODULEMODE_SWCTRL,
1694 },
1695 },
1696 .opt_clks = mmc2_opt_clks,
1697 .opt_clks_cnt = ARRAY_SIZE(mmc2_opt_clks),
1698};
1699
1700/* mmc3 */
1701static struct omap_hwmod_opt_clk mmc3_opt_clks[] = {
1702 { .role = "clk32k", .clk = "mmc3_clk32k" },
1703};
1704
1705static struct omap_hwmod dra7xx_mmc3_hwmod = {
1706 .name = "mmc3",
1707 .class = &dra7xx_mmc_hwmod_class,
1708 .clkdm_name = "l4per_clkdm",
1709 .main_clk = "mmc3_gfclk_div",
1710 .prcm = {
1711 .omap4 = {
1712 .clkctrl_offs = DRA7XX_CM_L4PER_MMC3_CLKCTRL_OFFSET,
1713 .context_offs = DRA7XX_RM_L4PER_MMC3_CONTEXT_OFFSET,
1714 .modulemode = MODULEMODE_SWCTRL,
1715 },
1716 },
1717 .opt_clks = mmc3_opt_clks,
1718 .opt_clks_cnt = ARRAY_SIZE(mmc3_opt_clks),
1719};
1720
1721/* mmc4 */
1722static struct omap_hwmod_opt_clk mmc4_opt_clks[] = {
1723 { .role = "clk32k", .clk = "mmc4_clk32k" },
1724};
1725
1726static struct omap_hwmod dra7xx_mmc4_hwmod = {
1727 .name = "mmc4",
1728 .class = &dra7xx_mmc_hwmod_class,
1729 .clkdm_name = "l4per_clkdm",
1730 .main_clk = "mmc4_gfclk_div",
1731 .prcm = {
1732 .omap4 = {
1733 .clkctrl_offs = DRA7XX_CM_L4PER_MMC4_CLKCTRL_OFFSET,
1734 .context_offs = DRA7XX_RM_L4PER_MMC4_CONTEXT_OFFSET,
1735 .modulemode = MODULEMODE_SWCTRL,
1736 },
1737 },
1738 .opt_clks = mmc4_opt_clks,
1739 .opt_clks_cnt = ARRAY_SIZE(mmc4_opt_clks),
1740};
1741
1742/*
1743 * 'mpu' class 1630 * 'mpu' class
1744 * 1631 *
1745 */ 1632 */
@@ -3364,38 +3251,6 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__mcspi4 = {
3364 .user = OCP_USER_MPU | OCP_USER_SDMA, 3251 .user = OCP_USER_MPU | OCP_USER_SDMA,
3365}; 3252};
3366 3253
3367/* l4_per1 -> mmc1 */
3368static struct omap_hwmod_ocp_if dra7xx_l4_per1__mmc1 = {
3369 .master = &dra7xx_l4_per1_hwmod,
3370 .slave = &dra7xx_mmc1_hwmod,
3371 .clk = "l3_iclk_div",
3372 .user = OCP_USER_MPU | OCP_USER_SDMA,
3373};
3374
3375/* l4_per1 -> mmc2 */
3376static struct omap_hwmod_ocp_if dra7xx_l4_per1__mmc2 = {
3377 .master = &dra7xx_l4_per1_hwmod,
3378 .slave = &dra7xx_mmc2_hwmod,
3379 .clk = "l3_iclk_div",
3380 .user = OCP_USER_MPU | OCP_USER_SDMA,
3381};
3382
3383/* l4_per1 -> mmc3 */
3384static struct omap_hwmod_ocp_if dra7xx_l4_per1__mmc3 = {
3385 .master = &dra7xx_l4_per1_hwmod,
3386 .slave = &dra7xx_mmc3_hwmod,
3387 .clk = "l3_iclk_div",
3388 .user = OCP_USER_MPU | OCP_USER_SDMA,
3389};
3390
3391/* l4_per1 -> mmc4 */
3392static struct omap_hwmod_ocp_if dra7xx_l4_per1__mmc4 = {
3393 .master = &dra7xx_l4_per1_hwmod,
3394 .slave = &dra7xx_mmc4_hwmod,
3395 .clk = "l3_iclk_div",
3396 .user = OCP_USER_MPU | OCP_USER_SDMA,
3397};
3398
3399/* l4_cfg -> mpu */ 3254/* l4_cfg -> mpu */
3400static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mpu = { 3255static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mpu = {
3401 .master = &dra7xx_l4_cfg_hwmod, 3256 .master = &dra7xx_l4_cfg_hwmod,
@@ -3893,10 +3748,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
3893 &dra7xx_l4_per1__mcspi2, 3748 &dra7xx_l4_per1__mcspi2,
3894 &dra7xx_l4_per1__mcspi3, 3749 &dra7xx_l4_per1__mcspi3,
3895 &dra7xx_l4_per1__mcspi4, 3750 &dra7xx_l4_per1__mcspi4,
3896 &dra7xx_l4_per1__mmc1,
3897 &dra7xx_l4_per1__mmc2,
3898 &dra7xx_l4_per1__mmc3,
3899 &dra7xx_l4_per1__mmc4,
3900 &dra7xx_l4_cfg__mpu, 3751 &dra7xx_l4_cfg__mpu,
3901 &dra7xx_l4_cfg__ocp2scp1, 3752 &dra7xx_l4_cfg__ocp2scp1,
3902 &dra7xx_l4_cfg__ocp2scp3, 3753 &dra7xx_l4_cfg__ocp2scp3,