diff options
author | Suman Anna <s-anna@ti.com> | 2013-08-06 17:40:28 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2013-08-20 21:39:26 -0400 |
commit | 03ab349ec4510895f28f546d7472be7fad707695 (patch) | |
tree | 649306908a081ea016c708403266a9d8f1d3d3cf /arch/arm/mach-omap2/omap_hwmod_54xx_data.c | |
parent | b36f4be3de1b123d8601de062e7dbfc904f305fb (diff) |
ARM: OMAP5: hwmod data: Add mailbox data
Add the hwmod data for the mailbox IP in OMAP5 SoC.
This is needed to be able to enable the OMAP mailbox
support for OMAP5.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_54xx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 3c70f5c1860f..7996ca5538e5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c | |||
@@ -741,6 +741,39 @@ static struct omap_hwmod omap54xx_kbd_hwmod = { | |||
741 | }; | 741 | }; |
742 | 742 | ||
743 | /* | 743 | /* |
744 | * 'mailbox' class | ||
745 | * mailbox module allowing communication between the on-chip processors using a | ||
746 | * queued mailbox-interrupt mechanism. | ||
747 | */ | ||
748 | |||
749 | static struct omap_hwmod_class_sysconfig omap54xx_mailbox_sysc = { | ||
750 | .rev_offs = 0x0000, | ||
751 | .sysc_offs = 0x0010, | ||
752 | .sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE | | ||
753 | SYSC_HAS_SOFTRESET), | ||
754 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
755 | .sysc_fields = &omap_hwmod_sysc_type2, | ||
756 | }; | ||
757 | |||
758 | static struct omap_hwmod_class omap54xx_mailbox_hwmod_class = { | ||
759 | .name = "mailbox", | ||
760 | .sysc = &omap54xx_mailbox_sysc, | ||
761 | }; | ||
762 | |||
763 | /* mailbox */ | ||
764 | static struct omap_hwmod omap54xx_mailbox_hwmod = { | ||
765 | .name = "mailbox", | ||
766 | .class = &omap54xx_mailbox_hwmod_class, | ||
767 | .clkdm_name = "l4cfg_clkdm", | ||
768 | .prcm = { | ||
769 | .omap4 = { | ||
770 | .clkctrl_offs = OMAP54XX_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, | ||
771 | .context_offs = OMAP54XX_RM_L4CFG_MAILBOX_CONTEXT_OFFSET, | ||
772 | }, | ||
773 | }, | ||
774 | }; | ||
775 | |||
776 | /* | ||
744 | * 'mcbsp' class | 777 | * 'mcbsp' class |
745 | * multi channel buffered serial port controller | 778 | * multi channel buffered serial port controller |
746 | */ | 779 | */ |
@@ -1808,6 +1841,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_wkup__kbd = { | |||
1808 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1841 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1809 | }; | 1842 | }; |
1810 | 1843 | ||
1844 | /* l4_cfg -> mailbox */ | ||
1845 | static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mailbox = { | ||
1846 | .master = &omap54xx_l4_cfg_hwmod, | ||
1847 | .slave = &omap54xx_mailbox_hwmod, | ||
1848 | .clk = "l4_root_clk_div", | ||
1849 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
1850 | }; | ||
1851 | |||
1811 | /* l4_abe -> mcbsp1 */ | 1852 | /* l4_abe -> mcbsp1 */ |
1812 | static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcbsp1 = { | 1853 | static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcbsp1 = { |
1813 | .master = &omap54xx_l4_abe_hwmod, | 1854 | .master = &omap54xx_l4_abe_hwmod, |
@@ -2108,6 +2149,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { | |||
2108 | &omap54xx_l4_per__i2c4, | 2149 | &omap54xx_l4_per__i2c4, |
2109 | &omap54xx_l4_per__i2c5, | 2150 | &omap54xx_l4_per__i2c5, |
2110 | &omap54xx_l4_wkup__kbd, | 2151 | &omap54xx_l4_wkup__kbd, |
2152 | &omap54xx_l4_cfg__mailbox, | ||
2111 | &omap54xx_l4_abe__mcbsp1, | 2153 | &omap54xx_l4_abe__mcbsp1, |
2112 | &omap54xx_l4_abe__mcbsp2, | 2154 | &omap54xx_l4_abe__mcbsp2, |
2113 | &omap54xx_l4_abe__mcbsp3, | 2155 | &omap54xx_l4_abe__mcbsp3, |