diff options
author | Rajendra Nayak <rnayak@ti.com> | 2012-04-27 07:25:59 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2012-11-12 21:18:51 -0500 |
commit | d037e100d138fb522ed0ea3e3a915bd8e0e36f63 (patch) | |
tree | 32a0dc720f4026dcba521b5b579933db59064cb0 /arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | |
parent | 455db9c9b23224f939723e9ded22b7a9a78fb57a (diff) |
ARM: OMAP2: clock: Cleanup !CONFIG_COMMON_CLK parts
Clean all #ifdef's added to OMAP2 clock code to make it COMMON clk
ready, not that CONFIG_COMMON_CLK is enabled.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: also drop CONFIG_COMMON_CLK tests around APLL recalc_rate
functions]
Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: remove some ifdefs in mach-omap2/io.c]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c')
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index 9a79ffaf6be5..7af224208a25 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | |||
@@ -59,12 +59,8 @@ static unsigned long sys_ck_rate; | |||
59 | * | 59 | * |
60 | * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. | 60 | * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. |
61 | */ | 61 | */ |
62 | #ifdef CONFIG_COMMON_CLK | ||
63 | unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, | 62 | unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, |
64 | unsigned long parent_rate) | 63 | unsigned long parent_rate) |
65 | #else | ||
66 | unsigned long omap2_table_mpu_recalc(struct clk *clk) | ||
67 | #endif | ||
68 | { | 64 | { |
69 | return curr_prcm_set->mpu_speed; | 65 | return curr_prcm_set->mpu_speed; |
70 | } | 66 | } |
@@ -76,12 +72,8 @@ unsigned long omap2_table_mpu_recalc(struct clk *clk) | |||
76 | * Some might argue L3-DDR, others ARM, others IVA. This code is simple and | 72 | * Some might argue L3-DDR, others ARM, others IVA. This code is simple and |
77 | * just uses the ARM rates. | 73 | * just uses the ARM rates. |
78 | */ | 74 | */ |
79 | #ifdef CONFIG_COMMON_CLK | ||
80 | long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, | 75 | long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, |
81 | unsigned long *parent_rate) | 76 | unsigned long *parent_rate) |
82 | #else | ||
83 | long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) | ||
84 | #endif | ||
85 | { | 77 | { |
86 | const struct prcm_config *ptr; | 78 | const struct prcm_config *ptr; |
87 | long highest_rate; | 79 | long highest_rate; |
@@ -104,12 +96,8 @@ long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) | |||
104 | } | 96 | } |
105 | 97 | ||
106 | /* Sets basic clocks based on the specified rate */ | 98 | /* Sets basic clocks based on the specified rate */ |
107 | #ifdef CONFIG_COMMON_CLK | ||
108 | int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, | 99 | int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, |
109 | unsigned long parent_rate) | 100 | unsigned long parent_rate) |
110 | #else | ||
111 | int omap2_select_table_rate(struct clk *clk, unsigned long rate) | ||
112 | #endif | ||
113 | { | 101 | { |
114 | u32 cur_rate, done_rate, bypass = 0, tmp; | 102 | u32 cur_rate, done_rate, bypass = 0, tmp; |
115 | const struct prcm_config *prcm; | 103 | const struct prcm_config *prcm; |