ARM: ks8695: merge the timer header into the timer driver

This <mach/regs-timer.h> is broadcasted in the entire kernel for
no good reason, since it's only used by the timer driver. Merge
it into the driver.

Tested-by: Greg Ungerer <gerg@snapgear.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

1 files changed, 20 insertions, 1 deletions

diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index ec783a3070ae..6427b7c2c9fa 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -29,11 +29,30 @@
 #include <asm/mach/time.h>
 #include <asm/system_misc.h>
 
-#include <mach/regs-timer.h>
 #include <mach/regs-irq.h>
 
 #include "generic.h"
 
+#define KS8695_TMR_OFFSET       (0xF0000 + 0xE400)
+#define KS8695_TMR_VA           (KS8695_IO_VA + KS8695_TMR_OFFSET)
+#define KS8695_TMR_PA           (KS8695_IO_PA + KS8695_TMR_OFFSET)
+
+/*
+ * Timer registers
+ */
+#define KS8695_TMCON            (0x00)          /* Timer Control Register */
+#define KS8695_T1TC             (0x04)          /* Timer 1 Timeout Count Register */
+#define KS8695_T0TC             (0x08)          /* Timer 0 Timeout Count Register */
+#define KS8695_T1PD             (0x0C)          /* Timer 1 Pulse Count Register */
+#define KS8695_T0PD             (0x10)          /* Timer 0 Pulse Count Register */
+
+/* Timer Control Register */
+#define TMCON_T1EN              (1 << 1)        /* Timer 1 Enable */
+#define TMCON_T0EN              (1 << 0)        /* Timer 0 Enable */
+
+/* Timer0 Timeout Counter Register */
+#define T0TC_WATCHDOG           (0xff)          /* Enable watchdog mode */
+
 /*
  * Returns number of ms since last clock interrupt.  Note that interrupts
  * will have been disabled by do_gettimeoffset()