cpuidle: exynos: add coupled cpuidle support for exynos4210

The following patch adds coupled cpuidle support for Exynos4210 to
an existing cpuidle-exynos driver.  As a result it enables AFTR mode
to be used by default on Exynos4210 without the need to hot unplug
CPU1 first.

The patch is heavily based on earlier cpuidle-exynos4210 driver from
Daniel Lezcano:

http://www.spinics.net/lists/linux-samsung-soc/msg28134.html

Changes from Daniel's code include:
- porting code to current kernels
- fixing it to work on my setup (by using S5P_INFORM register
  instead of S5P_VA_SYSRAM one on Revison 1.1 and retrying poking
  CPU1 out of the BOOT ROM if necessary)
- fixing rare lockup caused by waiting for CPU1 to get stuck in
  the BOOT ROM (CPU hotplug code in arch/arm/mach-exynos/platsmp.c
  doesn't require this and works fine)
- moving Exynos specific code to arch/arm/mach-exynos/pm.c
- using cpu_boot_reg_base() helper instead of BOOT_VECTOR macro
- using exynos_cpu_*() helpers instead of accessing registers
  directly
- using arch_send_wakeup_ipi_mask() instead of dsb_sev()
  (this matches CPU hotplug code in arch/arm/mach-exynos/platsmp.c)
- integrating separate exynos4210-cpuidle driver into existing
  exynos-cpuidle one

Cc: Colin Cross <ccross@google.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

1 files changed, 122 insertions, 0 deletions

diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 159eb4c9779e..1f9cbd434c60 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -179,3 +179,125 @@ void exynos_enter_aftr(void)
 
         cpu_pm_exit();
 }
+
+static atomic_t cpu1_wakeup = ATOMIC_INIT(0);
+
+static int exynos_cpu0_enter_aftr(void)
+{
+        int ret = -1;
+
+        /*
+         * If the other cpu is powered on, we have to power it off, because
+         * the AFTR state won't work otherwise
+         */
+        if (cpu_online(1)) {
+                /*
+                 * We reach a sync point with the coupled idle state, we know
+                 * the other cpu will power down itself or will abort the
+                 * sequence, let's wait for one of these to happen
+                 */
+                while (exynos_cpu_power_state(1)) {
+                        /*
+                         * The other cpu may skip idle and boot back
+                         * up again
+                         */
+                        if (atomic_read(&cpu1_wakeup))
+                                goto abort;
+
+                        /*
+                         * The other cpu may bounce through idle and
+                         * boot back up again, getting stuck in the
+                         * boot rom code
+                         */
+                        if (__raw_readl(cpu_boot_reg_base()) == 0)
+                                goto abort;
+
+                        cpu_relax();
+                }
+        }
+
+        exynos_enter_aftr();
+        ret = 0;
+
+abort:
+        if (cpu_online(1)) {
+                /*
+                 * Set the boot vector to something non-zero
+                 */
+                __raw_writel(virt_to_phys(exynos_cpu_resume),
+                             cpu_boot_reg_base());
+                dsb();
+
+                /*
+                 * Turn on cpu1 and wait for it to be on
+                 */
+                exynos_cpu_power_up(1);
+                while (exynos_cpu_power_state(1) != S5P_CORE_LOCAL_PWR_EN)
+                        cpu_relax();
+
+                while (!atomic_read(&cpu1_wakeup)) {
+                        /*
+                         * Poke cpu1 out of the boot rom
+                         */
+                        __raw_writel(virt_to_phys(exynos_cpu_resume),
+                                     cpu_boot_reg_base());
+
+                        arch_send_wakeup_ipi_mask(cpumask_of(1));
+                }
+        }
+
+        return ret;
+}
+
+static int exynos_wfi_finisher(unsigned long flags)
+{
+        cpu_do_idle();
+
+        return -1;
+}
+
+static int exynos_cpu1_powerdown(void)
+{
+        int ret = -1;
+
+        /*
+         * Idle sequence for cpu1
+         */
+        if (cpu_pm_enter())
+                goto cpu1_aborted;
+
+        /*
+         * Turn off cpu 1
+         */
+        exynos_cpu_power_down(1);
+
+        ret = cpu_suspend(0, exynos_wfi_finisher);
+
+        cpu_pm_exit();
+
+cpu1_aborted:
+        dsb();
+        /*
+         * Notify cpu 0 that cpu 1 is awake
+         */
+        atomic_set(&cpu1_wakeup, 1);
+
+        return ret;
+}
+
+static void exynos_pre_enter_aftr(void)
+{
+        __raw_writel(virt_to_phys(exynos_cpu_resume), cpu_boot_reg_base());
+}
+
+static void exynos_post_enter_aftr(void)
+{
+        atomic_set(&cpu1_wakeup, 0);
+}
+
+struct cpuidle_exynos_data cpuidle_coupled_exynos_data = {
+        .cpu0_enter_aftr                = exynos_cpu0_enter_aftr,
+        .cpu1_powerdown         = exynos_cpu1_powerdown,
+        .pre_enter_aftr         = exynos_pre_enter_aftr,
+        .post_enter_aftr                = exynos_post_enter_aftr,
+};