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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-04-23 10:12:57 -0400
committerArnd Bergmann <arnd@arndb.de>2011-07-28 11:07:28 -0400
commit8c3583b634d5705d8f604c0d9392bc273d19c256 (patch)
treefa2c010c4dbea580526cb91a25ae0e57abc0f099 /arch/arm/mach-at91/at91sam9rl.c
parent1ff5b1b411bf8a8157ae949a1b3ed8666d96c1db (diff)
at91: use structure to store the current soc
instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9rl.c')
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 0788adb1b53c..b83098c1db12 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -16,6 +16,7 @@
16#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 17#include <asm/mach/map.h>
18#include <mach/cpu.h> 18#include <mach/cpu.h>
19#include <mach/at91_dbgu.h>
19#include <mach/at91sam9rl.h> 20#include <mach/at91sam9rl.h>
20#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
21#include <mach/at91_rstc.h> 22#include <mach/at91_rstc.h>
@@ -281,11 +282,9 @@ static void at91sam9rl_poweroff(void)
281 282
282static void __init at91sam9rl_map_io(void) 283static void __init at91sam9rl_map_io(void)
283{ 284{
284 unsigned long cidr, sram_size; 285 unsigned long sram_size;
285 286
286 cidr = dbgu_readl(AT91_DBGU, CIDR); 287 switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
287
288 switch (cidr & AT91_CIDR_SRAMSIZ) {
289 case AT91_CIDR_SRAMSIZ_32K: 288 case AT91_CIDR_SRAMSIZ_32K:
290 sram_size = 2 * SZ_16K; 289 sram_size = 2 * SZ_16K;
291 break; 290 break;
@@ -359,7 +358,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
359 0, /* Advanced Interrupt Controller */ 358 0, /* Advanced Interrupt Controller */
360}; 359};
361 360
362struct at91_soc __initdata at91sam9rl_soc = { 361struct at91_init_soc __initdata at91sam9rl_soc = {
363 .map_io = at91sam9rl_map_io, 362 .map_io = at91sam9rl_map_io,
364 .default_irq_priority = at91sam9rl_default_irq_priority, 363 .default_irq_priority = at91sam9rl_default_irq_priority,
365 .init = at91sam9rl_initialize, 364 .init = at91sam9rl_initialize,