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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-08-01 18:27:08 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-08-01 18:27:08 -0400 |
commit | fbae5cbb43512446ba15a3b90039cb127d22ee95 (patch) | |
tree | 29f539576bc46537d7013d0ec0f4c2082dbca278 /arch/arm/include | |
parent | 6f888fe31dfcda4cb25018b0af3f50049fcf0b7f (diff) | |
parent | 4756f881ba303e4dada613feeacf44d26c3e35b9 (diff) |
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"Improved and new platform support for various SoCs:
New SoC support:
- Broadcom BCM23550
- Freescale i.MX7Solo
- Qualcomm MDM9615
- Renesas r8a7792
Improvements:
- convert clps711x to multiplatform
- debug uart improvements for Atmel platforms
- Tango platform improvements: HOTPLUG_CPU, Suspend-to-ram
- OMAP tweaks and improvements to hwmod
- OMAP support for kexec on SMP"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits)
ARM: davinci: fix build break because of undeclared dm365_evm_snd_data
ARM: s3c64xx: smartq: Avoid sparse warnings
ARM: sti: Implement dummy L2 cache's write_sec
ARM: STi: Update machine _namestr to be more generic.
arm: meson: explicitly select clk drivers
ARM: tango: add Suspend-to-RAM support
ARM: hisi: consolidate the hisilicon machine entries
ARM: tango: fix CONFIG_HOTPLUG_CPU=n build
MAINTAINERS: Update BCM281XX/BCM11XXX/BCM216XX entry
MAINTAINERS: Update BCM63XX entry
MAINTAINERS: Add NS2 entry
MAINTAINERS: Fix nsp false-positives
MAINTAINERS: Change L to M for Broadcom ARM/ARM64 SoC entries
ARM: debug: Enable DEBUG_BCM_5301X for Northstar Plus SoCs
ARM: clps711x: Switch to MULTIPLATFORM
ARM: clps711x: Remove boards support
ARM: clps711x: Add basic DT support
ARM: clps711x: Reduce static map size
ARM: SAMSUNG: Constify iomem address passed to s5p_init_cpu
ARM: oxnas: Change OX810SE default driver config
...
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/debug/at91.S | 10 | ||||
-rw-r--r-- | arch/arm/include/debug/clps711x.S | 4 | ||||
-rw-r--r-- | arch/arm/include/debug/exynos.S | 6 | ||||
-rw-r--r-- | arch/arm/include/debug/samsung.S | 8 |
4 files changed, 16 insertions, 12 deletions
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S index d4ae3b8e2426..0098401e5aeb 100644 --- a/arch/arm/include/debug/at91.S +++ b/arch/arm/include/debug/at91.S | |||
@@ -9,14 +9,6 @@ | |||
9 | * | 9 | * |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #ifdef CONFIG_MMU | ||
13 | #define AT91_IO_P2V(x) ((x) - 0x01000000) | ||
14 | #else | ||
15 | #define AT91_IO_P2V(x) (x) | ||
16 | #endif | ||
17 | |||
18 | #define AT91_DEBUG_UART_VIRT AT91_IO_P2V(CONFIG_DEBUG_UART_PHYS) | ||
19 | |||
20 | #define AT91_DBGU_SR (0x14) /* Status Register */ | 12 | #define AT91_DBGU_SR (0x14) /* Status Register */ |
21 | #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ | 13 | #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ |
22 | #define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ | 14 | #define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ |
@@ -24,7 +16,7 @@ | |||
24 | 16 | ||
25 | .macro addruart, rp, rv, tmp | 17 | .macro addruart, rp, rv, tmp |
26 | ldr \rp, =CONFIG_DEBUG_UART_PHYS @ System peripherals (phys address) | 18 | ldr \rp, =CONFIG_DEBUG_UART_PHYS @ System peripherals (phys address) |
27 | ldr \rv, =AT91_DEBUG_UART_VIRT @ System peripherals (virt address) | 19 | ldr \rv, =CONFIG_DEBUG_UART_VIRT @ System peripherals (virt address) |
28 | .endm | 20 | .endm |
29 | 21 | ||
30 | .macro senduart,rd,rx | 22 | .macro senduart,rd,rx |
diff --git a/arch/arm/include/debug/clps711x.S b/arch/arm/include/debug/clps711x.S index abe225436686..c17ac5c9e5f3 100644 --- a/arch/arm/include/debug/clps711x.S +++ b/arch/arm/include/debug/clps711x.S | |||
@@ -9,10 +9,10 @@ | |||
9 | 9 | ||
10 | #ifndef CONFIG_DEBUG_CLPS711X_UART2 | 10 | #ifndef CONFIG_DEBUG_CLPS711X_UART2 |
11 | #define CLPS711X_UART_PADDR (0x80000000 + 0x0000) | 11 | #define CLPS711X_UART_PADDR (0x80000000 + 0x0000) |
12 | #define CLPS711X_UART_VADDR (0xfeff0000 + 0x0000) | 12 | #define CLPS711X_UART_VADDR (0xfeff4000 + 0x0000) |
13 | #else | 13 | #else |
14 | #define CLPS711X_UART_PADDR (0x80000000 + 0x1000) | 14 | #define CLPS711X_UART_PADDR (0x80000000 + 0x1000) |
15 | #define CLPS711X_UART_VADDR (0xfeff0000 + 0x1000) | 15 | #define CLPS711X_UART_VADDR (0xfeff4000 + 0x1000) |
16 | #endif | 16 | #endif |
17 | 17 | ||
18 | #define SYSFLG (0x0140) | 18 | #define SYSFLG (0x0140) |
diff --git a/arch/arm/include/debug/exynos.S b/arch/arm/include/debug/exynos.S index b17fdb7fbd34..60bf3c23200d 100644 --- a/arch/arm/include/debug/exynos.S +++ b/arch/arm/include/debug/exynos.S | |||
@@ -24,7 +24,11 @@ | |||
24 | mrc p15, 0, \tmp, c0, c0, 0 | 24 | mrc p15, 0, \tmp, c0, c0, 0 |
25 | and \tmp, \tmp, #0xf0 | 25 | and \tmp, \tmp, #0xf0 |
26 | teq \tmp, #0xf0 @@ A15 | 26 | teq \tmp, #0xf0 @@ A15 |
27 | ldreq \rp, =EXYNOS5_PA_UART | 27 | beq 100f |
28 | mrc p15, 0, \tmp, c0, c0, 5 | ||
29 | and \tmp, \tmp, #0xf00 | ||
30 | teq \tmp, #0x100 @@ A15 + A7 but boot to A7 | ||
31 | 100: ldreq \rp, =EXYNOS5_PA_UART | ||
28 | movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4 | 32 | movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4 |
29 | ldr \rv, =S3C_VA_UART | 33 | ldr \rv, =S3C_VA_UART |
30 | #if CONFIG_DEBUG_S3C_UART != 0 | 34 | #if CONFIG_DEBUG_S3C_UART != 0 |
diff --git a/arch/arm/include/debug/samsung.S b/arch/arm/include/debug/samsung.S index 8d8d922e5e44..f4eeed2a1981 100644 --- a/arch/arm/include/debug/samsung.S +++ b/arch/arm/include/debug/samsung.S | |||
@@ -15,11 +15,13 @@ | |||
15 | 15 | ||
16 | .macro fifo_level_s5pv210 rd, rx | 16 | .macro fifo_level_s5pv210 rd, rx |
17 | ldr \rd, [\rx, # S3C2410_UFSTAT] | 17 | ldr \rd, [\rx, # S3C2410_UFSTAT] |
18 | ARM_BE8(rev \rd, \rd) | ||
18 | and \rd, \rd, #S5PV210_UFSTAT_TXMASK | 19 | and \rd, \rd, #S5PV210_UFSTAT_TXMASK |
19 | .endm | 20 | .endm |
20 | 21 | ||
21 | .macro fifo_full_s5pv210 rd, rx | 22 | .macro fifo_full_s5pv210 rd, rx |
22 | ldr \rd, [\rx, # S3C2410_UFSTAT] | 23 | ldr \rd, [\rx, # S3C2410_UFSTAT] |
24 | ARM_BE8(rev \rd, \rd) | ||
23 | tst \rd, #S5PV210_UFSTAT_TXFULL | 25 | tst \rd, #S5PV210_UFSTAT_TXFULL |
24 | .endm | 26 | .endm |
25 | 27 | ||
@@ -28,6 +30,7 @@ | |||
28 | 30 | ||
29 | .macro fifo_level_s3c2440 rd, rx | 31 | .macro fifo_level_s3c2440 rd, rx |
30 | ldr \rd, [\rx, # S3C2410_UFSTAT] | 32 | ldr \rd, [\rx, # S3C2410_UFSTAT] |
33 | ARM_BE8(rev \rd, \rd) | ||
31 | and \rd, \rd, #S3C2440_UFSTAT_TXMASK | 34 | and \rd, \rd, #S3C2440_UFSTAT_TXMASK |
32 | .endm | 35 | .endm |
33 | 36 | ||
@@ -37,6 +40,7 @@ | |||
37 | 40 | ||
38 | .macro fifo_full_s3c2440 rd, rx | 41 | .macro fifo_full_s3c2440 rd, rx |
39 | ldr \rd, [\rx, # S3C2410_UFSTAT] | 42 | ldr \rd, [\rx, # S3C2410_UFSTAT] |
43 | ARM_BE8(rev \rd, \rd) | ||
40 | tst \rd, #S3C2440_UFSTAT_TXFULL | 44 | tst \rd, #S3C2440_UFSTAT_TXFULL |
41 | .endm | 45 | .endm |
42 | 46 | ||
@@ -50,6 +54,7 @@ | |||
50 | 54 | ||
51 | .macro busyuart, rd, rx | 55 | .macro busyuart, rd, rx |
52 | ldr \rd, [\rx, # S3C2410_UFCON] | 56 | ldr \rd, [\rx, # S3C2410_UFCON] |
57 | ARM_BE8(rev \rd, \rd) | ||
53 | tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? | 58 | tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? |
54 | beq 1001f @ | 59 | beq 1001f @ |
55 | @ FIFO enabled... | 60 | @ FIFO enabled... |
@@ -61,6 +66,7 @@ | |||
61 | 1001: | 66 | 1001: |
62 | @ busy waiting for non fifo | 67 | @ busy waiting for non fifo |
63 | ldr \rd, [\rx, # S3C2410_UTRSTAT] | 68 | ldr \rd, [\rx, # S3C2410_UTRSTAT] |
69 | ARM_BE8(rev \rd, \rd) | ||
64 | tst \rd, #S3C2410_UTRSTAT_TXFE | 70 | tst \rd, #S3C2410_UTRSTAT_TXFE |
65 | beq 1001b | 71 | beq 1001b |
66 | 72 | ||
@@ -69,6 +75,7 @@ | |||
69 | 75 | ||
70 | .macro waituart,rd,rx | 76 | .macro waituart,rd,rx |
71 | ldr \rd, [\rx, # S3C2410_UFCON] | 77 | ldr \rd, [\rx, # S3C2410_UFCON] |
78 | ARM_BE8(rev \rd, \rd) | ||
72 | tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? | 79 | tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? |
73 | beq 1001f @ | 80 | beq 1001f @ |
74 | @ FIFO enabled... | 81 | @ FIFO enabled... |
@@ -80,6 +87,7 @@ | |||
80 | 1001: | 87 | 1001: |
81 | @ idle waiting for non fifo | 88 | @ idle waiting for non fifo |
82 | ldr \rd, [\rx, # S3C2410_UTRSTAT] | 89 | ldr \rd, [\rx, # S3C2410_UTRSTAT] |
90 | ARM_BE8(rev \rd, \rd) | ||
83 | tst \rd, #S3C2410_UTRSTAT_TXFE | 91 | tst \rd, #S3C2410_UTRSTAT_TXFE |
84 | beq 1001b | 92 | beq 1001b |
85 | 93 | ||