arm: mmp: Make use of the DT supported clock

Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>

3 files changed, 78 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index e44f99639cde..766bbb8495b6 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -8,6 +8,7 @@
  */
 
 #include "skeleton.dtsi"
+#include <dt-bindings/clock/marvell,mmp2.h>
 
 / {
         aliases {
@@ -135,6 +136,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4030000 0x1000>;
                                 interrupts = <27>;
+                                clocks = <&soc_clocks MMP2_CLK_UART0>;
+                                resets = <&soc_clocks MMP2_CLK_UART0>;
                                 status = "disabled";
                         };
 
@@ -142,6 +145,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4017000 0x1000>;
                                 interrupts = <28>;
+                                clocks = <&soc_clocks MMP2_CLK_UART1>;
+                                resets = <&soc_clocks MMP2_CLK_UART1>;
                                 status = "disabled";
                         };
 
@@ -149,6 +154,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4018000 0x1000>;
                                 interrupts = <24>;
+                                clocks = <&soc_clocks MMP2_CLK_UART2>;
+                                resets = <&soc_clocks MMP2_CLK_UART2>;
                                 status = "disabled";
                         };
 
@@ -156,6 +163,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4016000 0x1000>;
                                 interrupts = <46>;
+                                clocks = <&soc_clocks MMP2_CLK_UART3>;
+                                resets = <&soc_clocks MMP2_CLK_UART3>;
                                 status = "disabled";
                         };
 
@@ -168,6 +177,8 @@
                                 #gpio-cells = <2>;
                                 interrupts = <49>;
                                 interrupt-names = "gpio_mux";
+                                clocks = <&soc_clocks MMP2_CLK_GPIO>;
+                                resets = <&soc_clocks MMP2_CLK_GPIO>;
                                 interrupt-controller;
                                 #interrupt-cells = <1>;
                                 ranges;
@@ -201,6 +212,8 @@
                                 compatible = "mrvl,mmp-twsi";
                                 reg = <0xd4011000 0x1000>;
                                 interrupts = <7>;
+                                clocks = <&soc_clocks MMP2_CLK_TWSI0>;
+                                resets = <&soc_clocks MMP2_CLK_TWSI0>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 mrvl,i2c-fast-mode;
@@ -211,6 +224,8 @@
                                 compatible = "mrvl,mmp-twsi";
                                 reg = <0xd4025000 0x1000>;
                                 interrupts = <58>;
+                                clocks = <&soc_clocks MMP2_CLK_TWSI1>;
+                                resets = <&soc_clocks MMP2_CLK_TWSI1>;
                                 status = "disabled";
                         };
 
@@ -220,8 +235,20 @@
                                 interrupts = <1 0>;
                                 interrupt-names = "rtc 1Hz", "rtc alarm";
                                 interrupt-parent = <&intcmux5>;
+                                clocks = <&soc_clocks MMP2_CLK_RTC>;
+                                resets = <&soc_clocks MMP2_CLK_RTC>;
                                 status = "disabled";
                         };
                 };
+
+                soc_clocks: clocks{
+                        compatible = "marvell,mmp2-clock";
+                        reg = <0xd4050000 0x1000>,
+                              <0xd4282800 0x400>,
+                              <0xd4015000 0x1000>;
+                        reg-names = "mpmu", "apmu", "apbc";
+                        #clock-cells = <1>;
+                        #reset-cells = <1>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi
index bfcbdef39d0e..b899e25cbb1b 100644
--- a/arch/arm/boot/dts/pxa168.dtsi
+++ b/arch/arm/boot/dts/pxa168.dtsi
@@ -8,6 +8,7 @@
  */
 
 #include "skeleton.dtsi"
+#include <dt-bindings/clock/marvell,pxa168.h>
 
 / {
         aliases {
@@ -59,6 +60,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4017000 0x1000>;
                                 interrupts = <27>;
+                                clocks = <&soc_clocks PXA168_CLK_UART0>;
+                                resets = <&soc_clocks PXA168_CLK_UART0>;
                                 status = "disabled";
                         };
 
@@ -66,6 +69,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4018000 0x1000>;
                                 interrupts = <28>;
+                                clocks = <&soc_clocks PXA168_CLK_UART1>;
+                                resets = <&soc_clocks PXA168_CLK_UART1>;
                                 status = "disabled";
                         };
 
@@ -73,6 +78,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4026000 0x1000>;
                                 interrupts = <29>;
+                                clocks = <&soc_clocks PXA168_CLK_UART2>;
+                                resets = <&soc_clocks PXA168_CLK_UART2>;
                                 status = "disabled";
                         };
 
@@ -84,6 +91,8 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 interrupts = <49>;
+                                clocks = <&soc_clocks PXA168_CLK_GPIO>;
+                                resets = <&soc_clocks PXA168_CLK_GPIO>;
                                 interrupt-names = "gpio_mux";
                                 interrupt-controller;
                                 #interrupt-cells = <1>;
@@ -110,6 +119,8 @@
                                 compatible = "mrvl,mmp-twsi";
                                 reg = <0xd4011000 0x1000>;
                                 interrupts = <7>;
+                                clocks = <&soc_clocks PXA168_CLK_TWSI0>;
+                                resets = <&soc_clocks PXA168_CLK_TWSI0>;
                                 mrvl,i2c-fast-mode;
                                 status = "disabled";
                         };
@@ -118,6 +129,8 @@
                                 compatible = "mrvl,mmp-twsi";
                                 reg = <0xd4025000 0x1000>;
                                 interrupts = <58>;
+                                clocks = <&soc_clocks PXA168_CLK_TWSI1>;
+                                resets = <&soc_clocks PXA168_CLK_TWSI1>;
                                 status = "disabled";
                         };
 
@@ -126,8 +139,20 @@
                                 reg = <0xd4010000 0x1000>;
                                 interrupts = <5 6>;
                                 interrupt-names = "rtc 1Hz", "rtc alarm";
+                                clocks = <&soc_clocks PXA168_CLK_RTC>;
+                                resets = <&soc_clocks PXA168_CLK_RTC>;
                                 status = "disabled";
                         };
                 };
+
+                soc_clocks: clocks{
+                        compatible = "marvell,pxa168-clock";
+                        reg = <0xd4050000 0x1000>,
+                              <0xd4282800 0x400>,
+                              <0xd4015000 0x1000>;
+                        reg-names = "mpmu", "apmu", "apbc";
+                        #clock-cells = <1>;
+                        #reset-cells = <1>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
index 884c6e8642ee..0868f6729be1 100644
--- a/arch/arm/boot/dts/pxa910.dtsi
+++ b/arch/arm/boot/dts/pxa910.dtsi
@@ -8,6 +8,7 @@
  */
 
 #include "skeleton.dtsi"
+#include <dt-bindings/clock/marvell,pxa910.h>
 
 / {
         aliases {
@@ -71,6 +72,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4017000 0x1000>;
                                 interrupts = <27>;
+                                clocks = <&soc_clocks PXA910_CLK_UART0>;
+                                resets = <&soc_clocks PXA910_CLK_UART0>;
                                 status = "disabled";
                         };
 
@@ -78,6 +81,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4018000 0x1000>;
                                 interrupts = <28>;
+                                clocks = <&soc_clocks PXA910_CLK_UART1>;
+                                resets = <&soc_clocks PXA910_CLK_UART1>;
                                 status = "disabled";
                         };
 
@@ -85,6 +90,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4036000 0x1000>;
                                 interrupts = <59>;
+                                clocks = <&soc_clocks PXA910_CLK_UART2>;
+                                resets = <&soc_clocks PXA910_CLK_UART2>;
                                 status = "disabled";
                         };
 
@@ -97,6 +104,8 @@
                                 #gpio-cells = <2>;
                                 interrupts = <49>;
                                 interrupt-names = "gpio_mux";
+                                clocks = <&soc_clocks PXA910_CLK_GPIO>;
+                                resets = <&soc_clocks PXA910_CLK_GPIO>;
                                 interrupt-controller;
                                 #interrupt-cells = <1>;
                                 ranges;
@@ -124,6 +133,8 @@
                                 #size-cells = <0>;
                                 reg = <0xd4011000 0x1000>;
                                 interrupts = <7>;
+                                clocks = <&soc_clocks PXA910_CLK_TWSI0>;
+                                resets = <&soc_clocks PXA910_CLK_TWSI0>;
                                 mrvl,i2c-fast-mode;
                                 status = "disabled";
                         };
@@ -134,6 +145,8 @@
                                 #size-cells = <0>;
                                 reg = <0xd4037000 0x1000>;
                                 interrupts = <54>;
+                                clocks = <&soc_clocks PXA910_CLK_TWSI1>;
+                                resets = <&soc_clocks PXA910_CLK_TWSI1>;
                                 status = "disabled";
                         };
 
@@ -142,8 +155,21 @@
                                 reg = <0xd4010000 0x1000>;
                                 interrupts = <5 6>;
                                 interrupt-names = "rtc 1Hz", "rtc alarm";
+                                clocks = <&soc_clocks PXA910_CLK_RTC>;
+                                resets = <&soc_clocks PXA910_CLK_RTC>;
                                 status = "disabled";
                         };
                 };
+
+                soc_clocks: clocks{
+                        compatible = "marvell,pxa910-clock";
+                        reg = <0xd4050000 0x1000>,
+                              <0xd4282800 0x400>,
+                              <0xd4015000 0x1000>,
+                              <0xd403b000 0x1000>;
+                        reg-names = "mpmu", "apmu", "apbc", "apbcp";
+                        #clock-cells = <1>;
+                        #reset-cells = <1>;
+                };
         };
 };