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authorLinus Walleij <linus.walleij@linaro.org>2014-09-29 11:21:56 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-10-20 03:08:26 -0400
commit68d41f23ce8d049d05bdd96889d3a2504e7f21f0 (patch)
tree1ec20ed4c44e02306d947f1050f356904d01bff0 /arch/arm/boot/dts
parentf114040e3ea6e07372334ade75d1ee0775c355e1 (diff)
pinctrl: nomadik: force-convert to generic mux bindings
This converts the Nomadik pin controller and all associated device trees to use the standard, generic mux bindings for pin controllers. There are no such device trees deployed in the wild so this is safe to do to set a good example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi28
-rw-r--r--arch/arm/boot/dts/ste-href-family-pinctrl.dtsi80
-rw-r--r--arch/arm/boot/dts/ste-hrefprev60.dtsi12
-rw-r--r--arch/arm/boot/dts/ste-hrefv60plus.dtsi4
-rw-r--r--arch/arm/boot/dts/ste-nomadik-stn8815.dtsi20
-rw-r--r--arch/arm/boot/dts/ste-snowball.dts12
6 files changed, 78 insertions, 78 deletions
diff --git a/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi b/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
index e0799966bc25..08a7365cb929 100644
--- a/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
@@ -16,8 +16,8 @@
16 uart0 { 16 uart0 {
17 uart0_default_mux: uart0_mux { 17 uart0_default_mux: uart0_mux {
18 default_mux { 18 default_mux {
19 ste,function = "u0"; 19 function = "u0";
20 ste,pins = "u0_a_1"; 20 groups = "u0_a_1";
21 }; 21 };
22 }; 22 };
23 23
@@ -49,8 +49,8 @@
49 uart2 { 49 uart2 {
50 uart2_default_mode: uart2_default { 50 uart2_default_mode: uart2_default {
51 default_mux { 51 default_mux {
52 ste,function = "u2"; 52 function = "u2";
53 ste,pins = "u2txrx_a_1"; 53 groups = "u2txrx_a_1";
54 }; 54 };
55 55
56 default_cfg1 { 56 default_cfg1 {
@@ -80,8 +80,8 @@
80 i2c0 { 80 i2c0 {
81 i2c0_default_mux: i2c_mux { 81 i2c0_default_mux: i2c_mux {
82 default_mux { 82 default_mux {
83 ste,function = "i2c0"; 83 function = "i2c0";
84 ste,pins = "i2c0_a_1"; 84 groups = "i2c0_a_1";
85 }; 85 };
86 }; 86 };
87 87
@@ -103,8 +103,8 @@
103 i2c1 { 103 i2c1 {
104 i2c1_default_mux: i2c_mux { 104 i2c1_default_mux: i2c_mux {
105 default_mux { 105 default_mux {
106 ste,function = "i2c1"; 106 function = "i2c1";
107 ste,pins = "i2c1_b_2"; 107 groups = "i2c1_b_2";
108 }; 108 };
109 }; 109 };
110 110
@@ -126,8 +126,8 @@
126 i2c2 { 126 i2c2 {
127 i2c2_default_mux: i2c_mux { 127 i2c2_default_mux: i2c_mux {
128 default_mux { 128 default_mux {
129 ste,function = "i2c2"; 129 function = "i2c2";
130 ste,pins = "i2c2_b_2"; 130 groups = "i2c2_b_2";
131 }; 131 };
132 }; 132 };
133 133
@@ -149,8 +149,8 @@
149 i2c4 { 149 i2c4 {
150 i2c4_default_mux: i2c_mux { 150 i2c4_default_mux: i2c_mux {
151 default_mux { 151 default_mux {
152 ste,function = "i2c4"; 152 function = "i2c4";
153 ste,pins = "i2c4_b_2"; 153 groups = "i2c4_b_2";
154 }; 154 };
155 }; 155 };
156 156
@@ -172,8 +172,8 @@
172 i2c5 { 172 i2c5 {
173 i2c5_default_mux: i2c_mux { 173 i2c5_default_mux: i2c_mux {
174 default_mux { 174 default_mux {
175 ste,function = "i2c5"; 175 function = "i2c5";
176 ste,pins = "i2c5_c_2"; 176 groups = "i2c5_c_2";
177 }; 177 };
178 }; 178 };
179 179
diff --git a/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi b/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
index addfcc7c2750..61aa87138927 100644
--- a/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
@@ -18,8 +18,8 @@
18 uart0 { 18 uart0 {
19 uart0_default_mode: uart0_default { 19 uart0_default_mode: uart0_default {
20 default_mux { 20 default_mux {
21 ste,function = "u0"; 21 function = "u0";
22 ste,pins = "u0_a_1"; 22 groups = "u0_a_1";
23 }; 23 };
24 default_cfg1 { 24 default_cfg1 {
25 ste,pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */ 25 ste,pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
@@ -53,8 +53,8 @@
53 uart1 { 53 uart1 {
54 uart1_default_mode: uart1_default { 54 uart1_default_mode: uart1_default {
55 default_mux { 55 default_mux {
56 ste,function = "u1"; 56 function = "u1";
57 ste,pins = "u1rxtx_a_1"; 57 groups = "u1rxtx_a_1";
58 }; 58 };
59 default_cfg1 { 59 default_cfg1 {
60 ste,pins = "GPIO4_AH6"; /* RXD */ 60 ste,pins = "GPIO4_AH6"; /* RXD */
@@ -83,8 +83,8 @@
83 uart2 { 83 uart2 {
84 uart2_default_mode: uart2_default { 84 uart2_default_mode: uart2_default {
85 default_mux { 85 default_mux {
86 ste,function = "u2"; 86 function = "u2";
87 ste,pins = "u2rxtx_c_1"; 87 groups = "u2rxtx_c_1";
88 }; 88 };
89 default_cfg1 { 89 default_cfg1 {
90 ste,pins = "GPIO29_W2"; /* RXD */ 90 ste,pins = "GPIO29_W2"; /* RXD */
@@ -114,8 +114,8 @@
114 i2c0 { 114 i2c0 {
115 i2c0_default_mode: i2c_default { 115 i2c0_default_mode: i2c_default {
116 default_mux { 116 default_mux {
117 ste,function = "i2c0"; 117 function = "i2c0";
118 ste,pins = "i2c0_a_1"; 118 groups = "i2c0_a_1";
119 }; 119 };
120 default_cfg1 { 120 default_cfg1 {
121 ste,pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ 121 ste,pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
@@ -134,8 +134,8 @@
134 i2c1 { 134 i2c1 {
135 i2c1_default_mode: i2c_default { 135 i2c1_default_mode: i2c_default {
136 default_mux { 136 default_mux {
137 ste,function = "i2c1"; 137 function = "i2c1";
138 ste,pins = "i2c1_b_2"; 138 groups = "i2c1_b_2";
139 }; 139 };
140 default_cfg1 { 140 default_cfg1 {
141 ste,pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ 141 ste,pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
@@ -154,8 +154,8 @@
154 i2c2 { 154 i2c2 {
155 i2c2_default_mode: i2c_default { 155 i2c2_default_mode: i2c_default {
156 default_mux { 156 default_mux {
157 ste,function = "i2c2"; 157 function = "i2c2";
158 ste,pins = "i2c2_b_2"; 158 groups = "i2c2_b_2";
159 }; 159 };
160 default_cfg1 { 160 default_cfg1 {
161 ste,pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ 161 ste,pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
@@ -174,8 +174,8 @@
174 i2c3 { 174 i2c3 {
175 i2c3_default_mode: i2c_default { 175 i2c3_default_mode: i2c_default {
176 default_mux { 176 default_mux {
177 ste,function = "i2c3"; 177 function = "i2c3";
178 ste,pins = "i2c3_c_2"; 178 groups = "i2c3_c_2";
179 }; 179 };
180 default_cfg1 { 180 default_cfg1 {
181 ste,pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ 181 ste,pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
@@ -198,8 +198,8 @@
198 i2c4 { 198 i2c4 {
199 i2c4_default_mode: i2c_default { 199 i2c4_default_mode: i2c_default {
200 default_mux { 200 default_mux {
201 ste,function = "i2c4"; 201 function = "i2c4";
202 ste,pins = "i2c4_b_1"; 202 groups = "i2c4_b_1";
203 }; 203 };
204 default_cfg1 { 204 default_cfg1 {
205 ste,pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */ 205 ste,pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
@@ -219,8 +219,8 @@
219 spi2 { 219 spi2 {
220 spi2_default_mode: spi_default { 220 spi2_default_mode: spi_default {
221 default_mux { 221 default_mux {
222 ste,function = "spi2"; 222 function = "spi2";
223 ste,pins = "spi2_oc1_2"; 223 groups = "spi2_oc1_2";
224 }; 224 };
225 default_cfg1 { 225 default_cfg1 {
226 ste,pins = "GPIO216_AG12"; /* FRM */ 226 ste,pins = "GPIO216_AG12"; /* FRM */
@@ -281,8 +281,8 @@
281 /* This is the external SD card slot, 4 bits wide */ 281 /* This is the external SD card slot, 4 bits wide */
282 sdi0_default_mode: sdi0_default { 282 sdi0_default_mode: sdi0_default {
283 default_mux { 283 default_mux {
284 ste,function = "mc0"; 284 function = "mc0";
285 ste,pins = "mc0_a_1"; 285 groups = "mc0_a_1";
286 }; 286 };
287 default_cfg1 { 287 default_cfg1 {
288 ste,pins = 288 ste,pins =
@@ -339,8 +339,8 @@
339 /* This is the WLAN SDIO 4 bits wide */ 339 /* This is the WLAN SDIO 4 bits wide */
340 sdi1_default_mode: sdi1_default { 340 sdi1_default_mode: sdi1_default {
341 default_mux { 341 default_mux {
342 ste,function = "mc1"; 342 function = "mc1";
343 ste,pins = "mc1_a_1"; 343 groups = "mc1_a_1";
344 }; 344 };
345 default_cfg1 { 345 default_cfg1 {
346 ste,pins = "GPIO208_AH16"; /* CLK */ 346 ste,pins = "GPIO208_AH16"; /* CLK */
@@ -383,8 +383,8 @@
383 /* This is the eMMC 8 bits wide, usually PoP eMMC */ 383 /* This is the eMMC 8 bits wide, usually PoP eMMC */
384 sdi2_default_mode: sdi2_default { 384 sdi2_default_mode: sdi2_default {
385 default_mux { 385 default_mux {
386 ste,function = "mc2"; 386 function = "mc2";
387 ste,pins = "mc2_a_1"; 387 groups = "mc2_a_1";
388 }; 388 };
389 default_cfg1 { 389 default_cfg1 {
390 ste,pins = "GPIO128_A5"; /* CLK */ 390 ste,pins = "GPIO128_A5"; /* CLK */
@@ -439,8 +439,8 @@
439 /* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */ 439 /* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
440 sdi4_default_mode: sdi4_default { 440 sdi4_default_mode: sdi4_default {
441 default_mux { 441 default_mux {
442 ste,function = "mc4"; 442 function = "mc4";
443 ste,pins = "mc4_a_1"; 443 groups = "mc4_a_1";
444 }; 444 };
445 default_cfg1 { 445 default_cfg1 {
446 ste,pins = "GPIO203_AE23"; /* CLK */ 446 ste,pins = "GPIO203_AE23"; /* CLK */
@@ -494,8 +494,8 @@
494 msp0 { 494 msp0 {
495 msp0_default_mode: msp0_default { 495 msp0_default_mode: msp0_default {
496 default_msp0_mux { 496 default_msp0_mux {
497 ste,function = "msp0"; 497 function = "msp0";
498 ste,pins = "msp0txrx_a_1", "msp0tfstck_a_1"; 498 groups = "msp0txrx_a_1", "msp0tfstck_a_1";
499 }; 499 };
500 default_msp0_cfg { 500 default_msp0_cfg {
501 ste,pins = 501 ste,pins =
@@ -511,8 +511,8 @@
511 msp1 { 511 msp1 {
512 msp1_default_mode: msp1_default { 512 msp1_default_mode: msp1_default {
513 default_mux { 513 default_mux {
514 ste,function = "msp1"; 514 function = "msp1";
515 ste,pins = "msp1txrx_a_1", "msp1_a_1"; 515 groups = "msp1txrx_a_1", "msp1_a_1";
516 }; 516 };
517 default_cfg1 { 517 default_cfg1 {
518 ste,pins = "GPIO33_AF2"; 518 ste,pins = "GPIO33_AF2";
@@ -533,8 +533,8 @@
533 msp2_default_mode: msp2_default { 533 msp2_default_mode: msp2_default {
534 /* MSP2 usually used for HDMI audio */ 534 /* MSP2 usually used for HDMI audio */
535 default_mux { 535 default_mux {
536 ste,function = "msp2"; 536 function = "msp2";
537 ste,pins = "msp2_a_1"; 537 groups = "msp2_a_1";
538 }; 538 };
539 default_cfg1 { 539 default_cfg1 {
540 ste,pins = 540 ste,pins =
@@ -554,8 +554,8 @@
554 musb { 554 musb {
555 musb_default_mode: musb_default { 555 musb_default_mode: musb_default {
556 default_mux { 556 default_mux {
557 ste,function = "usb"; 557 function = "usb";
558 ste,pins = "usb_a_1"; 558 groups = "usb_a_1";
559 }; 559 };
560 default_cfg1 { 560 default_cfg1 {
561 ste,pins = 561 ste,pins =
@@ -609,8 +609,8 @@
609 lcd_default_mode: lcd_default { 609 lcd_default_mode: lcd_default {
610 default_mux { 610 default_mux {
611 /* Mux in VSI0 and all the data lines */ 611 /* Mux in VSI0 and all the data lines */
612 ste,function = "lcd"; 612 function = "lcd";
613 ste,pins = 613 groups =
614 "lcdvsi0_a_1", /* VSI0 for LCD */ 614 "lcdvsi0_a_1", /* VSI0 for LCD */
615 "lcd_d0_d7_a_1", /* Data lines */ 615 "lcd_d0_d7_a_1", /* Data lines */
616 "lcd_d8_d11_a_1", /* TV-out */ 616 "lcd_d8_d11_a_1", /* TV-out */
@@ -636,8 +636,8 @@
636 /* SKE keys on position 2 in an 8x8 matrix */ 636 /* SKE keys on position 2 in an 8x8 matrix */
637 ske_kpa2_default_mode: ske_kpa2_default { 637 ske_kpa2_default_mode: ske_kpa2_default {
638 default_mux { 638 default_mux {
639 ste,function = "kp"; 639 function = "kp";
640 ste,pins = "kp_a_2"; 640 groups = "kp_a_2";
641 }; 641 };
642 default_cfg1 { 642 default_cfg1 {
643 ste,pins = 643 ste,pins =
@@ -696,8 +696,8 @@
696 */ 696 */
697 ske_kpaoc1_default_mode: ske_kpaoc1_default { 697 ske_kpaoc1_default_mode: ske_kpaoc1_default {
698 default_mux { 698 default_mux {
699 ste,function = "kp"; 699 function = "kp";
700 ste,pins = "kp_a_1", "kp_oc1_1"; 700 groups = "kp_a_1", "kp_oc1_1";
701 }; 701 };
702 default_cfg1 { 702 default_cfg1 {
703 ste,pins = 703 ste,pins =
diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi
index abc762e24fcb..5d8b7f8ced1b 100644
--- a/arch/arm/boot/dts/ste-hrefprev60.dtsi
+++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi
@@ -79,8 +79,8 @@
79 ssp0 { 79 ssp0 {
80 ssp0_hrefprev60_mode: ssp0_hrefprev60_default { 80 ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
81 hrefprev60_mux { 81 hrefprev60_mux {
82 ste,function = "ssp0"; 82 function = "ssp0";
83 ste,pins = "ssp0_a_1"; 83 groups = "ssp0_a_1";
84 }; 84 };
85 hrefprev60_cfg1 { 85 hrefprev60_cfg1 {
86 ste,pins = "GPIO145_C13"; /* RXD */ 86 ste,pins = "GPIO145_C13"; /* RXD */
@@ -93,8 +93,8 @@
93 /* This additional pin needed on early MOP500 and HREFs previous to v60 */ 93 /* This additional pin needed on early MOP500 and HREFs previous to v60 */
94 sdi0_default_mode: sdi0_default { 94 sdi0_default_mode: sdi0_default {
95 hrefprev60_mux { 95 hrefprev60_mux {
96 ste,function = "mc0"; 96 function = "mc0";
97 ste,pins = "mc0dat31dir_a_1"; 97 groups = "mc0dat31dir_a_1";
98 }; 98 };
99 hrefprev60_cfg1 { 99 hrefprev60_cfg1 {
100 ste,pins = "GPIO21_AB3"; /* DAT31DIR */ 100 ste,pins = "GPIO21_AB3"; /* DAT31DIR */
@@ -114,8 +114,8 @@
114 ipgpio { 114 ipgpio {
115 ipgpio_hrefprev60_mode: ipgpio_hrefprev60 { 115 ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
116 hrefprev60_mux { 116 hrefprev60_mux {
117 ste,function = "ipgpio"; 117 function = "ipgpio";
118 ste,pins = "ipgpio0_c_1", "ipgpio1_c_1"; 118 groups = "ipgpio0_c_1", "ipgpio1_c_1";
119 }; 119 };
120 hrefprev60_cfg1 { 120 hrefprev60_cfg1 {
121 ste,pins = "GPIO6_AF6", "GPIO7_AG5"; 121 ste,pins = "GPIO6_AF6", "GPIO7_AG5";
diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
index bcc1f0c37f49..2b4104ef07de 100644
--- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
@@ -64,8 +64,8 @@
64 */ 64 */
65 ipgpio_hrefv60_mode: ipgpio_hrefv60 { 65 ipgpio_hrefv60_mode: ipgpio_hrefv60 {
66 hrefv60_mux { 66 hrefv60_mux {
67 ste,function = "ipgpio"; 67 function = "ipgpio";
68 ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1"; 68 groups = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
69 }; 69 };
70 hrefv60_cfg1 { 70 hrefv60_cfg1 {
71 ste,pins = "GPIO6_AF6", "GPIO7_AG5"; 71 ste,pins = "GPIO6_AF6", "GPIO7_AG5";
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index dbcf521b017f..7cedb5aba9a9 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -100,24 +100,24 @@
100 uart0 { 100 uart0 {
101 uart0_default_mux: uart0_mux { 101 uart0_default_mux: uart0_mux {
102 u0_default_mux { 102 u0_default_mux {
103 ste,function = "u0"; 103 function = "u0";
104 ste,pins = "u0_a_1"; 104 groups = "u0_a_1";
105 }; 105 };
106 }; 106 };
107 }; 107 };
108 uart1 { 108 uart1 {
109 uart1_default_mux: uart1_mux { 109 uart1_default_mux: uart1_mux {
110 u1_default_mux { 110 u1_default_mux {
111 ste,function = "u1"; 111 function = "u1";
112 ste,pins = "u1_a_1"; 112 groups = "u1_a_1";
113 }; 113 };
114 }; 114 };
115 }; 115 };
116 mmcsd { 116 mmcsd {
117 mmcsd_default_mux: mmcsd_mux { 117 mmcsd_default_mux: mmcsd_mux {
118 mmcsd_default_mux { 118 mmcsd_default_mux {
119 ste,function = "mmcsd"; 119 function = "mmcsd";
120 ste,pins = "mmcsd_a_1"; 120 groups = "mmcsd_a_1";
121 }; 121 };
122 }; 122 };
123 mmcsd_default_mode: mmcsd_default { 123 mmcsd_default_mode: mmcsd_default {
@@ -144,8 +144,8 @@
144 i2c0 { 144 i2c0 {
145 i2c0_default_mux: i2c0_mux { 145 i2c0_default_mux: i2c0_mux {
146 i2c0_default_mux { 146 i2c0_default_mux {
147 ste,function = "i2c0"; 147 function = "i2c0";
148 ste,pins = "i2c0_a_1"; 148 groups = "i2c0_a_1";
149 }; 149 };
150 }; 150 };
151 i2c0_default_mode: i2c0_default { 151 i2c0_default_mode: i2c0_default {
@@ -158,8 +158,8 @@
158 i2c1 { 158 i2c1 {
159 i2c1_default_mux: i2c1_mux { 159 i2c1_default_mux: i2c1_mux {
160 i2c1_default_mux { 160 i2c1_default_mux {
161 ste,function = "i2c1"; 161 function = "i2c1";
162 ste,pins = "i2c1_a_1"; 162 groups = "i2c1_a_1";
163 }; 163 };
164 }; 164 };
165 i2c1_default_mode: i2c1_default { 165 i2c1_default_mode: i2c1_default {
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index 3e97a669f15e..d43f8b19e7dd 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -404,8 +404,8 @@
404 */ 404 */
405 eth_snowball_mode: eth_snowball { 405 eth_snowball_mode: eth_snowball {
406 snowball_mux { 406 snowball_mux {
407 ste,function = "sm"; 407 function = "sm";
408 ste,pins = "sm_b_1"; 408 groups = "sm_b_1";
409 }; 409 };
410 /* LAN IRQ pin */ 410 /* LAN IRQ pin */
411 snowball_cfg1 { 411 snowball_cfg1 {
@@ -423,8 +423,8 @@
423 sdi0 { 423 sdi0 {
424 sdi0_default_mode: sdi0_default { 424 sdi0_default_mode: sdi0_default {
425 snowball_mux { 425 snowball_mux {
426 ste,function = "mc0"; 426 function = "mc0";
427 ste,pins = "mc0dat31dir_a_1"; 427 groups = "mc0dat31dir_a_1";
428 }; 428 };
429 snowball_cfg1 { 429 snowball_cfg1 {
430 ste,pins = "GPIO21_AB3"; /* DAT31DIR */ 430 ste,pins = "GPIO21_AB3"; /* DAT31DIR */
@@ -436,8 +436,8 @@
436 ssp0 { 436 ssp0 {
437 ssp0_snowball_mode: ssp0_snowball_default { 437 ssp0_snowball_mode: ssp0_snowball_default {
438 snowball_mux { 438 snowball_mux {
439 ste,function = "ssp0"; 439 function = "ssp0";
440 ste,pins = "ssp0_a_1"; 440 groups = "ssp0_a_1";
441 }; 441 };
442 snowball_cfg1 { 442 snowball_cfg1 {
443 ste,pins = "GPIO144_B13"; /* FRM */ 443 ste,pins = "GPIO144_B13"; /* FRM */
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-25 15:14:52 -0500