diff options
author | Stephen Warren <swarren@nvidia.com> | 2013-11-25 19:53:16 -0500 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-12-16 16:09:16 -0500 |
commit | 58ecb23f64ee3a2ef66bb55b2e1e841385b6d08b (patch) | |
tree | 91933b662c5ea802874259c9a1b555774834c4f2 /arch/arm/boot/dts/tegra20-ventana.dts | |
parent | 18f48a4f1d49d522285b5a9f3c5d984f4fdaae01 (diff) |
ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-ventana.dts')
-rw-r--r-- | arch/arm/boot/dts/tegra20-ventana.dts | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index aab872cd0530..bce764099853 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts | |||
@@ -10,8 +10,8 @@ | |||
10 | reg = <0x00000000 0x40000000>; | 10 | reg = <0x00000000 0x40000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | host1x { | 13 | host1x@50000000 { |
14 | hdmi { | 14 | hdmi@54280000 { |
15 | status = "okay"; | 15 | status = "okay"; |
16 | 16 | ||
17 | vdd-supply = <&hdmi_vdd_reg>; | 17 | vdd-supply = <&hdmi_vdd_reg>; |
@@ -23,7 +23,7 @@ | |||
23 | }; | 23 | }; |
24 | }; | 24 | }; |
25 | 25 | ||
26 | pinmux { | 26 | pinmux@70000014 { |
27 | pinctrl-names = "default"; | 27 | pinctrl-names = "default"; |
28 | pinctrl-0 = <&state_default>; | 28 | pinctrl-0 = <&state_default>; |
29 | 29 | ||
@@ -492,7 +492,7 @@ | |||
492 | }; | 492 | }; |
493 | }; | 493 | }; |
494 | 494 | ||
495 | pmc { | 495 | pmc@7000e400 { |
496 | nvidia,invert-interrupt; | 496 | nvidia,invert-interrupt; |
497 | nvidia,suspend-mode = <1>; | 497 | nvidia,suspend-mode = <1>; |
498 | nvidia,cpu-pwr-good-time = <2000>; | 498 | nvidia,cpu-pwr-good-time = <2000>; |
@@ -556,7 +556,7 @@ | |||
556 | #address-cells = <1>; | 556 | #address-cells = <1>; |
557 | #size-cells = <0>; | 557 | #size-cells = <0>; |
558 | 558 | ||
559 | clk32k_in: clock { | 559 | clk32k_in: clock@0 { |
560 | compatible = "fixed-clock"; | 560 | compatible = "fixed-clock"; |
561 | reg=<0>; | 561 | reg=<0>; |
562 | #clock-cells = <0>; | 562 | #clock-cells = <0>; |