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authorLaxman Dewangan <ldewangan@nvidia.com>2013-12-18 07:52:58 -0500
committerStephen Warren <swarren@nvidia.com>2013-12-19 13:40:36 -0500
commit365c483f190fea03971b3eca8d68406f425777b5 (patch)
treea6b5bb42f5ba8d8a0c7cb016eb359f288ce53f93 /arch/arm/boot/dts/tegra124-venice2.dts
parent553c0a200e2082686fd9b829b77f7df6ebae14e9 (diff)
ARM: tegra: fix missing pincontrol configuration for Venice2
Compare the initial population of default pinmux configuration of Venice2 with the chrome branch and add/fix the missing configurations. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-venice2.dts')
-rw-r--r--arch/arm/boot/dts/tegra124-venice2.dts308
1 files changed, 260 insertions, 48 deletions
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index d6bb25c78c62..6bc4e07ba839 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -23,34 +23,40 @@
23 nvidia,tristate = <TEGRA_PIN_DISABLE>; 23 nvidia,tristate = <TEGRA_PIN_DISABLE>;
24 }; 24 };
25 dap1_din_pn1 { 25 dap1_din_pn1 {
26 nvidia,pins = "dap1_din_pn1", 26 nvidia,pins = "dap1_din_pn1";
27 "dap1_dout_pn2", 27 nvidia,function = "i2s0";
28 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
29 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
30 nvidia,tristate = <TEGRA_PIN_ENABLE>;
31 };
32 dap1_dout_pn2 {
33 nvidia,pins = "dap1_dout_pn2",
28 "dap1_fs_pn0", 34 "dap1_fs_pn0",
29 "dap1_sclk_pn3"; 35 "dap1_sclk_pn3";
30 nvidia,function = "i2s0"; 36 nvidia,function = "i2s0";
31 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 37 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
32 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 38 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
33 nvidia,tristate = <TEGRA_PIN_ENABLE>; 39 nvidia,tristate = <TEGRA_PIN_ENABLE>;
34 }; 40 };
35 dap2_din_pa4 { 41 dap2_din_pa4 {
36 nvidia,pins = "dap2_din_pa4", 42 nvidia,pins = "dap2_din_pa4";
37 "dap2_dout_pa5",
38 "dap2_fs_pa2",
39 "dap2_sclk_pa3";
40 nvidia,function = "i2s1"; 43 nvidia,function = "i2s1";
41 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 44 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
42 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 45 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
43 nvidia,tristate = <TEGRA_PIN_DISABLE>; 46 nvidia,tristate = <TEGRA_PIN_DISABLE>;
44 }; 47 };
45 dvfs_pwm_px0 { 48 dap2_dout_pa5 {
46 nvidia,pins = "dvfs_pwm_px0"; 49 nvidia,pins = "dap2_dout_pa5",
47 nvidia,function = "cldvfs"; 50 "dap2_fs_pa2",
51 "dap2_sclk_pa3";
52 nvidia,function = "i2s1";
48 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 53 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
49 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 54 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
50 nvidia,tristate = <TEGRA_PIN_ENABLE>; 55 nvidia,tristate = <TEGRA_PIN_DISABLE>;
51 }; 56 };
52 dvfs_clk_px2 { 57 dvfs_pwm_px0 {
53 nvidia,pins = "dvfs_clk_px2"; 58 nvidia,pins = "dvfs_pwm_px0",
59 "dvfs_clk_px2";
54 nvidia,function = "cldvfs"; 60 nvidia,function = "cldvfs";
55 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 61 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
56 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 62 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
@@ -58,12 +64,18 @@
58 }; 64 };
59 ulpi_clk_py0 { 65 ulpi_clk_py0 {
60 nvidia,pins = "ulpi_clk_py0", 66 nvidia,pins = "ulpi_clk_py0",
61 "ulpi_dir_py1",
62 "ulpi_nxt_py2", 67 "ulpi_nxt_py2",
63 "ulpi_stp_py3"; 68 "ulpi_stp_py3";
64 nvidia,function = "spi1"; 69 nvidia,function = "spi1";
70 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
71 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
72 nvidia,tristate = <TEGRA_PIN_DISABLE>;
73 };
74 ulpi_dir_py1 {
75 nvidia,pins = "ulpi_dir_py1";
76 nvidia,function = "spi1";
65 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 77 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
66 nvidia,pull = <TEGRA_PIN_PULL_UP>; 78 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
67 nvidia,tristate = <TEGRA_PIN_DISABLE>; 79 nvidia,tristate = <TEGRA_PIN_DISABLE>;
68 }; 80 };
69 cam_i2c_scl_pbb1 { 81 cam_i2c_scl_pbb1 {
@@ -90,19 +102,18 @@
90 nvidia,pins = "pg4", 102 nvidia,pins = "pg4",
91 "pg5", 103 "pg5",
92 "pg6", 104 "pg6",
93 "pg7",
94 "pi3"; 105 "pi3";
95 nvidia,function = "spi4"; 106 nvidia,function = "spi4";
96 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 107 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
97 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 108 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
98 nvidia,tristate = <TEGRA_PIN_DISABLE>; 109 nvidia,tristate = <TEGRA_PIN_DISABLE>;
99 }; 110 };
100 ph0 { 111 pg7 {
101 nvidia,pins = "ph0"; 112 nvidia,pins = "pg7";
102 nvidia,function = "pwm0"; 113 nvidia,function = "spi4";
103 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 114 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
104 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 115 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
105 nvidia,tristate = <TEGRA_PIN_ENABLE>; 116 nvidia,tristate = <TEGRA_PIN_DISABLE>;
106 }; 117 };
107 ph1 { 118 ph1 {
108 nvidia,pins = "ph1"; 119 nvidia,pins = "ph1";
@@ -111,12 +122,14 @@
111 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 122 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
112 nvidia,tristate = <TEGRA_PIN_DISABLE>; 123 nvidia,tristate = <TEGRA_PIN_DISABLE>;
113 }; 124 };
114 ph2 { 125 pk0 {
115 nvidia,pins = "ph2"; 126 nvidia,pins = "pk0",
116 nvidia,function = "gmi"; 127 "kb_row15_ps7",
117 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 128 "clk_32k_out_pa0";
129 nvidia,function = "soc";
130 nvidia,pull = <TEGRA_PIN_PULL_UP>;
118 nvidia,tristate = <TEGRA_PIN_DISABLE>; 131 nvidia,tristate = <TEGRA_PIN_DISABLE>;
119 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 132 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
120 }; 133 };
121 sdmmc1_clk_pz0 { 134 sdmmc1_clk_pz0 {
122 nvidia,pins = "sdmmc1_clk_pz0", 135 nvidia,pins = "sdmmc1_clk_pz0",
@@ -130,6 +143,17 @@
130 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 143 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
131 nvidia,tristate = <TEGRA_PIN_DISABLE>; 144 nvidia,tristate = <TEGRA_PIN_DISABLE>;
132 }; 145 };
146 sdmmc1_cmd_pz1 {
147 nvidia,pins = "sdmmc1_cmd_pz1",
148 "sdmmc1_dat0_py7",
149 "sdmmc1_dat1_py6",
150 "sdmmc1_dat2_py5",
151 "sdmmc1_dat3_py4";
152 nvidia,function = "sdmmc1";
153 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
154 nvidia,pull = <TEGRA_PIN_PULL_UP>;
155 nvidia,tristate = <TEGRA_PIN_DISABLE>;
156 };
133 sdmmc3_clk_pa6 { 157 sdmmc3_clk_pa6 {
134 nvidia,pins = "sdmmc3_clk_pa6"; 158 nvidia,pins = "sdmmc3_clk_pa6";
135 nvidia,function = "sdmmc3"; 159 nvidia,function = "sdmmc3";
@@ -179,6 +203,7 @@
179 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 203 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
180 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 204 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
181 nvidia,tristate = <TEGRA_PIN_DISABLE>; 205 nvidia,tristate = <TEGRA_PIN_DISABLE>;
206 nvidia,lock = <TEGRA_PIN_DISABLE>;
182 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 207 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
183 }; 208 };
184 jtag_rtck { 209 jtag_rtck {
@@ -231,12 +256,18 @@
231 nvidia,tristate = <TEGRA_PIN_DISABLE>; 256 nvidia,tristate = <TEGRA_PIN_DISABLE>;
232 }; 257 };
233 dap4_din_pp5 { 258 dap4_din_pp5 {
234 nvidia,pins = "dap4_din_pp5", 259 nvidia,pins = "dap4_din_pp5";
235 "dap4_dout_pp6", 260 nvidia,function = "i2s3";
261 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
262 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
263 nvidia,tristate = <TEGRA_PIN_ENABLE>;
264 };
265 dap4_dout_pp6 {
266 nvidia,pins = "dap4_dout_pp6",
236 "dap4_fs_pp4", 267 "dap4_fs_pp4",
237 "dap4_sclk_pp7"; 268 "dap4_sclk_pp7";
238 nvidia,function = "i2s3"; 269 nvidia,function = "i2s3";
239 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 270 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
240 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 271 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
241 nvidia,tristate = <TEGRA_PIN_ENABLE>; 272 nvidia,tristate = <TEGRA_PIN_ENABLE>;
242 }; 273 };
@@ -248,51 +279,67 @@
248 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 279 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
249 nvidia,tristate = <TEGRA_PIN_DISABLE>; 280 nvidia,tristate = <TEGRA_PIN_DISABLE>;
250 nvidia,lock = <TEGRA_PIN_DISABLE>; 281 nvidia,lock = <TEGRA_PIN_DISABLE>;
251 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 282 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
252 }; 283 };
253 pu0 { 284 uart2_cts_n_pj5 {
254 nvidia,pins = "pu0", 285 nvidia,pins = "uart2_cts_n_pj5";
255 "pu1", 286 nvidia,function = "uartb";
256 "pu2",
257 "pu3";
258 nvidia,function = "uarta";
259 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 287 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 288 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
261 nvidia,tristate = <TEGRA_PIN_DISABLE>; 289 nvidia,tristate = <TEGRA_PIN_DISABLE>;
262 }; 290 };
263 uart2_cts_n_pj5 { 291 uart2_rts_n_pj6 {
264 nvidia,pins = "uart2_cts_n_pj5", 292 nvidia,pins = "uart2_rts_n_pj6";
265 "uart2_rts_n_pj6";
266 nvidia,function = "uartb"; 293 nvidia,function = "uartb";
267 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 294 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
268 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 295 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
269 nvidia,tristate = <TEGRA_PIN_DISABLE>; 296 nvidia,tristate = <TEGRA_PIN_DISABLE>;
270 }; 297 };
271 uart2_rxd_pc3 { 298 uart2_rxd_pc3 {
272 nvidia,pins = "uart2_rxd_pc3", 299 nvidia,pins = "uart2_rxd_pc3";
273 "uart2_txd_pc2";
274 nvidia,function = "irda"; 300 nvidia,function = "irda";
275 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 301 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 302 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
277 nvidia,tristate = <TEGRA_PIN_DISABLE>; 303 nvidia,tristate = <TEGRA_PIN_DISABLE>;
278 }; 304 };
305 uart2_txd_pc2 {
306 nvidia,pins = "uart2_txd_pc2";
307 nvidia,function = "irda";
308 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
309 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
310 nvidia,tristate = <TEGRA_PIN_DISABLE>;
311 };
279 uart3_cts_n_pa1 { 312 uart3_cts_n_pa1 {
280 nvidia,pins = "uart3_cts_n_pa1", 313 nvidia,pins = "uart3_cts_n_pa1",
281 "uart3_rts_n_pc0", 314 "uart3_rxd_pw7";
282 "uart3_rxd_pw7",
283 "uart3_txd_pw6";
284 nvidia,function = "uartc"; 315 nvidia,function = "uartc";
285 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 316 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
286 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 317 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
287 nvidia,tristate = <TEGRA_PIN_DISABLE>; 318 nvidia,tristate = <TEGRA_PIN_DISABLE>;
288 }; 319 };
320 uart3_rts_n_pc0 {
321 nvidia,pins = "uart3_rts_n_pc0",
322 "uart3_txd_pw6";
323 nvidia,function = "uartc";
324 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
325 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
326 nvidia,tristate = <TEGRA_PIN_DISABLE>;
327 };
289 hdmi_cec_pee3 { 328 hdmi_cec_pee3 {
290 nvidia,pins = "hdmi_cec_pee3"; 329 nvidia,pins = "hdmi_cec_pee3";
291 nvidia,function = "cec"; 330 nvidia,function = "cec";
292 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 331 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
293 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 332 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
294 nvidia,tristate = <TEGRA_PIN_DISABLE>; 333 nvidia,tristate = <TEGRA_PIN_DISABLE>;
295 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 334 nvidia,lock = <TEGRA_PIN_DISABLE>;
335 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
336 };
337 hdmi_int_pn7 {
338 nvidia,pins = "hdmi_int_pn7";
339 nvidia,function = "rsvd1";
340 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
341 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
342 nvidia,tristate = <TEGRA_PIN_DISABLE>;
296 }; 343 };
297 ddc_scl_pv4 { 344 ddc_scl_pv4 {
298 nvidia,pins = "ddc_scl_pv4", 345 nvidia,pins = "ddc_scl_pv4",
@@ -301,6 +348,52 @@
301 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 348 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
302 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 349 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
303 nvidia,tristate = <TEGRA_PIN_DISABLE>; 350 nvidia,tristate = <TEGRA_PIN_DISABLE>;
351 nvidia,lock = <TEGRA_PIN_DISABLE>;
352 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
353 };
354 pj7 {
355 nvidia,pins = "pj7",
356 "pk7";
357 nvidia,function = "uartd";
358 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
359 nvidia,tristate = <TEGRA_PIN_DISABLE>;
360 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
361 };
362 pb0 {
363 nvidia,pins = "pb0",
364 "pb1";
365 nvidia,function = "uartd";
366 nvidia,pull = <TEGRA_PIN_PULL_UP>;
367 nvidia,tristate = <TEGRA_PIN_DISABLE>;
368 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
369 };
370 ph0 {
371 nvidia,pins = "ph0";
372 nvidia,function = "pwm0";
373 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
374 nvidia,tristate = <TEGRA_PIN_DISABLE>;
375 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
376 };
377 kb_row10_ps2 {
378 nvidia,pins = "kb_row10_ps2";
379 nvidia,function = "uarta";
380 nvidia,pull = <TEGRA_PIN_PULL_UP>;
381 nvidia,tristate = <TEGRA_PIN_DISABLE>;
382 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
383 };
384 kb_row9_ps1 {
385 nvidia,pins = "kb_row9_ps1";
386 nvidia,function = "uarta";
387 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
388 nvidia,tristate = <TEGRA_PIN_DISABLE>;
389 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
390 };
391 kb_row6_pr6 {
392 nvidia,pins = "kb_row6_pr6";
393 nvidia,function = "displaya_alt";
394 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
395 nvidia,tristate = <TEGRA_PIN_DISABLE>;
396 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
304 }; 397 };
305 usb_vbus_en0_pn4 { 398 usb_vbus_en0_pn4 {
306 nvidia,pins = "usb_vbus_en0_pn4"; 399 nvidia,pins = "usb_vbus_en0_pn4";
@@ -309,7 +402,7 @@
309 nvidia,pull = <TEGRA_PIN_PULL_UP>; 402 nvidia,pull = <TEGRA_PIN_PULL_UP>;
310 nvidia,tristate = <TEGRA_PIN_DISABLE>; 403 nvidia,tristate = <TEGRA_PIN_DISABLE>;
311 nvidia,lock = <TEGRA_PIN_DISABLE>; 404 nvidia,lock = <TEGRA_PIN_DISABLE>;
312 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 405 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
313 }; 406 };
314 usb_vbus_en1_pn5 { 407 usb_vbus_en1_pn5 {
315 nvidia,pins = "usb_vbus_en1_pn5"; 408 nvidia,pins = "usb_vbus_en1_pn5";
@@ -318,7 +411,7 @@
318 nvidia,pull = <TEGRA_PIN_PULL_UP>; 411 nvidia,pull = <TEGRA_PIN_PULL_UP>;
319 nvidia,tristate = <TEGRA_PIN_DISABLE>; 412 nvidia,tristate = <TEGRA_PIN_DISABLE>;
320 nvidia,lock = <TEGRA_PIN_DISABLE>; 413 nvidia,lock = <TEGRA_PIN_DISABLE>;
321 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 414 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
322 }; 415 };
323 drive_sdio1 { 416 drive_sdio1 {
324 nvidia,pins = "drive_sdio1"; 417 nvidia,pins = "drive_sdio1";
@@ -351,6 +444,125 @@
351 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 444 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
352 nvidia,drive-type = <1>; 445 nvidia,drive-type = <1>;
353 }; 446 };
447 als_irq_l {
448 nvidia,pins = "gpio_x3_aud_px3";
449 nvidia,function = "gmi";
450 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
451 nvidia,tristate = <TEGRA_PIN_ENABLE>;
452 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
453 };
454 codec_irq_l {
455 nvidia,pins = "ph4";
456 nvidia,function = "gmi";
457 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
458 nvidia,tristate = <TEGRA_PIN_DISABLE>;
459 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
460 };
461 lcd_bl_en {
462 nvidia,pins = "ph2";
463 nvidia,function = "gmi";
464 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
465 nvidia,tristate = <TEGRA_PIN_DISABLE>;
466 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
467 };
468 touch_irq_l {
469 nvidia,pins = "gpio_w3_aud_pw3";
470 nvidia,function = "spi6";
471 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
472 nvidia,tristate = <TEGRA_PIN_ENABLE>;
473 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
474 };
475 tpm_davint_l {
476 nvidia,pins = "ph6";
477 nvidia,function = "gmi";
478 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
479 nvidia,tristate = <TEGRA_PIN_ENABLE>;
480 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
481 };
482 ts_irq_l {
483 nvidia,pins = "pk2";
484 nvidia,function = "gmi";
485 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
486 nvidia,tristate = <TEGRA_PIN_ENABLE>;
487 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
488 };
489 ts_reset_l {
490 nvidia,pins = "pk4";
491 nvidia,function = "gmi";
492 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
493 nvidia,tristate = <TEGRA_PIN_DISABLE>;
494 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
495 };
496 ts_shdn_l {
497 nvidia,pins = "pk1";
498 nvidia,function = "gmi";
499 nvidia,pull = <TEGRA_PIN_PULL_UP>;
500 nvidia,tristate = <TEGRA_PIN_DISABLE>;
501 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
502 };
503 ph7 {
504 nvidia,pins = "ph7";
505 nvidia,function = "gmi";
506 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
507 nvidia,tristate = <TEGRA_PIN_DISABLE>;
508 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
509 };
510 kb_col0_ap {
511 nvidia,pins = "kb_col0_pq0";
512 nvidia,function = "rsvd4";
513 nvidia,pull = <TEGRA_PIN_PULL_UP>;
514 nvidia,tristate = <TEGRA_PIN_DISABLE>;
515 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
516 };
517 lid_open {
518 nvidia,pins = "kb_row4_pr4";
519 nvidia,function = "rsvd3";
520 nvidia,pull = <TEGRA_PIN_PULL_UP>;
521 nvidia,tristate = <TEGRA_PIN_DISABLE>;
522 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
523 };
524 en_vdd_sd {
525 nvidia,pins = "kb_row0_pr0";
526 nvidia,function = "rsvd4";
527 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
528 nvidia,tristate = <TEGRA_PIN_DISABLE>;
529 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
530 };
531 ac_ok {
532 nvidia,pins = "pj0";
533 nvidia,function = "gmi";
534 nvidia,pull = <TEGRA_PIN_PULL_UP>;
535 nvidia,tristate = <TEGRA_PIN_ENABLE>;
536 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
537 };
538 sensor_irq_l {
539 nvidia,pins = "pi6";
540 nvidia,function = "gmi";
541 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
542 nvidia,tristate = <TEGRA_PIN_DISABLE>;
543 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
544 };
545 wifi_en {
546 nvidia,pins = "gpio_x7_aud_px7";
547 nvidia,function = "rsvd4";
548 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
549 nvidia,tristate = <TEGRA_PIN_DISABLE>;
550 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
551 };
552 wifi_rst_l {
553 nvidia,pins = "clk2_req_pcc5";
554 nvidia,function = "dap";
555 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
556 nvidia,tristate = <TEGRA_PIN_DISABLE>;
557 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
558 };
559 hp_det_l {
560 nvidia,pins = "ulpi_data1_po2";
561 nvidia,function = "spi3";
562 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
563 nvidia,tristate = <TEGRA_PIN_DISABLE>;
564 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
565 };
354 }; 566 };
355 }; 567 };
356 568
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 17:07:58 -0500