ARM: dts: rockchip: move the rk3288 thermal data into rk3288.dtsi

In order to be standard to manage for rockchip SoCs,  move the thermal
data into rk3288 dtsi, we needn't to add a new file for thermal.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

1 files changed, 72 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 906818955215..3b44ef3cff12 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -445,7 +445,78 @@
         };
 
         thermal-zones {
-                #include "rk3288-thermal.dtsi"
+                reserve_thermal: reserve_thermal {
+                        polling-delay-passive = <1000>; /* milliseconds */
+                        polling-delay = <5000>; /* milliseconds */
+
+                        thermal-sensors = <&tsadc 0>;
+                };
+
+                cpu_thermal: cpu_thermal {
+                        polling-delay-passive = <100>; /* milliseconds */
+                        polling-delay = <5000>; /* milliseconds */
+
+                        thermal-sensors = <&tsadc 1>;
+
+                        trips {
+                                cpu_alert0: cpu_alert0 {
+                                        temperature = <70000>; /* millicelsius */
+                                        hysteresis = <2000>; /* millicelsius */
+                                        type = "passive";
+                                };
+                                cpu_alert1: cpu_alert1 {
+                                        temperature = <75000>; /* millicelsius */
+                                        hysteresis = <2000>; /* millicelsius */
+                                        type = "passive";
+                                };
+                                cpu_crit: cpu_crit {
+                                        temperature = <90000>; /* millicelsius */
+                                        hysteresis = <2000>; /* millicelsius */
+                                        type = "critical";
+                                };
+                        };
+
+                        cooling-maps {
+                                map0 {
+                                        trip = <&cpu_alert0>;
+                                        cooling-device =
+                                                <&cpu0 THERMAL_NO_LIMIT 6>;
+                                };
+                                map1 {
+                                        trip = <&cpu_alert1>;
+                                        cooling-device =
+                                                <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                };
+                        };
+                };
+
+                gpu_thermal: gpu_thermal {
+                        polling-delay-passive = <100>; /* milliseconds */
+                        polling-delay = <5000>; /* milliseconds */
+
+                        thermal-sensors = <&tsadc 2>;
+
+                        trips {
+                                gpu_alert0: gpu_alert0 {
+                                        temperature = <70000>; /* millicelsius */
+                                        hysteresis = <2000>; /* millicelsius */
+                                        type = "passive";
+                                };
+                                gpu_crit: gpu_crit {
+                                        temperature = <90000>; /* millicelsius */
+                                        hysteresis = <2000>; /* millicelsius */
+                                        type = "critical";
+                                };
+                        };
+
+                        cooling-maps {
+                                map0 {
+                                        trip = <&gpu_alert0>;
+                                        cooling-device =
+                                                <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                };
+                        };
+                };
         };
 
         tsadc: tsadc@ff280000 {