diff options
author | Chris Brandt <chris.brandt@renesas.com> | 2016-09-01 21:40:10 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2016-09-05 08:32:39 -0400 |
commit | 969244f9c72057b2c32b650b2d75a04d612c603c (patch) | |
tree | f95bc55c3b36f85ce4fdcb57ca7eff64c493873b /arch/arm/boot/dts/r7s72100.dtsi | |
parent | e83c05a7160681f554476e9d44b7b77053efc21a (diff) |
ARM: dts: r7s72100: add ethernet clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r7s72100.dtsi')
-rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index e8e2a5d71976..6d29e8ffa0d9 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi | |||
@@ -108,6 +108,15 @@ | |||
108 | clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7"; | 108 | clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7"; |
109 | }; | 109 | }; |
110 | 110 | ||
111 | mstp7_clks: mstp7_clks@fcfe0430 { | ||
112 | #clock-cells = <1>; | ||
113 | compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; | ||
114 | reg = <0xfcfe0430 4>; | ||
115 | clocks = <&p0_clk>; | ||
116 | clock-indices = <R7S72100_CLK_ETHER>; | ||
117 | clock-output-names = "ether"; | ||
118 | }; | ||
119 | |||
111 | mstp9_clks: mstp9_clks@fcfe0438 { | 120 | mstp9_clks: mstp9_clks@fcfe0438 { |
112 | #clock-cells = <1>; | 121 | #clock-cells = <1>; |
113 | compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; | 122 | compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; |