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authorFabio Estevam <fabio.estevam@freescale.com>2012-11-21 10:43:05 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2012-11-22 03:15:26 -0500
commitf40f38d1dc8dee0c19b2102ea549b696116f61da (patch)
tree1e64da0e8c16188cc4fc6e43df1869b4a9cc875d /arch/arm/boot/dts/imx51.dtsi
parentd6aef84a48fa54ac606ae719fcd125199939f43d (diff)
ARM: mx5: Replace clk_register_clkdev with clock DT lookup
Similarly as it was done for mx6q, use a DT lookup in order to make maintainance task for the clock devices easier. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boot/dts/imx51.dtsi')
-rw-r--r--arch/arm/boot/dts/imx51.dtsi39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 44c7af791fa5..8cf69c702553 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -87,6 +87,8 @@
87 compatible = "fsl,imx51-esdhc"; 87 compatible = "fsl,imx51-esdhc";
88 reg = <0x70004000 0x4000>; 88 reg = <0x70004000 0x4000>;
89 interrupts = <1>; 89 interrupts = <1>;
90 clocks = <&clks 44>, <&clks 0>, <&clks 71>;
91 clock-names = "ipg", "ahb", "per";
90 status = "disabled"; 92 status = "disabled";
91 }; 93 };
92 94
@@ -94,6 +96,8 @@
94 compatible = "fsl,imx51-esdhc"; 96 compatible = "fsl,imx51-esdhc";
95 reg = <0x70008000 0x4000>; 97 reg = <0x70008000 0x4000>;
96 interrupts = <2>; 98 interrupts = <2>;
99 clocks = <&clks 45>, <&clks 0>, <&clks 72>;
100 clock-names = "ipg", "ahb", "per";
97 status = "disabled"; 101 status = "disabled";
98 }; 102 };
99 103
@@ -101,6 +105,8 @@
101 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 105 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
102 reg = <0x7000c000 0x4000>; 106 reg = <0x7000c000 0x4000>;
103 interrupts = <33>; 107 interrupts = <33>;
108 clocks = <&clks 32>, <&clks 33>;
109 clock-names = "ipg", "per";
104 status = "disabled"; 110 status = "disabled";
105 }; 111 };
106 112
@@ -110,6 +116,8 @@
110 compatible = "fsl,imx51-ecspi"; 116 compatible = "fsl,imx51-ecspi";
111 reg = <0x70010000 0x4000>; 117 reg = <0x70010000 0x4000>;
112 interrupts = <36>; 118 interrupts = <36>;
119 clocks = <&clks 51>, <&clks 52>;
120 clock-names = "ipg", "per";
113 status = "disabled"; 121 status = "disabled";
114 }; 122 };
115 123
@@ -117,6 +125,7 @@
117 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; 125 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
118 reg = <0x70014000 0x4000>; 126 reg = <0x70014000 0x4000>;
119 interrupts = <30>; 127 interrupts = <30>;
128 clocks = <&clks 49>;
120 fsl,fifo-depth = <15>; 129 fsl,fifo-depth = <15>;
121 fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ 130 fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
122 status = "disabled"; 131 status = "disabled";
@@ -126,6 +135,8 @@
126 compatible = "fsl,imx51-esdhc"; 135 compatible = "fsl,imx51-esdhc";
127 reg = <0x70020000 0x4000>; 136 reg = <0x70020000 0x4000>;
128 interrupts = <3>; 137 interrupts = <3>;
138 clocks = <&clks 46>, <&clks 0>, <&clks 73>;
139 clock-names = "ipg", "ahb", "per";
129 status = "disabled"; 140 status = "disabled";
130 }; 141 };
131 142
@@ -133,6 +144,8 @@
133 compatible = "fsl,imx51-esdhc"; 144 compatible = "fsl,imx51-esdhc";
134 reg = <0x70024000 0x4000>; 145 reg = <0x70024000 0x4000>;
135 interrupts = <4>; 146 interrupts = <4>;
147 clocks = <&clks 47>, <&clks 0>, <&clks 74>;
148 clock-names = "ipg", "ahb", "per";
136 status = "disabled"; 149 status = "disabled";
137 }; 150 };
138 }; 151 };
@@ -209,12 +222,14 @@
209 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 222 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
210 reg = <0x73f98000 0x4000>; 223 reg = <0x73f98000 0x4000>;
211 interrupts = <58>; 224 interrupts = <58>;
225 clocks = <&clks 0>;
212 }; 226 };
213 227
214 wdog@73f9c000 { /* WDOG2 */ 228 wdog@73f9c000 { /* WDOG2 */
215 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 229 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
216 reg = <0x73f9c000 0x4000>; 230 reg = <0x73f9c000 0x4000>;
217 interrupts = <59>; 231 interrupts = <59>;
232 clocks = <&clks 0>;
218 status = "disabled"; 233 status = "disabled";
219 }; 234 };
220 235
@@ -398,6 +413,8 @@
398 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 413 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
399 reg = <0x73fbc000 0x4000>; 414 reg = <0x73fbc000 0x4000>;
400 interrupts = <31>; 415 interrupts = <31>;
416 clocks = <&clks 28>, <&clks 29>;
417 clock-names = "ipg", "per";
401 status = "disabled"; 418 status = "disabled";
402 }; 419 };
403 420
@@ -405,8 +422,17 @@
405 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 422 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
406 reg = <0x73fc0000 0x4000>; 423 reg = <0x73fc0000 0x4000>;
407 interrupts = <32>; 424 interrupts = <32>;
425 clocks = <&clks 30>, <&clks 31>;
426 clock-names = "ipg", "per";
408 status = "disabled"; 427 status = "disabled";
409 }; 428 };
429
430 clks: ccm@73fd4000{
431 compatible = "fsl,imx51-ccm";
432 reg = <0x73fd4000 0x4000>;
433 interrupts = <0 71 0x04 0 72 0x04>;
434 #clock-cells = <1>;
435 };
410 }; 436 };
411 437
412 aips@80000000 { /* AIPS2 */ 438 aips@80000000 { /* AIPS2 */
@@ -422,6 +448,8 @@
422 compatible = "fsl,imx51-ecspi"; 448 compatible = "fsl,imx51-ecspi";
423 reg = <0x83fac000 0x4000>; 449 reg = <0x83fac000 0x4000>;
424 interrupts = <37>; 450 interrupts = <37>;
451 clocks = <&clks 53>, <&clks 54>;
452 clock-names = "ipg", "per";
425 status = "disabled"; 453 status = "disabled";
426 }; 454 };
427 455
@@ -429,6 +457,8 @@
429 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; 457 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
430 reg = <0x83fb0000 0x4000>; 458 reg = <0x83fb0000 0x4000>;
431 interrupts = <6>; 459 interrupts = <6>;
460 clocks = <&clks 56>, <&clks 56>;
461 clock-names = "ipg", "ahb";
432 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; 462 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
433 }; 463 };
434 464
@@ -438,6 +468,8 @@
438 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; 468 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
439 reg = <0x83fc0000 0x4000>; 469 reg = <0x83fc0000 0x4000>;
440 interrupts = <38>; 470 interrupts = <38>;
471 clocks = <&clks 55>, <&clks 0>;
472 clock-names = "ipg", "per";
441 status = "disabled"; 473 status = "disabled";
442 }; 474 };
443 475
@@ -447,6 +479,7 @@
447 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; 479 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
448 reg = <0x83fc4000 0x4000>; 480 reg = <0x83fc4000 0x4000>;
449 interrupts = <63>; 481 interrupts = <63>;
482 clocks = <&clks 35>;
450 status = "disabled"; 483 status = "disabled";
451 }; 484 };
452 485
@@ -456,6 +489,7 @@
456 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; 489 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
457 reg = <0x83fc8000 0x4000>; 490 reg = <0x83fc8000 0x4000>;
458 interrupts = <62>; 491 interrupts = <62>;
492 clocks = <&clks 34>;
459 status = "disabled"; 493 status = "disabled";
460 }; 494 };
461 495
@@ -463,6 +497,7 @@
463 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; 497 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
464 reg = <0x83fcc000 0x4000>; 498 reg = <0x83fcc000 0x4000>;
465 interrupts = <29>; 499 interrupts = <29>;
500 clocks = <&clks 48>;
466 fsl,fifo-depth = <15>; 501 fsl,fifo-depth = <15>;
467 fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ 502 fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
468 status = "disabled"; 503 status = "disabled";
@@ -478,6 +513,7 @@
478 compatible = "fsl,imx51-nand"; 513 compatible = "fsl,imx51-nand";
479 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; 514 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
480 interrupts = <8>; 515 interrupts = <8>;
516 clocks = <&clks 60>;
481 status = "disabled"; 517 status = "disabled";
482 }; 518 };
483 519
@@ -485,6 +521,7 @@
485 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; 521 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
486 reg = <0x83fe8000 0x4000>; 522 reg = <0x83fe8000 0x4000>;
487 interrupts = <96>; 523 interrupts = <96>;
524 clocks = <&clks 50>;
488 fsl,fifo-depth = <15>; 525 fsl,fifo-depth = <15>;
489 fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */ 526 fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */
490 status = "disabled"; 527 status = "disabled";
@@ -494,6 +531,8 @@
494 compatible = "fsl,imx51-fec", "fsl,imx27-fec"; 531 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
495 reg = <0x83fec000 0x4000>; 532 reg = <0x83fec000 0x4000>;
496 interrupts = <87>; 533 interrupts = <87>;
534 clocks = <&clks 42>, <&clks 42>, <&clks 42>;
535 clock-names = "ipg", "ahb", "ptp";
497 status = "disabled"; 536 status = "disabled";
498 }; 537 };
499 }; 538 };