diff options
author | R Sricharan <r.sricharan@ti.com> | 2013-08-14 09:38:20 -0400 |
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committer | Benoit Cousson <bcousson@baylibre.com> | 2013-10-08 11:51:41 -0400 |
commit | 6e58b8f1daaf1af340fb9309907e5ffa473c7aff (patch) | |
tree | a2fcea763036537daa3a49b44ca2e3319e294a5e /arch/arm/boot/dts/dra7-evm.dts | |
parent | 06a9ea5d76fdff82d9792d8cc315de4c43086780 (diff) |
ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board
Add minimal device tree source needed for DRA7 based SoCs.
Also add a board dts file for the dra7-evm (based on dra752)
which contains 1.5G of memory with 1G interleaved and 512MB
non-interleaved. Also added in the board file are pin configuration
details for i2c, mcspi and uart devices on board.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7-evm.dts')
-rw-r--r-- | arch/arm/boot/dts/dra7-evm.dts | 140 |
1 files changed, 140 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts new file mode 100644 index 000000000000..ca5dab2214d5 --- /dev/null +++ b/arch/arm/boot/dts/dra7-evm.dts | |||
@@ -0,0 +1,140 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | |||
10 | #include "dra7.dtsi" | ||
11 | |||
12 | / { | ||
13 | model = "TI DRA7"; | ||
14 | compatible = "ti,dra7-evm", "ti,dra752", "ti,dra7"; | ||
15 | |||
16 | memory { | ||
17 | device_type = "memory"; | ||
18 | reg = <0x80000000 0x60000000>; /* 1536 MB */ | ||
19 | }; | ||
20 | }; | ||
21 | |||
22 | &dra7_pmx_core { | ||
23 | i2c1_pins: pinmux_i2c1_pins { | ||
24 | pinctrl-single,pins = < | ||
25 | 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */ | ||
26 | 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */ | ||
27 | >; | ||
28 | }; | ||
29 | |||
30 | i2c2_pins: pinmux_i2c2_pins { | ||
31 | pinctrl-single,pins = < | ||
32 | 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */ | ||
33 | 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */ | ||
34 | >; | ||
35 | }; | ||
36 | |||
37 | i2c3_pins: pinmux_i2c3_pins { | ||
38 | pinctrl-single,pins = < | ||
39 | 0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */ | ||
40 | 0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */ | ||
41 | >; | ||
42 | }; | ||
43 | |||
44 | mcspi1_pins: pinmux_mcspi1_pins { | ||
45 | pinctrl-single,pins = < | ||
46 | 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */ | ||
47 | 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */ | ||
48 | 0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */ | ||
49 | 0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ | ||
50 | 0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */ | ||
51 | 0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */ | ||
52 | 0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */ | ||
53 | >; | ||
54 | }; | ||
55 | |||
56 | mcspi2_pins: pinmux_mcspi2_pins { | ||
57 | pinctrl-single,pins = < | ||
58 | 0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */ | ||
59 | 0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ | ||
60 | 0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ | ||
61 | 0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ | ||
62 | >; | ||
63 | }; | ||
64 | |||
65 | uart1_pins: pinmux_uart1_pins { | ||
66 | pinctrl-single,pins = < | ||
67 | 0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */ | ||
68 | 0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */ | ||
69 | 0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */ | ||
70 | 0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */ | ||
71 | >; | ||
72 | }; | ||
73 | |||
74 | uart2_pins: pinmux_uart2_pins { | ||
75 | pinctrl-single,pins = < | ||
76 | 0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */ | ||
77 | 0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */ | ||
78 | 0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */ | ||
79 | 0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */ | ||
80 | >; | ||
81 | }; | ||
82 | |||
83 | uart3_pins: pinmux_uart3_pins { | ||
84 | pinctrl-single,pins = < | ||
85 | 0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */ | ||
86 | 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ | ||
87 | >; | ||
88 | }; | ||
89 | }; | ||
90 | |||
91 | &i2c1 { | ||
92 | status = "okay"; | ||
93 | pinctrl-names = "default"; | ||
94 | pinctrl-0 = <&i2c1_pins>; | ||
95 | clock-frequency = <400000>; | ||
96 | }; | ||
97 | |||
98 | &i2c2 { | ||
99 | status = "okay"; | ||
100 | pinctrl-names = "default"; | ||
101 | pinctrl-0 = <&i2c2_pins>; | ||
102 | clock-frequency = <400000>; | ||
103 | }; | ||
104 | |||
105 | &i2c3 { | ||
106 | status = "okay"; | ||
107 | pinctrl-names = "default"; | ||
108 | pinctrl-0 = <&i2c3_pins>; | ||
109 | clock-frequency = <3400000>; | ||
110 | }; | ||
111 | |||
112 | &mcspi1 { | ||
113 | status = "okay"; | ||
114 | pinctrl-names = "default"; | ||
115 | pinctrl-0 = <&mcspi1_pins>; | ||
116 | }; | ||
117 | |||
118 | &mcspi2 { | ||
119 | status = "okay"; | ||
120 | pinctrl-names = "default"; | ||
121 | pinctrl-0 = <&mcspi2_pins>; | ||
122 | }; | ||
123 | |||
124 | &uart1 { | ||
125 | status = "okay"; | ||
126 | pinctrl-names = "default"; | ||
127 | pinctrl-0 = <&uart1_pins>; | ||
128 | }; | ||
129 | |||
130 | &uart2 { | ||
131 | status = "okay"; | ||
132 | pinctrl-names = "default"; | ||
133 | pinctrl-0 = <&uart2_pins>; | ||
134 | }; | ||
135 | |||
136 | &uart3 { | ||
137 | status = "okay"; | ||
138 | pinctrl-names = "default"; | ||
139 | pinctrl-0 = <&uart3_pins>; | ||
140 | }; | ||