diff options
author | Javier Martinez Canillas <javier@osg.samsung.com> | 2015-11-12 23:53:46 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2015-11-30 11:43:21 -0500 |
commit | 46bd10c828fe03e45c1167de6be4ab7c5a479aa9 (patch) | |
tree | d3470164ca7eed6918c97ddb53d1a82726416b30 /arch/arm/boot/dts/am335x-evm.dts | |
parent | 9d945f89beb1322b6a1583abe2b840627aa2e611 (diff) |
ARM: dts: am335x-evm: Use AM33XX_IOPAD pinmux macro
Use the pinmux IOPAD macro to define the register absolute physical
address instead of the offset from the padconf base address. This
makes the DTS easier to read since matches the addresses listed in
the Technical Reference Manual.
Also, use the mux defines instead of magic numbers for the padconf
values when defining the pinctrl lines to make it more readable.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am335x-evm.dts')
-rw-r--r-- | arch/arm/boot/dts/am335x-evm.dts | 220 |
1 files changed, 110 insertions, 110 deletions
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index d9d00ab863a2..4caf074063fe 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts | |||
@@ -168,215 +168,215 @@ | |||
168 | 168 | ||
169 | matrix_keypad_s0: matrix_keypad_s0 { | 169 | matrix_keypad_s0: matrix_keypad_s0 { |
170 | pinctrl-single,pins = < | 170 | pinctrl-single,pins = < |
171 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ | 171 | AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ |
172 | 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ | 172 | AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ |
173 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ | 173 | AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ |
174 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ | 174 | AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ |
175 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ | 175 | AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ |
176 | >; | 176 | >; |
177 | }; | 177 | }; |
178 | 178 | ||
179 | volume_keys_s0: volume_keys_s0 { | 179 | volume_keys_s0: volume_keys_s0 { |
180 | pinctrl-single,pins = < | 180 | pinctrl-single,pins = < |
181 | 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ | 181 | AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ |
182 | 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ | 182 | AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ |
183 | >; | 183 | >; |
184 | }; | 184 | }; |
185 | 185 | ||
186 | i2c0_pins: pinmux_i2c0_pins { | 186 | i2c0_pins: pinmux_i2c0_pins { |
187 | pinctrl-single,pins = < | 187 | pinctrl-single,pins = < |
188 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | 188 | AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
189 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | 189 | AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
190 | >; | 190 | >; |
191 | }; | 191 | }; |
192 | 192 | ||
193 | i2c1_pins: pinmux_i2c1_pins { | 193 | i2c1_pins: pinmux_i2c1_pins { |
194 | pinctrl-single,pins = < | 194 | pinctrl-single,pins = < |
195 | 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ | 195 | AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ |
196 | 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ | 196 | AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ |
197 | >; | 197 | >; |
198 | }; | 198 | }; |
199 | 199 | ||
200 | uart0_pins: pinmux_uart0_pins { | 200 | uart0_pins: pinmux_uart0_pins { |
201 | pinctrl-single,pins = < | 201 | pinctrl-single,pins = < |
202 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | 202 | AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
203 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | 203 | AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ |
204 | >; | 204 | >; |
205 | }; | 205 | }; |
206 | 206 | ||
207 | uart1_pins: pinmux_uart1_pins { | 207 | uart1_pins: pinmux_uart1_pins { |
208 | pinctrl-single,pins = < | 208 | pinctrl-single,pins = < |
209 | 0x178 (PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ | 209 | AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ |
210 | 0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ | 210 | AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ |
211 | 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ | 211 | AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ |
212 | 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ | 212 | AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ |
213 | >; | 213 | >; |
214 | }; | 214 | }; |
215 | 215 | ||
216 | clkout2_pin: pinmux_clkout2_pin { | 216 | clkout2_pin: pinmux_clkout2_pin { |
217 | pinctrl-single,pins = < | 217 | pinctrl-single,pins = < |
218 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ | 218 | AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
219 | >; | 219 | >; |
220 | }; | 220 | }; |
221 | 221 | ||
222 | nandflash_pins_s0: nandflash_pins_s0 { | 222 | nandflash_pins_s0: nandflash_pins_s0 { |
223 | pinctrl-single,pins = < | 223 | pinctrl-single,pins = < |
224 | 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ | 224 | AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ |
225 | 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ | 225 | AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ |
226 | 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ | 226 | AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ |
227 | 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ | 227 | AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ |
228 | 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ | 228 | AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ |
229 | 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ | 229 | AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ |
230 | 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ | 230 | AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ |
231 | 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ | 231 | AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ |
232 | 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ | 232 | AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ |
233 | 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ | 233 | AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ |
234 | 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ | 234 | AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ |
235 | 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ | 235 | AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ |
236 | 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ | 236 | AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ |
237 | 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ | 237 | AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ |
238 | 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ | 238 | AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ |
239 | >; | 239 | >; |
240 | }; | 240 | }; |
241 | 241 | ||
242 | ecap0_pins: backlight_pins { | 242 | ecap0_pins: backlight_pins { |
243 | pinctrl-single,pins = < | 243 | pinctrl-single,pins = < |
244 | 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ | 244 | AM33XX_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ |
245 | >; | 245 | >; |
246 | }; | 246 | }; |
247 | 247 | ||
248 | cpsw_default: cpsw_default { | 248 | cpsw_default: cpsw_default { |
249 | pinctrl-single,pins = < | 249 | pinctrl-single,pins = < |
250 | /* Slave 1 */ | 250 | /* Slave 1 */ |
251 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ | 251 | AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
252 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | 252 | AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ |
253 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ | 253 | AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ |
254 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ | 254 | AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ |
255 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | 255 | AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ |
256 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | 256 | AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ |
257 | 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ | 257 | AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ |
258 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ | 258 | AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ |
259 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ | 259 | AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ |
260 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ | 260 | AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ |
261 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ | 261 | AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ |
262 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ | 262 | AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ |
263 | >; | 263 | >; |
264 | }; | 264 | }; |
265 | 265 | ||
266 | cpsw_sleep: cpsw_sleep { | 266 | cpsw_sleep: cpsw_sleep { |
267 | pinctrl-single,pins = < | 267 | pinctrl-single,pins = < |
268 | /* Slave 1 reset value */ | 268 | /* Slave 1 reset value */ |
269 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 269 | AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) |
270 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 270 | AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) |
271 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | 271 | AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
272 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 272 | AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) |
273 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 273 | AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) |
274 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 274 | AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) |
275 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | 275 | AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
276 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 276 | AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) |
277 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 277 | AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) |
278 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 278 | AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) |
279 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | 279 | AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
280 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 280 | AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) |
281 | >; | 281 | >; |
282 | }; | 282 | }; |
283 | 283 | ||
284 | davinci_mdio_default: davinci_mdio_default { | 284 | davinci_mdio_default: davinci_mdio_default { |
285 | pinctrl-single,pins = < | 285 | pinctrl-single,pins = < |
286 | /* MDIO */ | 286 | /* MDIO */ |
287 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | 287 | AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
288 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | 288 | AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ |
289 | >; | 289 | >; |
290 | }; | 290 | }; |
291 | 291 | ||
292 | davinci_mdio_sleep: davinci_mdio_sleep { | 292 | davinci_mdio_sleep: davinci_mdio_sleep { |
293 | pinctrl-single,pins = < | 293 | pinctrl-single,pins = < |
294 | /* MDIO reset value */ | 294 | /* MDIO reset value */ |
295 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 295 | AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) |
296 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | 296 | AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
297 | >; | 297 | >; |
298 | }; | 298 | }; |
299 | 299 | ||
300 | mmc1_pins: pinmux_mmc1_pins { | 300 | mmc1_pins: pinmux_mmc1_pins { |
301 | pinctrl-single,pins = < | 301 | pinctrl-single,pins = < |
302 | 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | 302 | AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ |
303 | >; | 303 | >; |
304 | }; | 304 | }; |
305 | 305 | ||
306 | mmc3_pins: pinmux_mmc3_pins { | 306 | mmc3_pins: pinmux_mmc3_pins { |
307 | pinctrl-single,pins = < | 307 | pinctrl-single,pins = < |
308 | 0x44 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */ | 308 | AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */ |
309 | 0x48 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */ | 309 | AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */ |
310 | 0x4C (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */ | 310 | AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */ |
311 | 0x78 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */ | 311 | AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */ |
312 | 0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */ | 312 | AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */ |
313 | 0x8C (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */ | 313 | AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */ |
314 | >; | 314 | >; |
315 | }; | 315 | }; |
316 | 316 | ||
317 | wlan_pins: pinmux_wlan_pins { | 317 | wlan_pins: pinmux_wlan_pins { |
318 | pinctrl-single,pins = < | 318 | pinctrl-single,pins = < |
319 | 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 */ | 319 | AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 */ |
320 | 0x19C (PIN_INPUT | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */ | 320 | AM33XX_IOPAD(0x99c, PIN_INPUT | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */ |
321 | 0x1AC (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 */ | 321 | AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 */ |
322 | >; | 322 | >; |
323 | }; | 323 | }; |
324 | 324 | ||
325 | lcd_pins_s0: lcd_pins_s0 { | 325 | lcd_pins_s0: lcd_pins_s0 { |
326 | pinctrl-single,pins = < | 326 | pinctrl-single,pins = < |
327 | 0x20 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ | 327 | AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ |
328 | 0x24 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ | 328 | AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ |
329 | 0x28 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ | 329 | AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ |
330 | 0x2c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ | 330 | AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ |
331 | 0x30 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ | 331 | AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ |
332 | 0x34 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ | 332 | AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ |
333 | 0x38 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ | 333 | AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ |
334 | 0x3c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ | 334 | AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ |
335 | 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ | 335 | AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ |
336 | 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ | 336 | AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ |
337 | 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ | 337 | AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ |
338 | 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ | 338 | AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ |
339 | 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ | 339 | AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ |
340 | 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ | 340 | AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ |
341 | 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ | 341 | AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ |
342 | 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ | 342 | AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ |
343 | 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ | 343 | AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ |
344 | 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ | 344 | AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ |
345 | 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ | 345 | AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ |
346 | 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ | 346 | AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ |
347 | 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ | 347 | AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ |
348 | 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ | 348 | AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ |
349 | 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ | 349 | AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ |
350 | 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ | 350 | AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ |
351 | 0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */ | 351 | AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */ |
352 | 0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */ | 352 | AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */ |
353 | 0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */ | 353 | AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */ |
354 | 0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ | 354 | AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ |
355 | >; | 355 | >; |
356 | }; | 356 | }; |
357 | 357 | ||
358 | mcasp1_pins: mcasp1_pins { | 358 | mcasp1_pins: mcasp1_pins { |
359 | pinctrl-single,pins = < | 359 | pinctrl-single,pins = < |
360 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ | 360 | AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ |
361 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ | 361 | AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ |
362 | 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ | 362 | AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ |
363 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ | 363 | AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ |
364 | >; | 364 | >; |
365 | }; | 365 | }; |
366 | 366 | ||
367 | mcasp1_pins_sleep: mcasp1_pins_sleep { | 367 | mcasp1_pins_sleep: mcasp1_pins_sleep { |
368 | pinctrl-single,pins = < | 368 | pinctrl-single,pins = < |
369 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) | 369 | AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
370 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 370 | AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) |
371 | 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 371 | AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) |
372 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 372 | AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) |
373 | >; | 373 | >; |
374 | }; | 374 | }; |
375 | 375 | ||
376 | dcan1_pins_default: dcan1_pins_default { | 376 | dcan1_pins_default: dcan1_pins_default { |
377 | pinctrl-single,pins = < | 377 | pinctrl-single,pins = < |
378 | 0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */ | 378 | AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */ |
379 | 0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */ | 379 | AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */ |
380 | >; | 380 | >; |
381 | }; | 381 | }; |
382 | }; | 382 | }; |