diff options
| author | Javier Martinez Canillas <javier@osg.samsung.com> | 2015-11-12 23:53:45 -0500 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2015-11-30 11:43:21 -0500 |
| commit | 9d945f89beb1322b6a1583abe2b840627aa2e611 (patch) | |
| tree | 2140e159f0ce1da8480f6438f291544d14a60c7c /arch/arm/boot/dts/am335x-chilisom.dtsi | |
| parent | d5d4dc17309af16faa556e44f94714a66fc4f913 (diff) | |
ARM: dts: am335x-chilisom: Use AM33XX_IOPAD pinmux macro
Use the pinmux IOPAD macro to define the register absolute physical
address instead of the offset from the padconf base address. This
makes the DTS easier to read since matches the addresses listed in
the Technical Reference Manual.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am335x-chilisom.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am335x-chilisom.dtsi | 80 |
1 files changed, 40 insertions, 40 deletions
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi index 7e9a34dffe21..857d9894103a 100644 --- a/arch/arm/boot/dts/am335x-chilisom.dtsi +++ b/arch/arm/boot/dts/am335x-chilisom.dtsi | |||
| @@ -29,81 +29,81 @@ | |||
| 29 | 29 | ||
| 30 | i2c0_pins: pinmux_i2c0_pins { | 30 | i2c0_pins: pinmux_i2c0_pins { |
| 31 | pinctrl-single,pins = < | 31 | pinctrl-single,pins = < |
| 32 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | 32 | AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
| 33 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | 33 | AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
| 34 | >; | 34 | >; |
| 35 | }; | 35 | }; |
| 36 | 36 | ||
| 37 | uart0_pins: pinmux_uart0_pins { | 37 | uart0_pins: pinmux_uart0_pins { |
| 38 | pinctrl-single,pins = < | 38 | pinctrl-single,pins = < |
| 39 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | 39 | AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
| 40 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | 40 | AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ |
| 41 | >; | 41 | >; |
| 42 | }; | 42 | }; |
| 43 | 43 | ||
| 44 | cpsw_default: cpsw_default { | 44 | cpsw_default: cpsw_default { |
| 45 | pinctrl-single,pins = < | 45 | pinctrl-single,pins = < |
| 46 | /* Slave 1 */ | 46 | /* Slave 1 */ |
| 47 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */ | 47 | AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */ |
| 48 | 0x110 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ | 48 | AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ |
| 49 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */ | 49 | AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */ |
| 50 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ | 50 | AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ |
| 51 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ | 51 | AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ |
| 52 | 0x13c (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ | 52 | AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ |
| 53 | 0x140 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ | 53 | AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ |
| 54 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii_ref_clk */ | 54 | AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii_ref_clk */ |
| 55 | >; | 55 | >; |
| 56 | }; | 56 | }; |
| 57 | 57 | ||
| 58 | cpsw_sleep: cpsw_sleep { | 58 | cpsw_sleep: cpsw_sleep { |
| 59 | pinctrl-single,pins = < | 59 | pinctrl-single,pins = < |
| 60 | /* Slave 1 reset value */ | 60 | /* Slave 1 reset value */ |
| 61 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) | 61 | AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 62 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 62 | AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 63 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 63 | AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 64 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 64 | AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 65 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 65 | AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 66 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 66 | AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 67 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | 67 | AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 68 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 68 | AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 69 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 69 | AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 70 | >; | 70 | >; |
| 71 | }; | 71 | }; |
| 72 | 72 | ||
| 73 | davinci_mdio_default: davinci_mdio_default { | 73 | davinci_mdio_default: davinci_mdio_default { |
| 74 | pinctrl-single,pins = < | 74 | pinctrl-single,pins = < |
| 75 | /* mdio_data.mdio_data */ | 75 | /* mdio_data.mdio_data */ |
| 76 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) | 76 | AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) |
| 77 | /* mdio_clk.mdio_clk */ | 77 | /* mdio_clk.mdio_clk */ |
| 78 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) | 78 | AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) |
| 79 | >; | 79 | >; |
| 80 | }; | 80 | }; |
| 81 | 81 | ||
| 82 | davinci_mdio_sleep: davinci_mdio_sleep { | 82 | davinci_mdio_sleep: davinci_mdio_sleep { |
| 83 | pinctrl-single,pins = < | 83 | pinctrl-single,pins = < |
| 84 | /* MDIO reset value */ | 84 | /* MDIO reset value */ |
| 85 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | 85 | AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 86 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | 86 | AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 87 | >; | 87 | >; |
| 88 | }; | 88 | }; |
| 89 | 89 | ||
| 90 | nandflash_pins: nandflash_pins { | 90 | nandflash_pins: nandflash_pins { |
| 91 | pinctrl-single,pins = < | 91 | pinctrl-single,pins = < |
| 92 | 0x00 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ | 92 | AM33XX_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ |
| 93 | 0x04 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ | 93 | AM33XX_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ |
| 94 | 0x08 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ | 94 | AM33XX_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ |
| 95 | 0x0c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ | 95 | AM33XX_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ |
| 96 | 0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ | 96 | AM33XX_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ |
| 97 | 0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ | 97 | AM33XX_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ |
| 98 | 0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ | 98 | AM33XX_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ |
| 99 | 0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ | 99 | AM33XX_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ |
| 100 | 100 | ||
| 101 | 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ | 101 | AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ |
| 102 | 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ | 102 | AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ |
| 103 | 0x90 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ | 103 | AM33XX_IOPAD(0x890, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ |
| 104 | 0x94 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ | 104 | AM33XX_IOPAD(0x894, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ |
| 105 | 0x98 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_wen.gpmc_wen */ | 105 | AM33XX_IOPAD(0x898, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_wen.gpmc_wen */ |
| 106 | 0x9c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ | 106 | AM33XX_IOPAD(0x89c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ |
| 107 | >; | 107 | >; |
| 108 | }; | 108 | }; |
| 109 | }; | 109 | }; |